CN106329906A - Voltage conversion circuit realizing automatic power factor correction - Google Patents

Voltage conversion circuit realizing automatic power factor correction Download PDF

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Publication number
CN106329906A
CN106329906A CN201610826245.9A CN201610826245A CN106329906A CN 106329906 A CN106329906 A CN 106329906A CN 201610826245 A CN201610826245 A CN 201610826245A CN 106329906 A CN106329906 A CN 106329906A
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China
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voltage
current
inductance
output
main switch
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许明伟
杨帅
刘慧博
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Zhejiang Core Electronic Technology Co Ltd
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Zhejiang Core Electronic Technology Co Ltd
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Priority to CN201610826245.9A priority Critical patent/CN106329906A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208Arrangements for improving power factor of AC input
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The invention mainly relates to a voltage conversion circuit realizing automatic power factor correction. An interconnection node between an inductive resistor and an inductor is defined as a floating ground node. The sampling voltage across the two ends of the inductive resistor is captured between a second end of a main switching tube and the floating ground node. After comparing the sampling voltage with a reference voltage and amplifying the sampling voltage, an error amplifier outputs the sampling voltage to a first capacitor. The average voltage of the first capacitor and a sawtooth wave output by an oscillator are compared by a pulse width modulation comparator. A produced pulse width modulation signal is coupled to a control end of the main switching tube. The main switching tube is such set that the on time in each switching cycle is kept constant. A more flexible power factor correction PFC technology without an analog multiplier is adopted. Moreover, the implementation mode of PFC is simpler, and the stability is better.

Description

A kind of realize the power factor voltage conversion circuit from dynamic(al) correction
Technical field
The invention mainly relates to voltage conversion circuit, exactly, it is proposed that one can realize power factor from dynamic(al) correction Voltage-dropping type voltage conversion circuit, have employed the power factor correcting PFC technology more flexibly without analog multiplier, and The implementation of PFC is simpler, and stability characteristic (quality) is more preferable.
Background technology
PFC (PFC) is the technology grown up in the eighties in 20th century, and its development comes from off-line Developing rapidly of Switching Power Supply, pfc circuit carries out shaping to the input current waveform of off-line power supply, makes AC input current waveform Follow AC input voltage waveform completely, even if input current voltage is with frequency homophase, so that the active power drawn from power supply is Bigization.Ideally, load should show as a pure resistor load, and the reflection power that electrical equipment absorbs is zero, defeated during electric current Enter voltage perfect copy and with input voltage homophase.Pfc circuit not only improves the power factor of circuit or system, heavier Want is the problem that can solve electromagnetic interference and electromagnetic compatibility.The another reason using PFC technology is to meet America and Europe New electrical equipment requirement.
PFC can be simply defined as the ratio of active power and apparent energy, i.e. when line voltage distribution and electric current It is sine wave and the two phase angle isTime, power factor PF isThe existing resistance of the most a lot of household electrical appliance is again There is the impedance load of reactance, can make to exist between voltage and electric current phase angleThe power factor of this kind of inductive load is relatively low, Make to export substantial amounts of reactive power, cause power transmission efficiency to reduce.For improving the power-factor of load, often use indemnifying measure. PFC divides PPFC (PPFC) and APFC (APFC) two types, and currently a popular is active Power factor correction technology.
Seeing Fig. 1, passive PFC circuit operation principle is as it is shown in figure 1, VACVoltage sinusoidal wave voltage has zero change 1/4th In cycle, diode VD2 and the VD3 conducting of commutator, another electric capacity C2 is filled by electric current to electric capacity C1 and through diode VD6 Electricity.Electric main VACReach peak value VPRear decline, now on electric capacity C1 with C2, voltage is identical is 1/2 × VP, electric capacity C1 passes through Load and diode VD5 start electric discharge.Work as VACVoltage magnitude is less than 1/2 × VPTime, electric capacity C2 is put by diode VD7 and load Electricity.Work as VACWhen instantaneous value is less than passive PFC circuit voltage, diode VD2 and VD3 ends, now input current IACOccur dead District.If the stage V at negative half periodACWhen voltage is higher than output voltage, diode VD1 and VD4 will turn on by forward bias, electric capacity C1 and C2 is again by punching electricity, thus the working condition similar with positive half period occurs.
Seeing Fig. 2, it is seen that use passive PFC circuit, commutation diode angle of flow increases, and power factor is left up to 0.9 The right side, total harmonic distortion THD is about 28%-30%, and this method simple in construction low cost.But owing to passive filter is logical Crossing and provide a low impedance path in parallel to play filter action for harmonic wave in power system, its filtering characteristic is by system and filter The ratio of the impedance of ripple device determines, easy and system generation parallel resonance causes Harmonics amplification, makes wave filter overload even burn out.Directly The ripple of stream output voltage is the biggest, it is desirable to higher power factor can not be fully achieved requirement, so the skill of industry Art personnel more have employed active PFC scheme.
APFC has smooth exchange input waveform compared with PPFC, has less High-frequency harmonic current component.Also there is good direct current output stability, under various conditions all without self-excitation.Also possesses height Power factor and PF value up to more than 0.99.And having relatively low total harmonic distortion, THD is less than 10%.Also have wider Input voltage range up to 90-270V, magnetics volume is less.
The major defect of APFC is that circuit complexity cost is high.Active PFC circuit topology mainly has: blood pressure lowering Formula (Buck), lifting/lowering pressure type (Buck/Boost), inverse-excitation type (Fly-back), boost type (Boost) etc..Buck structure because of Power switch pipe is directly connected with the output of rectifier bridge so that the noise of switching tube directly affects electrical network, filtering difficulty and power Voltage stress on pipe is big, and the drive level controlling power tube is to float, and drive circuit is complicated.Lifting/lowering pressure type structure palpus With two power switch pipes, and there is the drive control signal floating circuit of a power switch pipe complicated, less employing.Flyback electricity Line structure output and input isolation, output voltage can arbitrarily select, and uses fairly simple voltage mode control, but due to instead The restriction of excitation circuit self, is generally used for the small-power occasion of below 150W.Boost type topological structure is relatively simple, conveniently makes electricity consumption Stream is controlled.
APFC can use different control methods.The most continuous according to inductive current, can be divided into Continuous conduction mode (CCM), critical conduction mode (BCM), DCM (DCM).Different according to detection electric current, can divide For peak value comparison method, hysteretic loop current control and Average Current Control.
Seeing Fig. 3, be traditional critical conduction PFC implementation using multiplier, work process is as follows: exchange input Voltage VINBy resistance R11 and the sampling of R12 dividing potential drop as an input signal of multiplier after bridge rectifier, and output voltage VOUTFeedback signal VFBAnd reference voltage VREFV is obtained after error amplifierCOMP, this output voltage of error amplifier VCOMPAs multiplier another input signal wherein, feedback signal VFBIt is to output electricity by voltage divider resistor R13 and R14 Pressure VOUTPartial pressure value.Output signal V of multiplierMULTThe sinusoidal voltage V after rectification will be followedINChange, but also it is used as defeated Enter Voltage Reference.This signal VMULTHave a current comparator to compare afterwards with current waveform signal, comparative result passes through Output signal is coupled to shutoff or the connection of the grid control switching tube of switching tube by logical block LOGIC.It is shown in Figure 4, When switching tube is opened, inductive current oblique ascension, until the signal in branch reaches multiplier output voltage VMULT.This level compares Device overturns and changes state switch-off power pipe, and disconnecting after current oblique deascension is zero.Zero current detecting circuit measures the electricity at inductance two ends Pressure, when electric current reaches zero, the voltage of measurement also can drop to zero, causes switch to be again switched on electric current at this oblique ascension.
Summary of the invention
The application average current control mode based on voltage-dropping type drive circuit (such as load is the drive circuit of LED) Power factor correcting PFC realizes technology, generally, not only requires high PF value but also require output in the drive circuit application drive LED Current constant, because LED is current-control type element, needs current constant control.
The PFC technology that the application uses does not uses the multiplier approach of routine to follow busbar voltage change, but directly To output current sample and it is averaged.And by the method that sampled output current is averaged, it is simultaneously achieved high PF value With output electric current constant.Application herein is based on Active Power Factor Correction Technology, compared to the PFC of traditional band multiplier Circuit, the application have employed a kind of PFC without analog multiplier more flexibly and realizes technology, and pfc circuit implementation Simpler, stability characteristic (quality) is more preferable.
The application relates to a kind of realizing the power factor voltage conversion circuit from dynamic(al) correction, and alternating current is whole by commutator Pulsating volage after stream as an input voltage, the first end of the main switch of a reduction voltage circuit receive input voltage and the Two ends and one have a continued flow component with reference to connecting between ground node, and the voltage output node of reduction voltage circuit and main switch The second end between be in series with an inductive reactance and an inductance;
An interconnecting nodes between this inductive reactance and this inductance is defined as floating ground node, at the second of main switch Capture the sampled voltage at these inductive reactance two ends between end and this floating ground node, and an error amplifier is by this sampling electricity Pressure and a basis reference voltage ratio export on first electric capacity after relatively amplifying, and wherein the first electric capacity is connected to error amplification Between the outfan of device and this floating ground node;
Average voltage level and the sawtooth waveforms of an agitator output on first electric capacity pass through a pulse width modulation ratio Relatively device compares, and the pulse width modulating signal of generation is coupled to main switch and controls end, makes main switch at each switch ON time in cycle keeps constant.
Above-mentioned voltage conversion circuit, connects between outfan and the reference ground node of commutator and has an input capacitance, hand over Stream electricity is by obtaining pulsating volage again after first passing through input capacitance filtering after rectifier rectification.
Above-mentioned voltage conversion circuit, the protection signal of pulse width modulating signal and a protection circuit output is simultaneously entered To a logical block, only when pulse width modulating signal and protection signal have the first logic state simultaneously, logic list The output result of unit just has the first logic state and drives switching tube to connect.
Above-mentioned voltage conversion circuit, also the current detection signal of a current over-zero detector unit output also inputs simultaneously To this logical block, only have first simultaneously patrol pulse width modulating signal, protection signal and current detection signal three During the state of collecting, the output result of logical block just has the first logic state and drives switching tube to connect;Or
Above-mentioned voltage conversion circuit, also the current detection signal of a current over-zero detector unit output also inputs simultaneously To this logical block, only when pulse width modulating signal and current detection signal have the first logic state simultaneously, The output result of logical block just has the first logic state and drives switching tube to connect;Wherein
Current over-zero detector unit is when monitoring inductive current and tending to reverse, then current over-zero detector unit reduces electric current Detection signal dutycycle in each switch periods.
Above-mentioned voltage conversion circuit, the first end of inductance is connected in this interconnecting nodes mutually with inductive reactance, relative the of inductance Two ends are connected with floating ground node a potentiometer;
Current over-zero detector unit captures a dividing potential drop from potentiometer, and by contrasting this dividing potential drop and floating ground node Current potential monitors whether inductive current there occurs reversely.
Above-mentioned voltage conversion circuit, the result of logical block output increases after driving force again by drive circuit The output signal of drive circuit is coupled to the control end of main switch.
Above-mentioned voltage conversion circuit, input voltage VIN=VP× sin (ω t), wherein VPFor alternating current after over commutation Half crest value, and ω is the angular velocity of half waveform, t is the time;And
Flow through the electric current i of inductanceLP=VP×TON× sin (ω t)/L, wherein TONIt is that main switch is in each switch periods Interior ON time, L is inductance value.
Above-mentioned voltage conversion circuit, flows through the electric current i of inductanceLP=ILP× sin (ω t), flows through the inductance peak electricity of inductance The maximum I of streamLP=VP×TON/ L, arranges ON time TONConstant thus inductive current peak is clamped down on and becomes a sine Function, ILPWith input voltage VINIn sine wave change and thereby realize power factor from dynamic(al) correction.
Above-mentioned voltage conversion circuit, ILPRepresent the maximum of inductance peak point current, it is known that work as TONInductive current peak time constant Value ILPAlso it is a SIN function.
Above-mentioned voltage conversion circuit, the output average current I of reduction voltage circuitOUT_AVGSize is by resistance value R of sampling resistorCS Value V with basis reference voltageREFDetermine:
IOUT_AVG=VSENSE_AVG/RCS≈VREF/RCS
Above-mentioned voltage conversion circuit, in approximate calculation, the sampled voltage V at sampling resistor two endsSENSEAn average electricity Pressure value VSENSE_AVGAnd VREFThe basic approximately equal of value.
Above-mentioned voltage conversion circuit, continued flow component is attached to main switch the second end and with reference between ground node Synchro switch or diode;
When continued flow component is synchro switch, synchro switch and main switch are alternately connected in each switch periods, and They can not be also turned on, in order to when main switch turns off in each switch periods, synchro switch can be inductance afterflow;
When continued flow component is diode, diode anode links reference ground node and negative electrode links main switch the second end, So that diode can be inductance afterflow when main switch turns off in each switch periods.
Above-mentioned voltage conversion circuit, the operation principle of this circuit framework is: the opening time of constant power pipe, makes inductance electricity Stream peak value changes with input voltage, and power main switch ON time TONInterior input current IINWith the electric current I flowing through inductanceL Equal, so input current IINAlso can be sine wave change with input voltage, thus realize the function of PFC.Specific works process As follows, resistance RCSSampling inductive current, it is possible to detect the rise and fall process of inductive current, VSENSEVoltage is resistance RCS Sampled voltage, error amplifier is by VSENSEWith VREFVoltage ratio exports after relatively amplifying, the external bulky capacitor of error amplifier CCOMP, electric capacity CCOMPThe outputting inductance electric current of sampling is averaged, it is ensured that be averaged average voltage level V of acquisitionCOMPThe most not Become, make the switch conduction times T of systemONIt is held essentially constant.
Accompanying drawing explanation
Reading described further below and with reference to after the following drawings, inventive feature and advantage will be apparent to:
Fig. 1 is the ultimate principle of passive PFC circuit.
Fig. 2 is the input voltage and input current waveform of passive PFC circuit in Fig. 1.
Fig. 3 is the pfc circuit of conventional belt multiplier.
Fig. 4 be the pfc circuit of Fig. 3 critical conduction BCM pattern under outputting inductance electric current.
Fig. 5 is the voltage conversion circuit of the be automatically obtained power factor correcting of the present invention.
Fig. 6 is the voltage conversion circuit input voltage and input current waveform of Fig. 5.
Detailed description of the invention
Seeing Fig. 5, the realized power factor that the application relates to, from the BUCK type voltage conversion circuit of dynamic(al) correction, exchanges city Electricity AC passes through the pulsating volage after bridge rectifier 101 rectification as an input voltage VIN, diode DH in commutator 1011 And DH2It is serially connected in one with reference to ground node NGNDOutput node N with a commutator 101IBetween, diode DH3And DH4Concatenation With reference to ground node NGNDWith output node NIBetween.Diode DH1~DH3Both anodes are linked with reference to ground node NGND, two poles Pipe DH2~DH4Both negative electrodes link output node NI.Electric main AC is from diode DH1Negative electrode and DH2Anode be connected One interconnection point and from diode DH3Negative electrode and DH4Anode be connected another interconnection point at input to commutator 101, whole Stream device 101 is from output node NIPulsating volage after place's one rectification of output.The outfan node N of commutator 101IWith reference ground Node NGNDBetween connect have input capacitance CIN, electric main AC first passes through input after being rectified by bridge rectifier 101 Electric capacity CINPulsating volage, electric capacity C is obtained again after filteringINHigh-frequency Interference ripple can be filtered.
Seeing Fig. 5, a BUCK type voltage step-down main circuit to include a main switch MSWIWith a fly-wheel diode DLOW, note being replaced by a synchro switch, say, that main switch MSWIOne that is equivalent to BUCK circuit high End power switch and sustained diodeLOW(or synchro switch) is then equivalent to a low side continued flow component accordingly, is leading Switching tube MSWIThe stage input voltage V connectedINFrom flow direction load at main switch MSWIThe stage current turned off continues from low side Fluid element continues for flowing to load, and each switch periods of BUCK type voltage step-down circuit so circulates, thus utilizes defeated Enter voltage VINRunning voltage and/or electric current is provided to load.
See Fig. 5, main switch MSWIThe first end (drain electrode of such as NMOS tube) receive input voltage VINAnd the second end (source electrode of such as NMOS tube) and reference ground node NGNDBetween connect that to have a continued flow component (be with fly-wheel diode in Fig. 5 DLOWAs a example by), and the voltage output node N of BUCK reduction voltage circuitOWith main switch MSWIThe second end between be in series with a sense Answer resistance RCSWith an inductance L.The output voltage V of BUCK reduction voltage circuitOUTOutput is at output node NOPlace, thus for loading RL Or other loads provide running voltage.Generally also can be at output node NOWith reference ground node NGNDBetween connect one output electricity Hold COUTCarry out regulated output voltage VOUTReduce ripple.
See Fig. 5, main switch MSWIAnd sustained diodeLOWIt is interconnected to an intermediate node NM, note it being afterflow two pole Pipe DLOWAnode link with reference to ground node NGNDNegative electrode then links intermediate node NM.If it addition, sustained diodeLOWBy one Individual synchro switch replaces, then the first end of synchro switch links intermediate node NMSecond end is then linked with reference to ground node NGND.Sense Answer resistance RCSIt is connected on intermediate node N with an inductance LM(intermediate node NMNamely main switch MSWIThe second end) with output Node NOBetween, inductive reactance RCSOne end link intermediate node NM, inductive reactance RCSOne end of opposite other end and inductance L It is connected in an interconnecting nodes NS, the opposite other end of inductance L links output node NO, interconnecting nodes NSDetermined in this application Justice is floating ground node NREF, it should be noted that floating ground node NREFThe electromotive force of (floating GND) and reference ground node NGNDThe electromotive force of (reference GND) is relatively independent electromotive force respectively, and their current potential also differs, with reference to ground node NGND May be considered again the systematically current potential of whole BUCK circuit.
See Fig. 5, it is contemplated that inductive reactance RCSIt is connected between node NMWith floating ground node NREFBetween, so in Intermediate node NMThe magnitude of voltage that detection obtains is substantially equal to across at inductive reactance RCSTwo ends relative to floating ground node NREF's Sampled voltage, a scheme of the application is exactly at main switch MSWIThe second end (node NMPlace) and this floating ground node NREF Between capture inductive reactance RCSThe sampled voltage V at two endsSENSE.One error amplifier 103 is by this sampled voltage VSENSEWith one Basis reference voltage VREFAfter relatively amplifying, the result of error amplifier 103 exports at a first electric capacity CCOMPOn, Qi Zhong One electric capacity CCOMPIt is connected to outfan and this floating ground node N of error amplifier 103REFBetween.First electric capacity CCOMPOn flat All sawtooth waveforms of magnitude of voltage and agitator 102 output are compared by a pwm comparator 104, produce Pulse width modulating signal PWM be coupled to main switch MSWIControl end such as grid, it is therefore an objective to make main switch MSWIOften ON time T in individual switch periodsONKeep constant.The operation principle of this BUCK circuit framework is constant power switching tube MSWI Opening time, make the inductive current peak of inductance L with input voltage VINChange and change, and at power switch pipe MSWI's ON time TONThe input current I of interior blood pressure lowering BUCK circuitINWith the electric current I flowing through inductance LLEqual, so input current IINAlso Can be along with input voltage VINChange in sine wave, thus realize PFC function, now it is believed that input current IINWith voltage VINBase This is with frequency homophase, so that the active power maximization drawn from alternating current power supply AC.Specific works mechanism process is as follows: this faradism Resistance RCSThe inductive current of sampling inductance L, VSENSECharacterize inductive current IL, be equivalent to be capable of detecting when the rising of inductive current with Decline process, error amplifier 103 is by sampled voltage VSENSEWith reference voltage VREFExporting after comparing and enlarging, error is amplified The voltage of device 103 output is maintained at the first electric capacity CCOMPOn.The external bulky capacitor of outfan of error amplifier 103 namely One electric capacity CCOMP, the outputting inductance electric current also will sampled is averaged, it is ensured that the first electric capacity CCOMPThe first end on average voltage Value VCOMPConstant, the first electric capacity CCOMPThe first end be coupling in error amplifier 103 outfan and its second relative end is connected in Floating ground node NREF, so that main switch MSWIAt each switch periods ON time TONIt is held essentially constant.
See Fig. 5, although pulse width modulating signal PWM can directly determine main switch MSWITurn on and off shape State, but in an optional nonessential embodiment, pulse width modulating signal PWM is not directly coupled to main switch MSWIControl end, it practice, pulse width modulating signal PWM is first and the protection signal S of protection circuit 107 outputPSimultaneously Input is to a logical block 105, and logical block 105 can be with various logic door.The most only meet modulated signal PWM and Protection signal SPWhen having the first logic state (such as high level), the signal of this logical block 105 output just can connect master simultaneously Switching tube MSWIIf, and protect signal SPWhen being the second logic state (such as low level), no matter modulated signal PWM is high level Or the signal that low level causes logical block 105 to export all is not turned on main switch MSWI.Protection circuit 107 has multiple guarantor Protection mechanism, the application is using as the embodiment demonstrated but be not construed as limiting to explain this point.Such as protection circuit 107 can possess Under-voltage protection function and over-voltage protecting function, be mainly reflected in the defencive function of whole voltage conversion system: work as protection circuit The under-voltage monitoring modular of 107 detects the input voltage V of voltage conversion circuitINTime too low, even than a under-voltage protection threshold value The lowest, then protection circuit 107 triggers and produces the protection signal S with the second logic stateP1So that the output of logical block 105 Signal e.g. low level and be not turned on the main switch M that grid voltage could turn under the conditions of high levelSWI, thus close Disconnected main switch MSWI, prevent whole voltage conversion system to be operated in low-pressure state.Further for example, the overvoltage monitoring of protection circuit 107 The module output voltage V to change-over circuitOUTIt is monitored, once as output voltage VOUTTime too high, even predetermined than one Threshold voltage value is taller, then protection circuit 107 triggers and produces the protection signal S with the second logic stateP2So that logic list Unit 105 output signal e.g. low level and be not turned on main switch MSWI, thus main switch can be timely after being turned off Drag down output voltage VOUTProtect load RL.It should be noted that in teachings herein, the under-voltage monitoring of protection circuit 107 Module (Under Voltage Protect) and overvoltage monitoring modular (Over Voltage Protect) are only merely the application Example illustrated, protection circuit 107 can also have other defencive function.In a word, pulse width modulation is only met Signal PWM and protection signal SPWhen having the first logic state, the output result of logical block 105 just has and can drive simultaneously Switching tube MSWIConnecting, such as logical block 105 is output as the first logic state.
Seeing Fig. 5, in another optional nonessential embodiment, pulse width modulating signal PWM does not has direct coupling Close main switch MSWIControl end, it practice, pulse width modulating signal PWM is first and a current over-zero detector unit 108 The current detection signal S of outputDBeing simultaneously entered to a logical block 105, logical block 105 can be with various logic door. Only meet modulated signal PWM and current detection signal SDWhen there is the first logic state (such as high level) simultaneously, this logic list The signal of unit 105 output just can connect main switch MSWIIf, and current detection signal SDIt is that the second logic state is (such as low electricity Flat) time, modulated signal PWM is high level or the signal that low level all can cause logical block 105 to export all cannot connect Logical main switch MSWI.The Main Function of current over-zero detector unit 108 is that the electric current of detection inductance L the most reversely there occurs electricity The phenomenon that stream pours in down a chimney.In BUCK type dc-dc, according to the difference of rectifier system, synchronous rectification pattern and different can be divided into Step rectification mode.For asynchronous rectified Mode B UCK transducer, owing to using diode DLOWCarry out afterflow, can produce relatively Big conduction loss also reduces the efficiency of system.And synchronous rectification pattern is during afterflow, synchronous rectifier works in deep line Property district, conduction loss is extremely low, it is possible to be greatly enhanced system effectiveness.But when working in light condition, if synchronizing whole Can not be shut off promptly when flow tube freewheel current is zero, then system effectiveness can greatly reduce, and may make system damage. Therefore, it is necessary for a high accuracy of BUCK converter design, the zero cross detection circuit of low-power consumption.
See Fig. 5, mentioned above only at pulse width modulating signal PWM and current detection signal SDHave first simultaneously During logic state, the output result of logical block 105 just drives switching tube MSWIConnecting, such as logical block 105 is output as the One logic state.Here current detection signal SDIt is the first logic state under what conditions, depends on that current over-zero detection is single The electric current that unit 108 monitors inductance L is the most reverse, and the electric current of inductance L should be from interconnecting nodes N under normal operationSForward Flow to output node NOBut, if it occur that the electric current that electric current pours in down a chimney then inductance L may be from output node NOIt is reverse flowed to interconnection Node NS.The most reverse in order to detect the electric current of inductance L, first end of inductance L and inductive reactance RCSIt is connected in this interconnecting nodes mutually NS, (i.e. L links output node N to the opposite second end of inductance LOThat one end) with floating ground node NREFBetween connect have one Potentiometer, potentiometer includes resistance RD1And RD2, wherein resistance RD1And RD2Between interconnection point namely partial pressure value sampling node place The partial pressure value feedback of sampling is transported to current over-zero detector unit 108.As a more succinct detection method, current over-zero is examined Survey unit 108 and can compare floating ground node NREFThe actual potential at place and resistance RD1And RD2Between interconnection point at partial pressure value Current potential, typically, if the electric current of inductance L is forward, floating ground node NREFThe actual potential at place is more than resistance RD1And RD2 Between partial pressure potential, if the electric current of contrary inductance L is for reversely to pour in down a chimney, floating ground node N can be causedREFThe actual potential at place Less than resistance RD1And RD2Between partial pressure potential, in the current zero-crossing point moment tending to the event of pouring in down a chimney, can attempt to reduce The current detection signal S of current over-zero detector unit 108 outputDThe dutycycle reduced within each cycle, namely be equivalent to patrol The dutycycle of the output result collecting unit 105 also reduces, so main switch MSWIThe time connected within each cycle shortens And make output node NOThe energy of output reduces, and avoids electric current to pour in down a chimney.
See Fig. 5, in another embodiment, only at pulse width modulating signal PWM, protection signal SPExamine with electric current Survey signal SDWhen three has the first logic state simultaneously, the output result of logical block 105 can drive main switch MSWI Connect, such as main switch MSWIOutput signal has the first logic state and drives main switch MSWIConnect.Equally, real at this Execute in example, if BUCK circuit is in the current zero-crossing point moment tending to the event of pouring in down a chimney, can attempt to reduce current over-zero inspection Survey the current detection signal S of unit 108 outputDThe dutycycle reduced within each cycle, namely be equivalent to logical block 105 The dutycycle of output result also reduces, so main switch MSWIThe time connected within each cycle shortens and reduces BUCK The energy output of circuit.
See Fig. 5, the transistor driving ability of the output result of pulse width modulating signal PWM or logical block 105 May be not, in order to increase their driving force, the result of logical block 105 output is increased by a drive circuit 106 After driving force, then the output signal of drive circuit is coupled to main switch MSWIControl end.To those skilled in the art For Yuan, drive circuit 106 belongs to prior art, and therefore it will not go into details.
See Fig. 5, in one embodiment, there is following calculated relationship: input voltage VIN=VP× sin (ω t), its Middle VPFor the alternating current AC half crest value after commutator 101 rectification, and ω is the angular velocity of pulsating volage half waveform, t It it is the time.Flow through the electric current i of inductance LLP=VP×TON× sin (ω t)/L, wherein TONIt is main switch MSWIIn each switch week ON time in phase, L is inductance value.
See Fig. 5, flow through the electric current i of inductanceLP=ILP× sin (ω t), flows through the inductance peak point current of inductance L here Maximum ILP=VP×TON/ L, arranges ON time Ton constant thus clamped down on by inductive current peak and become one in this application Individual SIN function, so the maximum I of inductance peak point currentLPAlong with input voltage VINIn sine wave change and therewith in sine Fluctuation and thereby realize power factor PFC from dynamic(al) correction.
See the output average current I of Fig. 5, BUCK voltage-dropping type change-over circuitOUT_AVGSize is by sampling resistor RCSResistance Value RCSValue V with basis reference voltageREFDetermine, the sampled voltage V at sampling resistor two ends in approximate calculationSENSEMeansigma methods VSENSE_AVGAnd VREFOf substantially equal: IOUT_AVG=VSENSE_AVG/RCS≈VREF/RCS.Maximum from relational expression inductance peak point current ILP=VP×TON/ L understands and works as TONTime constant, inductive current peak is also a SIN function, defeated after pfc circuit shaping Enter voltage VINWith input current IINWaveform as shown in Figure 6, input current IINAlong with input voltage VINChange present sine wave Change, input current IINFollow VINChange, has preferable PF value.
In sum, due to the output voltage V of error amplifier 103COMPDirectly reflect the output electric current of BUCK circuit Change, voltage VCOMPA pwm signal cycle at input voltage is produced compared with the sawtooth waveforms of agitator 102 output Regulation ON time T in (10mS for example with as demonstration)ONControl to export size of current.When output current peak is with defeated Enter voltage VINWhen becoming big, the V of error amplifier 103 outputCOMPVoltage tends to diminishing;And when exporting electric current and being in trough, VCOMPVoltage tends to increasing, and regulates ON time TONEnsure that the average current size of output total system is constant.By above-mentioned principle Analysis obtains, external electric capacity CCOMPCapacitance the biggest to VCOMPVoltage cycle fluctuation amplitude is the least, thus the output of system is electric Stream IOUTFluctuate the least, V simultaneouslyCOMPIn cycle, change is the least, and in the time cycle, ON time is the most constant, to high PF It is worth the most helpful.In view of system bandwidth and stability, electric capacity C in native system designCOMPCan be with value 1uF.This application is relative It is that it passes through output electric current I in the difference that conventional active PFC is maximumOUTDirectly compare generation with sawtooth waveforms after amplifier Pwm control signal, the method that instead of sampled input voltage, and abandoned utilize multiplier make export current following input electricity Buckling.Utilize error amplifier and external bulky capacitor CCOMPIt is simultaneously achieved high PFC and constant current function, so that circuit sets Count the most simple and reliable, save chip area, need not sampling busbar voltage in addition and decrease the application of peripheral component Reduce cost.Need not multiplier, realize high PF value and output constant current function simultaneously, circuit design is simple, and reliability is high, is System cost reduces.
Above, by explanation and accompanying drawing, the exemplary embodiments of the ad hoc structure of detailed description of the invention, foregoing invention are given Propose existing preferred embodiment, but these contents are not intended as limitation.For a person skilled in the art, in reading State bright after, various changes and modifications will be apparent to undoubtedly.Therefore, appending claims should be regarded as and contains the present invention True intention and whole variations and modifications of scope.In Claims scope, the scope of any and all equivalence is with interior Hold, be all considered as still belonging to the intent and scope of the invention.

Claims (10)

1. one kind can realize the power factor voltage conversion circuit from dynamic(al) correction, it is characterised in that alternating current is whole by commutator Pulsating volage after stream as an input voltage, the first end of the main switch of a reduction voltage circuit receive input voltage and the Two ends and one have a continued flow component with reference to connecting between ground node, and the voltage output node of reduction voltage circuit and main switch The second end between be in series with an inductive reactance and an inductance;
An interconnecting nodes between this inductive reactance and this inductance is defined as floating ground node, main switch the second end with Capture the sampled voltage at these inductive reactance two ends between this floating ground node, and error amplifier by this sampled voltage and One basis reference voltage ratio exports on first electric capacity after relatively amplifying, and wherein the first electric capacity is connected to error amplifier Between outfan and this floating ground node;
Average voltage level and the sawtooth waveforms of an agitator output on first electric capacity pass through a pwm comparator Comparing, the pulse width modulating signal of generation is coupled to main switch and controls end, arranges main switch in each switch week ON time in phase keeps constant.
Voltage conversion circuit the most according to claim 1, it is characterised in that the outfan of described commutator and described reference Connecting between ground node and have an input capacitance, alternating current is by obtaining after first passing through input capacitance filtering after rectifier rectification again Pulsating volage.
Voltage conversion circuit the most according to claim 1, it is characterised in that pulse width modulating signal and a protection electricity The protection signal of road output is simultaneously entered to a logical block, only has at pulse width modulating signal and protection signal simultaneously When having the first logic state, the output result of logical block just drives switching tube to connect.
Voltage conversion circuit the most according to claim 1, it is characterised in that pulse width modulating signal and an electric current mistake The current detection signal of zero detector unit output is simultaneously entered to this logical block, only at pulse width modulating signal and When current detection signal has the first logic state simultaneously, the output result of logical block just drives switching tube to connect;
Current over-zero detector unit is when monitoring inductive current and tending to reverse, then current over-zero detector unit reduces current detecting Signal dutycycle in each switch periods.
Voltage conversion circuit the most according to claim 4, it is characterised in that the first end of inductance is connected in mutually with inductive reactance This interconnecting nodes, is connected between the opposite second end of inductance with floating ground node and has a potentiometer;
Current over-zero detector unit captures a dividing potential drop from potentiometer, and by contrasting the current potential of this dividing potential drop and floating ground node Monitor whether inductive current there occurs reversely.
6. according to the voltage conversion circuit described in claim 3 or 4, it is characterised in that the result of logical block output is by one The output signal of drive circuit is coupled to the control end of main switch by individual drive circuit again after increasing driving force.
Voltage conversion circuit the most according to claim 1, it is characterised in that input voltage VIN=VP× sin (ω t), its Middle VPFor the alternating current half crest value after over commutation, and ω is the angular velocity of half waveform, and t is the time;And
Flow through the electric current i of inductanceLP=VP×TON× sin (ω t)/L, wherein TONIt is main switch leading in each switch periods The logical time, L is inductance value.
Voltage conversion circuit the most according to claim 7, it is characterised in that flow through the electric current i of inductanceLP=ILP×sin(ω T), the maximum I of the inductance peak point current of inductance is flowed throughLP=VP×TON/ L, arranges ON time Ton constant thus inductance is electric Stream peak value is clamped down on and is become a SIN function, ILPWith input voltage VINThe change thereby realize oneself of power factor in sine wave Dynamic(al) correction.
Voltage conversion circuit the most according to claim 1, it is characterised in that the output average current size of reduction voltage circuit IOUT_AVGBy resistance R of sampling resistorCSValue V with basis reference voltageREFDetermine, it is achieved the output being supplied to load is the most electric Flow constant:
IOUT_AVG=VSENSE_AVG/RCS≈VREF/RCS
Voltage conversion circuit the most according to claim 1, it is characterised in that continued flow component is attached to main switch A synchro switch between two ends and reference ground node or diode;
When continued flow component is synchro switch, synchro switch and main switch are alternately connected in each switch periods, and they Can not be also turned on, in order to when main switch turns off in each switch periods, synchro switch can be inductance afterflow;
When continued flow component is diode, diode anode links reference ground node and negative electrode links main switch the second end, in order to When main switch turns off in each switch periods, diode can be inductance afterflow.
CN201610826245.9A 2016-09-18 2016-09-18 Voltage conversion circuit realizing automatic power factor correction Pending CN106329906A (en)

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