CN105655967A - Overcurrent protection circuit - Google Patents
Overcurrent protection circuit Download PDFInfo
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- CN105655967A CN105655967A CN201410639141.8A CN201410639141A CN105655967A CN 105655967 A CN105655967 A CN 105655967A CN 201410639141 A CN201410639141 A CN 201410639141A CN 105655967 A CN105655967 A CN 105655967A
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- electric capacity
- voltage
- detecting unit
- current
- inductance
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Abstract
The invention discloses an overcurrent protection circuit. The overcurrent protection circuit comprises a controller, an inductor, a resistor, a first capacitor and a second capacitor. The controller comprises a first detection unit, a second detection unit and an overcurrent protection unit. The first detection unit is used for detecting first voltages of the first capacitor and outputting the first voltages to the overcurrent protection unit. The second detection unit is used for detecting second voltages of the first capacitor and outputting the second voltages to the overcurrent protection unit. The overcurrent protection unit, according to the received first voltages, the second voltages and resistance values of DC resistance of the inductor, calculates a first current value and a second current value and compares the first current value and the second current value with corresponding reference values so as to start an overcurrent protection mode when the first current value or the second current value exceeds the corresponding reference values. The overcurrent protection circuit provided by the invention can perform overcurrent protection on forward currents and reverse currents flowing through the inductor.
Description
Technical field
The present invention relates to a kind of current foldback circuit.
Background technology
Electronics (such as server) although power-supply system in be provided with overcurrent protection module, but this overcurrent protection module just starts overcurrent protection pattern to be protected by electronics when forward current is excessive. Therefore, when negative current is excessive, electronics is it is possible to damaged.
Summary of the invention
In view of foregoing, it is necessary to provide a kind of current foldback circuit that forward current and negative current are all carried out overcurrent protection.
A kind of current foldback circuit, comprise a voltage transformation module, one controller, one inductance, one resistance, one first electric capacity and one the 2nd electric capacity, described controller comprises one first detecting unit, one the 2nd detecting unit and an over-current protecting unit, described inductance and described first electric capacity include a first end and one the 2nd end, first and second detecting unit described includes one first input terminus, one the 2nd input terminus and an output terminal, the first end of described inductance is connected with described voltage transformation module, 2nd end of described inductance is by described 2nd electric capacity ground connection, the first end of described first electric capacity is connected with the first end of described inductance by described resistance, 2nd end of described first electric capacity is connected with the 2nd end of described inductance, first input terminus of described first detecting unit is connected with the first end of described first electric capacity, 2nd input terminus of described first detecting unit is connected with the 2nd end of described first electric capacity, first input terminus of described 2nd detecting unit is connected with the 2nd end of described first electric capacity, 2nd input terminus of described 2nd detecting unit is connected with the first end of described first electric capacity, the output terminal of first and second detecting unit described is all connected with described over-current protecting unit, when the voltage of the first end of described first electric capacity that the first input terminus of described first detecting unit receives is greater than the voltage of the 2nd end of described first electric capacity that the 2nd input terminus of described first detecting unit receives, described first detecting unit is started working, the voltage of the first end of described first electric capacity is subtracted the voltage of the 2nd end of described first electric capacity by described first detecting unit, to obtain one first voltage, and described first voltage is exported to described over-current protecting unit from the output terminal of described first detecting unit, when the voltage of the 2nd end of described first electric capacity that the first input terminus of described 2nd detecting unit receives is greater than the voltage of first end of described first electric capacity that the 2nd input terminus of described 2nd detecting unit receives, described 2nd detecting unit is started working, the voltage of the first end of described first electric capacity is subtracted the voltage of the 2nd end of described first electric capacity by described 2nd detecting unit, to obtain one the 2nd voltage, and described 2nd voltage is exported to described over-current protecting unit from the output terminal of described 2nd detecting unit, described over-current protecting unit calculates one first current value according to the resistance value of the first voltage received and the direct current resistance of described inductance, and described first current value is compared with one first reference value, and when described first current value is greater than described first reference value start overcurrent protection pattern, described over-current protecting unit calculates one the 2nd current value according to the resistance value of the 2nd voltage received and the direct current resistance of described inductance, and described 2nd current value is compared with one the 2nd reference value, and when described 2nd current value is less than described 2nd reference value start overcurrent protection pattern.
Current foldback circuit of the present invention detects the voltage at described first electric capacity two ends by described first detecting unit and described 2nd detecting unit, and calculated according to the resistance value of the voltage received and the direct current resistance of described inductance by described over-current protecting unit and flow through the described forward current of inductance and the current value of negative current, and the current value of the forward current calculated and negative current is compared with corresponding reference value respectively, to start overcurrent protection pattern when forward current or negative current overcurrent, thus the forward current and negative current flowing through described inductance has all been carried out overcurrent protection.
Accompanying drawing explanation
In conjunction with better embodiment, the present invention is described in further detail with reference to the accompanying drawings:
Fig. 1 is the functional block diagram of the better embodiment of current foldback circuit of the present invention.
Main element nomenclature
| Current foldback circuit | 100 |
| Voltage transformation module | 10 |
| Driving chip | 12 |
| Controller | 20 |
| First detecting unit | 22 |
| 2nd detecting unit | 24 |
| Sum unit | 26 |
| Over-current protecting unit | 28 |
| Load | 30 |
| Inductance | L1 |
| Resistance | R1 |
| First electric capacity | C1 |
| 2nd electric capacity | C2 |
Following embodiment will illustrate the present invention further in conjunction with above-mentioned accompanying drawing.
Embodiment
Please refer to Fig. 1, the better embodiment of current foldback circuit 100 of the present invention comprises voltage transformation module 10, controller 20, inductance L 1, resistance R1, one first electric capacity C1 and the 2nd electric capacity C2.
Described voltage transformation module 10 comprises driving chip 12,1 first electronic switch Q1 and a 2nd resistance switch Q2. Described driving chip 12 comprises one first driving pin HG, one a 2nd driving pin LG and phase pin PHASE. Described first electronic switch Q1 and described 2nd electronic switch Q2 includes a first end, one the 2nd end and one the 3rd end. The first end of described first electronic switch Q1 is connected with the first driving pin HG of described driving chip 12. 2nd end of described first electronic switch Q1 is connected with a power supply Vin. 3rd end of described first electronic switch Q1 is by described inductance L 1 and described 2nd electric capacity C2 ground connection. The first end of described 2nd electronic switch Q2 is connected with the 2nd driving pin LG of described driving chip 12. 2nd end of described 2nd electronic switch Q2 is connected with the 3rd end of described first electronic switch Q1 and phase pin PHASE with described driving chip 12 is connected. The 3rd end ground connection of described 2nd electronic switch Q2. Node between described inductance L 1 and described 2nd electric capacity C2 is connected with a load 30, for powering to described load 30.
Described controller 20 comprises one first detecting unit 22, the 2nd detecting unit 24, sum unit 26 and an over-current protecting unit 28. Described inductance L 1 and described first electric capacity C1 include a first end and one the 2nd end. Described first detecting unit 22 and described 2nd detecting unit 24 include one first input terminus CS+, one a 2nd input terminus CS-and output terminal OUT. The first end of described inductance L 1 is connected with described voltage transformation module 10. 2nd end of described inductance L 1 is by described 2nd electric capacity C2 ground connection. The first end of described first electric capacity C1 is connected by the first end of described resistance R1 with described inductance L 1. 2nd end of described first electric capacity C1 is connected with the 2nd end of described inductance L 1. First input terminus CS+ of described first detecting unit 22 is connected with the first end of described first electric capacity C1. 2nd input terminus CS-of described first detecting unit 22 is connected with the 2nd end of described first electric capacity C1. First input terminus CS+ of described 2nd detecting unit 24 is connected with the 2nd end of described first electric capacity C1. 2nd input terminus CS-of described 2nd detecting unit 24 is connected with the first end of described first electric capacity C1. The output terminal OUT of described first detecting unit 22 and described 2nd detecting unit 24 is all connected with described over-current protecting unit 28 by described sum unit 26.
First voltage of described first detecting unit 22 for detecting between the first end of described first electric capacity C1 and the 2nd end of described first electric capacity C1, two voltage of described 2nd detecting unit 24 for detecting between the first end of described first electric capacity C1 and the 2nd end of described first electric capacity C1. In the present embodiment, described first detecting unit 22 and described 2nd detecting unit 24 are subtractor. When the input value of the first input terminus CS+ of described first detecting unit 22 is greater than the input value of the 2nd input terminus CS-of described first detecting unit 22, described first detecting unit 22 is started working and is subtracted the input value of described 2nd input terminus CS-by the input value of described first input terminus CS+. When the input value of the first input terminus CS+ of described 2nd detecting unit 24 is greater than the input value of the 2nd input terminus CS-of described 2nd detecting unit 24, described 2nd detecting unit 24 is started working and is subtracted the input value of described 2nd input terminus CS-by the input value of described first input terminus CS+. In other embodiments, the output terminal OUT of described first detecting unit 22 and described 2nd detecting unit 24 all can directly be connected with described over-current protecting unit 28.
In the present embodiment, the resistance value DCR(directcurrentresistance of the inductance value L of described inductance L 1, the direct current resistance of described inductance L 1), the capacitance C of the resistance value R and described first electric capacity C1 of described resistance R1 meet equation L/DCR=R*C(equation 1). By electricity knowledge it will be seen that the voltage V of described inductance L 1L=IL* (S*L+DCR) (equation 2), wherein, ILFor the electric current of described inductance L 1, the voltage V of described first electric capacity C1C=VL* { [1/ (S*C)]/[R+1/ (S*C)] } (equation 3). Equation 1 and equation 2 are substituted into equation 3 and can obtain VC=IL* DCR(equation 4). Due to the voltage V of the direct current resistance of described inductance L 1DCR=IL* DCR(equation 5), therefore, by equation 4 and equation 5 it will be seen that the voltage of the direct current resistance equaling described inductance L 1 of the voltage of described first electric capacity C1.
During work, the first driving pin HG and the 2nd driving pin LG of described driving chip 12 alternately exports high low level signal alternately to control conducting and the cut-off of described first electronic switch Q1 and described 2nd electronic switch Q2. When the first driving pin HG of described driving chip 12 exports high level signal and the 2nd driving pin LG exports low level signal, described first electronic switch Q1 conducting, described 2nd electronic switch Q2 cut-off, described power supply Vin charges to described inductance L 1 and described 2nd electric capacity C2 by described first electronic switch Q1. When the first driving pin HG of described driving chip 12 exports low level signal and the 2nd driving pin LG exports high level signal, described first electronic switch Q1 cut-off, described 2nd electronic switch Q2 conducting, described inductance L 1 and described 2nd electric capacity C2 are by described 2nd electronic switch Q2 electric discharge. So go round and begin again so that it is described load supplying that the node between described inductance L 1 and described 2nd electric capacity C2 exports a stable voltage Vout.
When described power supply Vin charges to described inductance L 1 and described 2nd electric capacity C2 by described first electronic switch Q1, electric current flows to the 2nd end (forward current) of described inductance L 1 from the first end of described inductance L 1. The voltage of the first end of described first electric capacity C1 is greater than the voltage of the 2nd end of described first electric capacity C1, the input value of the first input terminus CS+ of described first detecting unit 22 is greater than the input value of the 2nd input terminus CS-of described first detecting unit 22, and described first detecting unit 22 is started working. The voltage of the first end of the described first electric capacity C1 that described first input terminus CS+ is received by described first detecting unit 22 subtracts the voltage of the 2nd end of the described first electric capacity C1 that described 2nd input terminus CS-receives, with the first voltage (the i.e. voltage of described first electric capacity C1 obtained between the first end of described first electric capacity C1 and the 2nd end of described first electric capacity C1, described voltage is for being just worth), and described first voltage is exported to described sum unit 26 from the output terminal OUT of described first detecting unit 22. The input value of the first input terminus CS+ of described 2nd detecting unit 24 is less than the input value of the 2nd input terminus CS-of described 2nd detecting unit 24, and described 2nd detecting unit 24 does not work, the output terminal OUT no-output of described 2nd detecting unit 24. Now, described sum unit 26 receives only the first voltage that described first detecting unit 22 exports, and after summation operation, what described sum unit 26 exported to described over-current protecting unit 28 is still described first voltage. Described over-current protecting unit 28 calculates one first current value according to the resistance value of the first voltage received and the direct current resistance of described inductance L 1 and (namely flows through the current value of the forward current of described inductance L 1; described current value is for being just worth); and compared with one first reference value (overcurrent value of forward current) by described first current value, and start overcurrent protection pattern when described first current value is greater than described first reference value. Described overcurrent protection pattern is known techniques, therefore, the particular content of described overcurrent protection pattern is not described in detail at this.
When described inductance L 1 and described 2nd electric capacity C2 are discharged by described 2nd electronic switch Q2, electric current flows to the electric current (negative current) of the first end of described inductance L 1 from the 2nd end of described inductance L 1. The voltage of the 2nd end of described first electric capacity C1 is greater than the voltage of the first end of described first electric capacity C1, the input value of the first input terminus CS+ of described first detecting unit 22 is less than the input value of the 2nd input terminus CS-of described first detecting unit 22, described first detecting unit 22 does not work, the output terminal OUT no-output of described first detecting unit 22. The input value of the first input terminus CS+ of described 2nd detecting unit 24 is greater than the input value of the 2nd input terminus CS-of described 2nd detecting unit 24, and described 2nd detecting unit 24 is started working. The voltage of the first end of the described first electric capacity C1 that described 2nd input terminus CS-is received by described 2nd detecting unit 24 subtracts the voltage of the 2nd end of the described first electric capacity C1 that described first input terminus CS+ receives, with the 2nd voltage (the i.e. voltage of described first electric capacity C1 obtained between the first end of described first electric capacity C1 and the 2nd end of described first electric capacity C1, described voltage is negative value), and described 2nd voltage is exported to described sum unit 26 from the output terminal OUT of described 2nd detecting unit 24. Now, described sum unit 26 receives only the 2nd voltage that described 2nd detecting unit 24 exports, and after summation operation, what described sum unit 26 exported to described over-current protecting unit 28 is still described 2nd voltage. Described over-current protecting unit 28 calculates one the 2nd current value according to the resistance value of the 2nd voltage received and the direct current resistance of described inductance L 1 and (namely flows through the current value of the negative current of described inductance L 1; described current value is negative value); and compared with one the 2nd reference value (overcurrent value of negative current) by described 2nd current value, and start overcurrent protection pattern when described 2nd current value is less than described 2nd reference value.
In the present embodiment, described first electronic switch Q1 and described 2nd electronic switch Q2 is NMOS field effect transistor, and the first end of described first electronic switch Q1 and described 2nd electronic switch Q2, the 2nd end and the 3rd end correspond respectively to the grid of described NMOS field effect transistor, drain electrode and source electrode. In other embodiments, described first electronic switch Q1 and described 2nd electronic switch Q2 all can be replaced NPN type triode and other switch with identical function.
Current foldback circuit 100 of the present invention detects the voltage at described first electric capacity C1 two ends by described first detecting unit 22 and described 2nd detecting unit 24, and calculated according to the resistance value of the magnitude of voltage received and the direct current resistance of described inductance L 1 by described over-current protecting unit 28 and flow through the described forward current of inductance L 1 and the current value of negative current, and the current value of the forward current calculated and negative current is compared with corresponding reference value respectively, to start overcurrent protection pattern when forward current or negative current overcurrent, thus the forward current and negative current flowing through described inductance L 1 has all been carried out overcurrent protection.
Claims (6)
1. a current foldback circuit, comprise a voltage transformation module, one controller, one inductance, one resistance, one first electric capacity and one the 2nd electric capacity, described controller comprises one first detecting unit, one the 2nd detecting unit and an over-current protecting unit, described inductance and described first electric capacity include a first end and one the 2nd end, first and second detecting unit described includes one first input terminus, one the 2nd input terminus and an output terminal, the first end of described inductance is connected with described voltage transformation module, 2nd end of described inductance is by described 2nd electric capacity ground connection, the first end of described first electric capacity is connected with the first end of described inductance by described resistance, 2nd end of described first electric capacity is connected with the 2nd end of described inductance, first input terminus of described first detecting unit is connected with the first end of described first electric capacity, 2nd input terminus of described first detecting unit is connected with the 2nd end of described first electric capacity, first input terminus of described 2nd detecting unit is connected with the 2nd end of described first electric capacity, 2nd input terminus of described 2nd detecting unit is connected with the first end of described first electric capacity, the output terminal of first and second detecting unit described is all connected with described over-current protecting unit, when the voltage of the first end of described first electric capacity that the first input terminus of described first detecting unit receives is greater than the voltage of the 2nd end of described first electric capacity that the 2nd input terminus of described first detecting unit receives, described first detecting unit is started working, the voltage of the first end of described first electric capacity is subtracted the voltage of the 2nd end of described first electric capacity by described first detecting unit, to obtain one first voltage, and described first voltage is exported to described over-current protecting unit from the output terminal of described first detecting unit, when the voltage of the 2nd end of described first electric capacity that the first input terminus of described 2nd detecting unit receives is greater than the voltage of first end of described first electric capacity that the 2nd input terminus of described 2nd detecting unit receives, described 2nd detecting unit is started working, the voltage of the first end of described first electric capacity is subtracted the voltage of the 2nd end of described first electric capacity by described 2nd detecting unit, to obtain one the 2nd voltage, and described 2nd voltage is exported to described over-current protecting unit from the output terminal of described 2nd detecting unit, described over-current protecting unit calculates one first current value according to the resistance value of the first voltage received and the direct current resistance of described inductance, and described first current value is compared with one first reference value, and when described first current value is greater than described first reference value start overcurrent protection pattern, described over-current protecting unit calculates one the 2nd current value according to the resistance value of the 2nd voltage received and the direct current resistance of described inductance, and described 2nd current value is compared with one the 2nd reference value, and when described 2nd current value is less than described 2nd reference value start overcurrent protection pattern.
2. current foldback circuit as claimed in claim 1; it is characterized in that: the capacitance C of the inductance value L of described inductance, the resistance value DCR of the direct current resistance of described inductance, the resistance value R of described resistance and described first electric capacity meets equation L/DCR=R*C, so that the voltage of described first electric capacity equals the voltage of the direct current resistance of described inductance.
3. current foldback circuit as claimed in claim 1, it is characterised in that: first and second detecting unit described is subtractor.
4. current foldback circuit as claimed in claim 3; it is characterized in that: described controller also comprises a sum unit; the output terminal of first and second detecting unit described is all connected with the described protection unit that flows through by described sum unit; after the signal that the output terminal of first and second detecting unit described exports is carried out summation operation by described sum unit, the result of summation gained is exported to described over-current protecting unit.
5. current foldback circuit as claimed in claim 1, it is characterized in that: described voltage transformation module comprises a driving chip, one first electronic switch and one the 2nd resistance switch, described driving chip comprises one first driving pin, one the 2nd driving pin and a phase pin, first and second electronic switch described includes a first end, one the 2nd end and one the 3rd end, the first end of described first electronic switch is connected with the first driving pin of described driving chip, 2nd end of described first electronic switch is connected with a power supply, 3rd end of described first electronic switch is by described inductance and described 2nd electric capacity ground connection, the first end of described 2nd electronic switch is connected with the 2nd driving pin of described driving chip, 2nd end of described 2nd electronic switch is connected with the 3rd end of described first electronic switch and phase pin with described driving chip is connected, 3rd end ground connection of described 2nd electronic switch, first and second of described driving chip drives pin alternately to export high low level signal with the conducting of alternately control first and second electronic switch described and cut-off, when the first driving pin of described driving chip exports high level signal, when 2nd driving pin exports low level signal, described first electronic switch conducting, described 2nd electronic switch cut-off, described power supply gives described inductance and described 2nd capacitor charging by described first electronic switch, electric current flows to the 2nd end of described inductance from the first end of described inductance, the voltage of described first electric capacity first end is greater than the voltage of described first electric capacity the 2nd end, described first detecting unit is started working and the first voltage detected is exported to described over-current protecting unit, when the first driving pin of described driving chip exports low level signal, when 2nd driving pin exports high level signal, described first electronic switch cut-off, described 2nd electronic switch conducting, described inductance and described 2nd electric capacity are by described 2nd electronic switch electric discharge, electric current flows to the first end of described inductance from the 2nd end of described inductance, the voltage of described first electric capacity first end is less than the voltage of described first electric capacity the 2nd end, described 2nd detecting unit is started working and the 2nd voltage detected is exported to described over-current protecting unit.
6. current foldback circuit as claimed in claim 5; it is characterized in that: first and second electronic switch described is NMOS field effect transistor or a NPN type triode, the first end of first and second electronic switch described, the 2nd end and the 3rd end correspond respectively to the base stage of the grid of described NMOS field effect transistor, drain electrode and source electrode or described NPN type triode, collector electrode and emtting electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410639141.8A CN105655967A (en) | 2014-11-13 | 2014-11-13 | Overcurrent protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410639141.8A CN105655967A (en) | 2014-11-13 | 2014-11-13 | Overcurrent protection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN105655967A true CN105655967A (en) | 2016-06-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410639141.8A Pending CN105655967A (en) | 2014-11-13 | 2014-11-13 | Overcurrent protection circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106329906A (en) * | 2016-09-18 | 2017-01-11 | 浙江芯迈电子科技有限公司 | Voltage conversion circuit realizing automatic power factor correction |
| CN111367395A (en) * | 2020-03-08 | 2020-07-03 | 苏州浪潮智能科技有限公司 | Method and device for safely supplying power to CPU |
-
2014
- 2014-11-13 CN CN201410639141.8A patent/CN105655967A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106329906A (en) * | 2016-09-18 | 2017-01-11 | 浙江芯迈电子科技有限公司 | Voltage conversion circuit realizing automatic power factor correction |
| CN111367395A (en) * | 2020-03-08 | 2020-07-03 | 苏州浪潮智能科技有限公司 | Method and device for safely supplying power to CPU |
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Application publication date: 20160608 |