CN106299108A - Resistance-variable storing device and preparation method thereof - Google Patents
Resistance-variable storing device and preparation method thereof Download PDFInfo
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- CN106299108A CN106299108A CN201510271468.9A CN201510271468A CN106299108A CN 106299108 A CN106299108 A CN 106299108A CN 201510271468 A CN201510271468 A CN 201510271468A CN 106299108 A CN106299108 A CN 106299108A
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Abstract
The invention discloses a kind of resistance-variable storing device, the first electrode of being arranged on substrate including lamination successively, resistance change material layer, the second electrode, also include being spaced and be formed at the first electrode and resistive material bed boundary or/and conductive bumps array at the second electrode and resistive material bed boundary.This resistance-variable storing device passes through at the first electrode or/and the second electrode and the interface preparation hindering change material layer are evenly distributed and controlled conductive bumps array, electric field is made to concentrate on conductive bumps array, add the probability forming conductive channel at conductive bumps array, thus improve the stability of this resistance-variable storing device work, improve the homogeneity of resistance-variable storing device.The invention also discloses the preparation method of above-mentioned resistance-variable storing device, including: A, on substrate, prepare the first electrode, resistance change material layer, the step of the second electrode；B, at the first electrode and resistive material bed boundary or/and prepare the step of conductive bumps array at the second electrode and resistive material bed boundary.
Description
Technical field
The invention belongs to technical field of integrated circuits, specifically, relating to one, can to improve resistance-variable storing device equal
Resistance-variable storing device of one property and preparation method thereof.
Background technology
Resistance-variable storing device (RRAM) has simple in construction, read or write speed is fast, it is low in energy consumption to operate, it is close to store
Degree is greatly and existing CMOS (complementary metal oxide semiconductors (CMOS)) Technology is compatible, the most in proportion
The potentiality reduced are big, can realize the features such as multilevel storage, and therefore, it is the strong of general-purpose storage of future generation
Competitor.
Traditional resistance-variable storing device is typical sandwich structure: add one layer of resistive between upper and lower electrode
Material layer, its operation principle is to apply size or the different voltage of polarity at resistance change material layer two ends, controls
The resistance value of resistance change material layer is changed, to realize write and the erasing of data between high resistance and low resistance state.Quilt
The conductive filament theory being widely recognized as is thought, during resistive, and the Lacking oxygen in resistance change material layer or gold
Belonging to ion to occur to migrate formation conductive filament, when conductive filament connects upper and lower electrode, resistance-variable storing device enters
Enter low resistive state；When again applying a certain appropriate voltage, conductive filament ruptures, and enters high-impedance state, institute
Fracture and the formation of conductive filament it is derived from the change of resistance.Owing to this fracture and formation are random,
Repeatedly during resistive, the pattern of conductive filament is different with distribution, so the electricity ginseng of resistance change material layer
There is the biggest undulatory property in number (set voltage, reset voltage, high low resistance state resistance etc.), seriously reduces
The stability of resistance-variable storing device work and reliability.The most effectively control formation and the fracture of conductive filament
Become the key core problem improving memory device performance.
Summary of the invention
For solving the problem that above-mentioned prior art exists, the invention provides a kind of resistive resistor and preparation thereof
Method, this resistive resistor, by preparing conductive bumps array, is effectively improved the homogeneous of resistance-variable storing device
Property.
In order to reach foregoing invention purpose, present invention employs following technical scheme:
A kind of resistance-variable storing device, the substrate arranged including lamination successively, the first electrode, resistance change material layer, the
Two electrodes, also include: interval is formed at described first electrode and resistive material bed boundary or/and described second
Conductive bumps array at electrode and resistive material bed boundary.
Further, the material of described conductive bumps array appointing in Pt, Cu, Al, Ti, Ni, Au
Meaning one.
Further, the height of described conductive bumps array is 1nm～5nm；
Further, the spacing of described conductive bumps array is 50nm～50 μm.
Further, the thickness of described resistance change material layer is 5nm～200nm.
Further, the material of described resistance change material layer selected from hafnium oxide, titanium oxide, zirconium oxide, zinc oxide,
At least one in tungsten oxide, tantalum oxide；The material of described substrate is selected from silicon substrate, glass substrate, flexibility
Any one in substrate；The material of described bottom electrode appointing in Pt, Cu, Al, Ti, Ni, TiN
Meaning one；The material of described upper electrode is selected from any one in Pt, Cu, Al, Ti, Ni, TiN.
Another object of the present invention also resides in the preparation method providing a kind of resistance-variable storing device as above, bag
Include: A, prepare on substrate the first electrode, resistance change material layer, the step of the second electrode；B, described
Or/and prepare conductive stud at described second electrode and resistive material bed boundary at one electrode and resistive material bed boundary
Play the step of array.
Further, the step preparing conductive bumps array specifically includes: use spin-coating method at described first electricity
Or/and be coated with nanometer spherical array at described second electrode and resistive material bed boundary at pole and resistive material bed boundary
Row；Use self-assembling technique that described nanosphere array is self-assembly of nanometer layers of balls；With described nanometer layers of balls
For mask, formation of deposits metallic film in described nanometer layers of balls；Wherein, described deposition process is selected from chemistry
Any in vapour deposition, physical vapour deposition (PVD), electron beam evaporation, sputtering, ald, thermal evaporation
A kind of；Nanometer layers of balls described in erosion removal, forms described conductive bumps array.
Further, the number of plies of described nanometer layers of balls is 1～2 layer.
Further, any one in polystyrene, the silicon dioxide of the material of described nanometer layers of balls.
The present invention by using nanosphere lithography technology at the first electrode or/and the second electrode and resistance change material layer
Interface preparation is evenly distributed and controlled conductive bumps array, makes electric field concentrate on conductive bumps array,
Add the probability forming conductive channel at conductive bumps array, thus improve the work of this resistance-variable storing device
Stability, improve the homogeneity of resistance-variable storing device.
Accompanying drawing explanation
By combining the following description that accompanying drawing is carried out, above and other aspect of embodiments of the invention, feature
Will become clearer from advantage, in accompanying drawing:
Fig. 1 is the structural representation of the resistance-variable storing device according to embodiments of the invention 1；
Fig. 2 is the flow chart of steps of the preparation method of the resistance-variable storing device according to embodiments of the invention 1；
Fig. 3 is the structural representation of the nanometer layers of balls according to embodiments of the invention 1；
Fig. 4 is the structural representation of the conductive bumps array according to embodiments of the invention 1；
Fig. 5 is the structural representation of the resistance-variable storing device according to embodiments of the invention 2；
Fig. 6 is the flow chart of steps of the preparation method of the resistance-variable storing device according to embodiments of the invention 2；
Fig. 7 is the structural representation of the nanometer layers of balls according to embodiments of the invention 2；
Fig. 8 is the structural representation of the conductive bumps array according to embodiments of the invention 2.
Detailed description of the invention
Hereinafter, with reference to the accompanying drawings to describe embodiments of the invention in detail.However, it is possible to it is different with many
Form implements the present invention, and the present invention should not be construed as limited to the specific embodiment that illustrates here.
On the contrary, it is provided that these embodiments are to explain the principle of the present invention and actual application thereof, so that this area
Others skilled in the art it will be appreciated that various embodiments of the present invention and be suitable for the various of specific intended application and repair
Change.In the accompanying drawings, for the sake of clarity, the shape and size of element, and identical label can be exaggerated
Same or analogous element will be used to indicate all the time.
Embodiment 1
Fig. 1 is the structural representation of the resistance-variable storing device according to embodiments of the invention 1.
With reference to Fig. 1, include substrate 10 according to the resistance-variable storing device of embodiments of the invention 1；Lamination sets successively
The first electrode 20 of being placed on substrate 10, resistance change material layer the 30, second electrode 40；And, it is arranged at
Between one electrode 20 and resistance change material layer 30 and interval is formed at the conductive bumps battle array on the first electrode 20 surface
Row 50.
In the present embodiment, the material of above-mentioned conductive bumps array 50 is Pt, and the height of conductive bumps array
For about 5nm, spacing is 50nm；But the present invention is not restricted to this, the material of conductive bumps array is also
Be selected from Cu, Al, Ti, Ni, Au any one, and the limitation in height of conductive bumps array is at 1nm～5
Between nm, spacing controls as between 50nm～50 μm.
It is formed at the first electrode 20 and can make electric field collection with the conductive bumps array 50 hindering change material layer 30 interface
In on conductive bumps array 50, add at conductive bumps array 50 formed conductive channel probability,
Thus improve the stability of this resistance-variable storing device work, improve the homogeneity of resistance-variable storing device.
Preferably, in the present embodiment, substrate 10 is silicon substrate；The first electrode 20 being formed on silicon substrate
Material be Pt；The material of the resistance change material layer 30 being formed on the first electrode 20 is zirconium oxide, and it is thick
Degree is 60nm；The material being formed at the second electrode 40 on resistance change material layer 30 is Pt；But the present invention is not
Being limited to this, the material such as substrate 10 can also is that glass substrate or flexible substrate etc., the first electrode 20 He
The material of the second electrode 40 be also selected from Cu, Al, Ti, Ni, TiN any one, resistive material
It is any one that the material of layer 30 is also selected from titanium oxide, hafnium oxide, zinc oxide, tungsten oxide, tantalum oxide
Plant or its mixture, and the thickness of this resistance change material layer 30 is not restricted to 60nm, only need to be controlled
In the range of 5nm～200nm.
Above-mentioned resistive is deposited by the flow chart of steps below in conjunction with the preparation method of the resistance-variable storing device shown in Fig. 2
The preparation method of reservoir is described in detail.
With reference to Fig. 2, according to the flow chart of steps bag of the preparation method of the resistance-variable storing device of embodiments of the invention 1
Include following steps:
In step 110, deposition Pt metal forms the first electrode 20 over the substrate 10.Specifically, substrate
10 use silicon substrate.
In the step 120, the first electrode 20 is formed nanosphere, and uses self-assembling technique to form nanometer
Ball array, forms nanometer layers of balls 61.Specifically, form nanosphere and use spin-coating method, and nanosphere
Material is polystyrene.
In the present embodiment, the number of plies of nanometer layers of balls 61 is one layer, the top view of this nanometer layers of balls 61 such as Fig. 3
Shown in, in Fig. 3, between the polystyrene nanospheres of array arrangement, define space 63, a space 62 and b
Two kinds of spaces.
In step 130, nanometer layers of balls 61 deposits Pt metal, in nanometer layers of balls 61 surface, a space
Metallic film is formed at 62 and b spaces 63.Specifically, use electron-beam vapor deposition method in nanometer layers of balls 61
Deposition Pt metal.
What deserves to be explained is, in nanometer layers of balls 61, the method for formation of deposits metallic film can also is that chemistry gas
Any one in deposition, physical vapour deposition (PVD), sputtering method, atomic layer deposition method, thermal evaporation etc. mutually.
In step 140, erosion removal nanometer layers of balls 61, the first electrode 20 is formed conductive bumps array
50.It is to say, in the present embodiment, conductive bumps array 50 its substantially, with nanometer layers of balls 61 for covering
Film, the Pt metal of deposition, the structural representation of this conductive bumps array 50 at space 63, a space 62 and b
Figure is as shown in Figure 4.
The height of the conductive bumps array 50 prepared through step 120-140 is 5nm, and spacing is 50nm.
What deserves to be explained is, the Altitude control of conductive bumps array 50 is in the scope of 1nm～5nm, spacing control
System is in 50nm～the scope of 50 μm, and the regulation and control of the height of conductive bumps array 50 and spacing are all passed through
The particle diameter controlling polystyrene nanospheres can meet, and the most that is this conductive bumps array 50 is distribution
Uniform and controlled array.
Material as conductive bumps array 50 is not restricted to Pt metal, other as Cu, Al, Ti, Ni,
The metals such as Au.
In step 150, the first electrode 20 and conductive bumps array 50 form resistance change material layer 30.
Specifically, the forming method of resistance change material layer 30 uses sputtering method.
Specifically, resistance change material layer 30 is the zirconia layer of 60nm for thickness.
In a step 160, resistance change material layer 30 forms the second electrode 40.
Specifically, the material of the second electrode 40 is Pt metal, and the forming method of the second electrode 40 uses
Photoetching process and stripping method.
In the present embodiment, the most successively form the first electrode 20, resistance change material layer 30 and the second electricity
The process of pole 40 all belongs to those skilled in the art's customary means, repeats this process the most one by one herein.
The resistance-variable storing device prepared through above-mentioned steps 110-160 passes through at the first electrode 20 and resistive material
Conductive bumps array 50 is prepared in layer 30 interface, and electric field can be made to concentrate on conductive bumps array 50, increases
At conductive bumps array 50, form the probability of conductive channel, thus improve the work of this resistance-variable storing device
Stability, improves the homogeneity of resistance-variable storing device.
Embodiment 2
In the description of embodiment 2, do not repeat them here with the something in common of embodiment 1, only describe with real
Execute the difference of example 1.Embodiment 2 is with the difference of embodiment 1, with reference to Fig. 5, according to this
The resistance-variable storing device of bright embodiment 2 includes substrate 10；The first electrode that lamination is arranged on substrate 10 successively
20, resistance change material layer the 30, second electrode 40；And, it is arranged at the second electrode 40 and resistance change material layer 30
Between and be spaced be formed at resistance change material layer 30 surface conductive bumps array 50.
With reference to the flow chart of steps of the preparation method of resistance-variable storing device according to embodiments of the invention 2 in Fig. 6.
In step 210, deposition Pt metal forms the first electrode 20, at the first electrode 20 over the substrate 10
Upper formation hinders change material layer 30.Specifically, substrate 10 uses glass substrate, resistance change material layer 30
Forming method is ald.
In the present embodiment, resistance change material layer 30 is aluminium oxide that thickness is 5nm and the mixed layer of hafnium oxide.
In a step 220, resistance change material layer 30 is formed nanosphere, and uses self-assembling technique formation to receive
Rice ball array, forms nanometer layers of balls 61.Specifically, form nanosphere and use spin-coating method, and nanosphere
Material be silicon dioxide.
In the present embodiment, the number of plies of nanometer layers of balls 61 is two-layer, the top view of this nanometer layers of balls 61 such as Fig. 6
Shown in, in Fig. 7, between the silica nanosphere of array arrangement, define space, 64 1 kinds of c space.
In step 230, nanometer layers of balls 61 deposits Pt metal, empty on nanometer layers of balls 61 surface and c
Metallic film is formed at gap 64.Specifically, electron-beam vapor deposition method is used to deposit metal in nanometer layers of balls 61
Pt。
In step 240, erosion removal nanometer layers of balls 61, resistance change material layer 30 forms conductive bumps battle array
Row 50.It is to say, in the present embodiment, conductive bumps array 50 its substantially, with nanometer layers of balls 61 be
Mask, the Pt metal of deposition, the structural representation of this conductive bumps array 50 such as Fig. 8 at c space 64
Shown in.
The height of the conductive bumps array 50 prepared through step 220-240 is 1nm, and spacing is 50 μm.
In step 250, resistance change material layer 30 and conductive bumps array 50 form the second electrode 40.
Specifically, the material of the second electrode 40 is Pt metal, and the forming method of the second electrode 40 uses
Photoetching process and stripping method.
In the present embodiment, the most successively form the first electrode 20, resistance change material layer 30 and the second electricity
The process of pole 40 all belongs to those skilled in the art's customary means, repeats this process the most one by one herein.
The resistance-variable storing device prepared through above-mentioned steps 210-250 passes through at the second electrode 40 and resistive material
Conductive bumps array 50 is prepared in layer 30 interface, and electric field can be made to concentrate on conductive bumps array 50, increases
At conductive bumps array 50, form the probability of conductive channel, thus improve the work of this resistance-variable storing device
Stability, improves the homogeneity of resistance-variable storing device.
What deserves to be explained is, prepare with resistance change material layer 30 interface at the first electrode 20 or the second electrode 40
Conductive bumps array 50, is to be concentrated on conductive bumps array 50 by electric field, adding at conductive bumps
Form the probability of conductive channel at array 50, thus improve the stability of this resistance-variable storing device work, improve resistance
The homogeneity of transition storage；Therefore, if at the first electrode 20 and resistance change material layer 30 interface, Yi Ji
Two electrodes 4 all prepare conductive bumps array 50 with resistance change material layer 30 interface, can reach the present invention's equally
Improve the purpose of the homogeneity of resistance-variable storing device, still belong to institute of the present invention protection domain.
Although illustrate and describing the present invention with reference to specific embodiment, but those skilled in the art will
Understand: in the case of without departing from the spirit and scope of the present invention limited by claim and equivalent thereof,
The various changes in form and details can be carried out at this.
Claims (10)
1. a resistance-variable storing device, including lamination successively arrange substrate, the first electrode, resistance change material layer,
Second electrode, it is characterised in that also include: be formed at described first electrode and resistive material bed boundary or/
With the conductive bumps array at described second electrode and resistive material bed boundary.
Resistance-variable storing device the most according to claim 1, it is characterised in that described conductive bumps array
Material is selected from any one in Pt, Cu, Al, Ti, Ni, Au.
Resistance-variable storing device the most according to claim 1 and 2, it is characterised in that described conductive bumps battle array
The height of row is 1nm～5nm.
Resistance-variable storing device the most according to claim 1 and 2, it is characterised in that described conductive bumps battle array
The spacing of row is 50nm～50 μm.
Resistance-variable storing device the most according to claim 1, it is characterised in that the thickness of described resistance change material layer
Degree is 5nm～200nm.
Resistance-variable storing device the most according to claim 1, it is characterised in that the material of described resistance change material layer
At least one in hafnium oxide, titanium oxide, zirconium oxide, zinc oxide, tungsten oxide, tantalum oxide of material；Institute
State any one in silicon substrate, glass substrate, flexible substrate of the material of substrate；Described bottom electrode
Material is selected from any one in Pt, Cu, Al, Ti, Ni, TiN；The material of described upper electrode selected from Pt,
Any one in Cu, Al, Ti, Ni, TiN.
7. the preparation method of the resistance-variable storing device as described in claim 1-6 is arbitrary, it is characterised in that
Including:
A, prepare on substrate the first electrode, resistance change material layer, the step of the second electrode；
B, at described first electrode and resistive material bed boundary or/and described second electrode and resistance change material layer
The step of conductive bumps array is prepared in interface.
Preparation method the most according to claim 7, it is characterised in that prepare the step of conductive bumps array
Suddenly specifically include:
Use spin-coating method at described first electrode and resistive material bed boundary or/and described second electrode and resistive
Nanosphere array it is coated with at material bed boundary；
Use self-assembling technique that described nanosphere array is self-assembly of nanometer layers of balls；
With described nanometer layers of balls as mask, use formation of deposits metallic film in described nanometer layers of balls；Wherein,
Described deposition process is selected from chemical gaseous phase deposition, physical vapour deposition (PVD), electron beam evaporation, sputtering, atomic layer
Deposition, any one in thermal evaporation；
Nanometer layers of balls described in erosion removal, forms described conductive bumps array.
Preparation method the most according to claim 8, it is characterised in that the number of plies of described nanometer layers of balls is
1～2 layer.
Preparation method the most according to claim 8 or claim 9, it is characterised in that described nanometer layers of balls
Material is selected from any one in polystyrene, silicon dioxide.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108389964A (en) * | 2018-04-03 | 2018-08-10 | 集美大学 | The resistance-variable storing device preparation method of ion positioning injection is carried out with nanometer shielding layer |
| CN111293221A (en) * | 2020-04-08 | 2020-06-16 | 电子科技大学 | Preparation method of high-performance memristor |
| CN111463347A (en) * | 2020-04-08 | 2020-07-28 | 电子科技大学 | Method for preparing high-performance memristor |
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| CN102157692A (en) * | 2011-03-22 | 2011-08-17 | 复旦大学 | Organic resistive random access memory (RRAM) with peak shaped bottom electrode and manufacture method thereof |
| CN103035840A (en) * | 2012-12-19 | 2013-04-10 | 北京大学 | Resistive random access memory and preparation method thereof |
| US8963114B2 (en) * | 2013-03-06 | 2015-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | One transistor and one resistive (1T1R) random access memory (RRAM) structure with dual spacers |
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2015
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102157692A (en) * | 2011-03-22 | 2011-08-17 | 复旦大学 | Organic resistive random access memory (RRAM) with peak shaped bottom electrode and manufacture method thereof |
| CN103035840A (en) * | 2012-12-19 | 2013-04-10 | 北京大学 | Resistive random access memory and preparation method thereof |
| US8963114B2 (en) * | 2013-03-06 | 2015-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | One transistor and one resistive (1T1R) random access memory (RRAM) structure with dual spacers |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108389964A (en) * | 2018-04-03 | 2018-08-10 | 集美大学 | The resistance-variable storing device preparation method of ion positioning injection is carried out with nanometer shielding layer |
| CN108389964B (en) * | 2018-04-03 | 2021-05-25 | 集美大学 | Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection |
| CN111293221A (en) * | 2020-04-08 | 2020-06-16 | 电子科技大学 | Preparation method of high-performance memristor |
| CN111463347A (en) * | 2020-04-08 | 2020-07-28 | 电子科技大学 | Method for preparing high-performance memristor |
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