CN108389964B - Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection - Google Patents
Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection Download PDFInfo
- Publication number
- CN108389964B CN108389964B CN201810290070.3A CN201810290070A CN108389964B CN 108389964 B CN108389964 B CN 108389964B CN 201810290070 A CN201810290070 A CN 201810290070A CN 108389964 B CN108389964 B CN 108389964B
- Authority
- CN
- China
- Prior art keywords
- nano
- shielding layer
- material layer
- layer
- random access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000002347 injection Methods 0.000 title claims abstract description 23
- 239000007924 injection Substances 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims description 23
- 239000000463 material Substances 0.000 claims abstract description 48
- 230000008859 change Effects 0.000 claims abstract description 40
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 21
- 239000001301 oxygen Substances 0.000 claims abstract description 21
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 21
- 238000002360 preparation method Methods 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 9
- 229910021645 metal ion Inorganic materials 0.000 claims abstract description 7
- 239000002105 nanoparticle Substances 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 101
- 150000002500 ions Chemical class 0.000 claims description 17
- 239000002077 nanosphere Substances 0.000 claims description 13
- 239000011651 chromium Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 10
- 238000009826 distribution Methods 0.000 claims description 10
- 239000002071 nanotube Substances 0.000 claims description 10
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 9
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 9
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 8
- 239000002253 acid Substances 0.000 claims description 7
- 239000007791 liquid phase Substances 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 claims description 7
- 239000011259 mixed solution Substances 0.000 claims description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 6
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- -1 titanium ions Chemical class 0.000 claims description 6
- 229910052681 coesite Inorganic materials 0.000 claims description 5
- 229910052906 cristobalite Inorganic materials 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 229910052682 stishovite Inorganic materials 0.000 claims description 5
- 229910052905 tridymite Inorganic materials 0.000 claims description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 3
- 239000007864 aqueous solution Substances 0.000 claims description 3
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 claims description 3
- 239000004327 boric acid Substances 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000003487 electrochemical reaction Methods 0.000 claims description 3
- 239000003792 electrolyte Substances 0.000 claims description 3
- 235000006408 oxalic acid Nutrition 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- 239000002344 surface layer Substances 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 230000015654 memory Effects 0.000 description 7
- 239000010408 film Substances 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 2
- 238000004220 aggregation Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 230000007334 memory performance Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/041—Modification of the switching material, e.g. post-treatment, doping
- H10N70/043—Modification of the switching material, e.g. post-treatment, doping by implantation
Abstract
The invention provides a preparation method of a Resistive Random Access Memory (RRAM) by using a nano shielding layer to perform ion positioning injection, which comprises the following steps: 1) manufacturing a bottom electrode and a resistance change material layer which are arranged in a stacked mode, wherein the bottom electrode is arranged below the resistance change material layer; 2) preparing a nano shielding layer on the upper surface of the resistive material layer, wherein the nano shielding layer is provided with nano-sized gaps arranged in a layer array to form a positioning channel for ion injection; 3) and performing external metal ion injection treatment on the resistive material layer below the nano gap in the nano shielding layer array, and forming a conductive wire based on an oxygen vacancy in the resistive material layer, wherein the conductive wire extends along the thickness direction of the resistive material layer and is connected with a top electrode and a bottom electrode of the resistive random access memory. The invention provides a resistive random access memory preparation scheme with high switch resistance ratio and good stability, aiming at improving the performance of the resistive random access memory on the technical level.
Description
Technical Field
The invention relates to the technical field of resistive random access memories.
Background
Memory undoubtedly occupies a very important position in the information age today. With the continuous progress of the semiconductor technology level, Resistive Random Access Memory (RRAM) is gaining more and more attention. The RRAM has the technical advantages of simple preparation process, high density, high integration level, high programming speed, reliable and stable performance, low energy consumption, low operating voltage and the like, and the RRAM is compatible with a CMOS process, so that the RRAM has become one of the most powerful competitors of the next-generation memory.
The core of the resistive random access memory is a metal/medium/metal (MIM) structure, and the memory function is realized by relying on the resistive effect of the middle medium layer. The dielectric layer with the resistance change effect can generate mutual conversion between resistance states (a high resistance state and a low resistance state) under the action of an external electric field, so that binary information storage of a '0' state and a '1' state is formed. Many materials, including metal oxides, have been identified as having significant resistance change properties. The main evaluation indexes of the resistance random access memory performance include switch resistance ratio, stability and the like. The low switch resistance ratio and poor stability can cause misreading and mis-writing of memory information and reduction of data reliability. Therefore, improving the resistance ratio and stability of the switch has become the focus of resistive switching research.
According to the resistance change mechanism, oxygen vacancies, which are the most common defects in the resistance change material represented by metal oxides, have close relation with the resistance ratio and the stability of a switch.
In the aspect of improving the resistance ratio of the switch, the resistance-change layer preparation process is optimized to improve the quality and reduce the oxygen vacancy defect, so that the high-resistance state resistance can be improved, and more importantly, the low-resistance state resistance is reduced, namely, the conductive wire is easier to form and avoids overlong paths. The formation of the conductive wire is based on the aggregation distribution of oxygen vacancies, and the fracture and aggregation state of the oxygen vacancies are just the typical microscopic characteristics of the high-low resistance state of the metal oxide resistance change material; in the aspect of improving the resistance change stability, the stability of the resistance change memory comes from the stability of the conductive wires in the resistance change layer, and the stability can be improved by inhibiting the random distribution of the conductive wires. The positioning distribution of the highly aggregated oxygen vacancies is the basis for the formation of uniform and stable conductive wires. Therefore, the resistance ratio and the stability of the resistance change switch can be improved by controlling the oxygen vacancy concentration and the positioning distribution.
Disclosure of Invention
The invention aims to provide a resistive random access memory preparation scheme with high switch resistance ratio and good stability, and aims to improve the performance of the resistive random access memory in a process aspect.
In order to solve the technical problem, the invention provides a preparation method of a resistive random access memory by using a nano shielding layer to perform ion positioning injection, which comprises the following steps:
1) manufacturing a bottom electrode and a resistance change material layer which are arranged in a stacked mode, wherein the bottom electrode is arranged below the resistance change material layer;
2) preparing a nano shielding layer on the upper surface of the resistive material layer, wherein the nano shielding layer is provided with nano-sized gaps arranged in a layer array to form a positioning channel for ion injection;
3) and performing external metal ion injection treatment on the resistive material layer below the nano gap in the nano shielding layer array to generate oxygen vacancy gathering distribution extending along the thickness direction.
In a preferred embodiment: the species of the metal ions include, but are not limited to, titanium ions.
In a preferred embodiment: the nano-shielding layer includes, but is not limited to, an alumina nanotube array generated via anodic oxidation or SiO generated via liquid phase deposition method2An array of nanospheres; wherein the alumina nanotube is the positioning channel, and 2X2 SiO2The gaps enclosed and formed among the nanospheres form the positioning channel.
In a preferred embodiment: the specific manufacturing steps of the aluminum oxide nanotube array generated by anodic oxidation are as follows:
1) depositing a high-purity metal aluminum layer on the upper surface of the resistance change material layer by adopting a direct current sputtering process;
2) carrying out electrochemical reaction on the metal aluminum layer in an electrolyte mixed by sulfuric acid and oxalic acid by using direct current voltage;
3) immersing the reacted metal aluminum layer in a mixed solution of chromium acid and phosphoric acid, and removing anodic aluminum oxide on the surface layer;
4) and carrying out anodic treatment in the second stage to form a regular anodic aluminum oxide nanotube matrix so as to form the nano shielding layer.
In a preferred embodiment: the SiO generated by the liquid phase deposition method2The specific manufacturing steps of the nanosphere array are as follows:
by means of H2SiF6Saturated SiO of2Mixing the gel with boric acid to form aqueous solution for SiO2Performing liquid phase deposition on nanospheres, immersing the resistance change material layer into the solution at 50-60 ℃, washing with deionized water, and obtaining SiO on the upper surface of the resistance change material layer2A matrix of nanospheres to form the nano-sized shielding layer.
In a preferred embodiment: steps 4, 5 and 6 are also included after step 3:
4) cleaning with a mixed solution of HF acid and hydrochloric acid to remove the nano shielding layer;
5) and annealing the resistance change material layer without the nano shielding layer in a nitrogen atmosphere to activate oxygen vacancies, and forming a conductive wire based on the oxygen vacancies in the resistance change material layer, wherein the conductive wire extends along the thickness direction of the resistance change material layer.
6) And preparing a top electrode on the upper surface of the resistance change material layer, and connecting the conductive wire with the top electrode and the bottom electrode.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
the invention provides a preparation method of a Resistive Random Access Memory (RRAM) by using a nano shielding layer for ion positioning injection, wherein a nano shielding layer with nano-scale size gaps is prepared on a RRAM material layer and is used as a process shielding matrix of external ion current. Under the guidance of the nanometer shielding layer, the ion injection flow generated by ion injection is concentrated in the nanometer gap in the nanometer shielding layer, so that the region with the increased oxygen vacancy concentration in the resistive material layer is also concentrated in the region corresponding to the nanometer gap, and the oxygen vacancy concentration and distribution in the resistive layer are changed by means of highly controllable metal ion injection, thereby reducing the randomness of the distribution of the conductive wires and improving the uniformity and the stability of the resistive random access memory. The uniform and stable distribution state is realized to a certain extent, and the performance of the resistive random access memory is improved accordingly.
Drawings
Fig. 1 to 5 are flowcharts of steps of a method for manufacturing a resistive random access memory by performing ion-localized implantation using a nano shielding layer in preferred embodiment 1 of the present invention.
Fig. 6 to 10 are flowcharts of steps of a method for manufacturing a resistive random access memory by performing ion-localized implantation with a nano shielding layer in preferred embodiment 2 of the present invention.
Detailed Description
The present invention will be further described with reference to the following embodiments. Wherein the showings are for the purpose of illustration only and are shown by way of illustration only and not in actual form, and are not to be construed as limiting the present patent; to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
Example 1
The preparation method of the resistive random access memory by using the nano shielding layer to carry out ion positioning injection comprises the following steps:
1) preparing a Cr/Cu/Cr series film on the surface of a silicon substrate by a direct-current sputtering method to be used as a bottom electrode 6 of the resistive random access memory;
2) continuously preparing a TiO2 thin film with the thickness of about 100nm as the resistance change material layer 1 on the bottom electrode 6 by using a radio frequency magnetron sputtering method, as shown in FIG. 1;
3) the nano-sized shielding layer 2 is formed as follows:
depositing a high-purity metal aluminum layer on the resistance change material layer 1 by adopting a direct current sputtering process;
secondly, performing electrochemical reaction on the metal aluminum layer in an electrolyte mixed by sulfuric acid and oxalic acid by using direct current voltage, immersing the metal aluminum layer in a mixed solution of chromium acid and phosphoric acid, and removing anodic aluminum oxide on the surface layer;
and thirdly, carrying out anodic treatment at the second stage to form a regular anodic aluminum oxide nanotube matrix so as to form a nano shielding layer.
In the nano shielding layer 2, each anodic aluminum oxide nanotube forms a positioning channel 5 for ion flow orientation generated by surface plasma, as shown in fig. 2;
4) the nano-shield layer 2 was subjected to an energy of 30keV and a dose of 1014/cm-2The titanium ions 3 are injected, so that the titanium ions 3 are injected into the resistive material layer 1 from the positioning channel 5, as shown in fig. 3;
5) cleaning by using a mixed solution of HF acid and hydrochloric acid to remove the nano shielding layer, annealing the resistance change material layer 1 from which the nano shielding layer is removed in a nitrogen atmosphere to activate oxygen vacancies, and forming a conductive wire 4 based on the oxygen vacancies in the resistance change material layer 1, wherein the conductive wire 4 extends along the thickness direction of the resistance change material layer. As shown in fig. 4;
6) and continuously preparing a Cr/Cu/Cr series film on the surface of the resistive material layer 1 to be used as a top electrode 7 of the resistive memory, and connecting a conductive wire with the top electrode and a bottom electrode to complete the whole process. As shown in fig. 5.
Through tests, the method utilizes the nanometer shielding layer to carry out metal ion positioning injection on the resistive layer, thereby realizing the controlled distribution of high-concentration oxygen vacancies in the resistive layer, improving the uniformity and stability of the conductive wire based on the oxygen vacancies, obviously improving the switch resistance ratio of the resistive random access memory and effectively improving the stability of the resistive random access memory.
Example 2
The preparation method of the resistive random access memory by using the nano shielding layer to carry out ion positioning injection comprises the following steps:
1) preparing a Cr/Cu/Cr series film on the surface of a silicon substrate by a direct-current sputtering method to be used as a bottom electrode 6 of the resistive random access memory;
2) continuously preparing a layer of TiO with the thickness of about 100nm on the bottom electrode 6 by using a radio frequency magnetron sputtering method2A thin film as the resistance change material layer 1, as shown in fig. 6;
3) by means of H2SiF6Saturated SiO of2Mixing the gel with boric acid to form aqueous solution for SiO2Performing liquid phase deposition on nanospheres, immersing the resistance change material layer 1 into the solution at 50-60 ℃, washing with deionized water, and obtaining SiO on the upper surface of the resistance change material layer2Nanosphere matrix to form nano-shielding layer 2, 2x2 SiO per adjacent2The nanospheres have a nanogap therebetween, and the nanogap forms a positioning channel 5 for ion implantation, as shown in fig. 7;
4) subjecting the nano-shielding layer to an energy of 30keV and a dose of 1014/cm-2The titanium ions 3 are injected, so that the titanium ions 3 are injected into the resistive material layer 1 from the positioning channel 5, as shown in fig. 8;
5) cleaning and removing the nano shielding layer 2 by using a mixed solution of HF acid and hydrochloric acid, annealing the resistance change material layer 1 with the nano shielding layer removed in a nitrogen atmosphere to activate oxygen vacancies, and forming a conductive wire 4 based on the oxygen vacancies in the resistance change material layer 1, wherein the conductive wire 4 extends along the thickness direction of the resistance change material layer. As shown in fig. 9;
6) and continuously preparing a Cr/Cu/Cr series film on the surface of the resistive material layer 1 to be used as a top electrode 7 of the resistive memory, and connecting a conductive wire with the top electrode and a bottom electrode to complete the whole process. As shown in fig. 10.
It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.
Claims (6)
1. The preparation method of the resistive random access memory by using the nano shielding layer to carry out ion positioning injection is characterized by comprising the following steps of:
1) manufacturing a bottom electrode and a resistance change material layer which are arranged in a stacked mode, wherein the bottom electrode is arranged below the resistance change material layer;
2) preparing a nano shielding layer on the upper surface of the resistive material layer, wherein the nano shielding layer is provided with nano-sized gaps arranged in a layer array to form a positioning channel for ion injection;
3) and performing external metal ion injection treatment on the resistive material layer below the nano gap in the nano shielding layer array to generate oxygen vacancy gathering distribution extending along the thickness direction.
2. The method for preparing the resistive random access memory by using the nano shielding layer for ion positioning injection according to claim 1, is characterized in that: the species of the metal ions include titanium ions.
3. The method for preparing the resistive random access memory by using the nano shielding layer for ion positioning injection according to claim 1, is characterized in that: the nano-shielding layer comprises an alumina nanotube array generated by anodic oxidation or SiO generated by liquid phase deposition2An array of nanospheres; wherein the alumina nanotube is the positioning channel, and 2X2 SiO2The gaps enclosed and formed among the nanospheres form the positioning channel.
4. The method for preparing the resistive random access memory by using the nano shielding layer for ion positioning injection according to claim 3, wherein the method comprises the following steps: the specific manufacturing steps of the aluminum oxide nanotube array generated by anodic oxidation are as follows:
depositing a high-purity metal aluminum layer on the upper surface of the resistance change material layer by adopting a direct current sputtering process;
secondly, performing electrochemical reaction on the metal aluminum layer in an electrolyte mixed by sulfuric acid and oxalic acid by using direct current voltage;
thirdly, immersing the reacted metal aluminum layer in a mixed solution of chromium acid and phosphoric acid, and removing anodic aluminum oxide on the surface layer;
and fourthly, performing anodic treatment at the second stage to form a regular anodic aluminum oxide nanotube matrix so as to form the nano shielding layer.
5. The method for preparing the resistive random access memory by using the nano shielding layer for ion positioning injection according to claim 3, wherein the method comprises the following steps: the SiO generated by the liquid phase deposition method2The specific manufacturing steps of the nanosphere array are as follows:
by means of H2SiF6Saturated SiO of2Mixing the gel with boric acid to form aqueous solution for SiO2Performing liquid phase deposition on nanospheres, immersing the resistance change material layer into the solution at 50-60 ℃, washing with deionized water, and obtaining SiO on the upper surface of the resistance change material layer2A matrix of nanospheres to form the nano-sized shielding layer.
6. The method for preparing the resistive random access memory by using the nano shielding layer for ion positioning injection according to any one of claims 1 to 5, wherein the method comprises the following steps: steps 4, 5 and 6 are also included after step 3:
4) cleaning with a mixed solution of HF acid and hydrochloric acid to remove the nano shielding layer;
5) annealing the resistance change material layer with the nano shielding layer removed in a nitrogen atmosphere to activate oxygen vacancies, and further forming conductive wires based on the oxygen vacancies in the resistance change material layer, wherein the conductive wires extend along the thickness direction of the resistance change material layer;
6) and preparing a top electrode on the upper surface of the resistance change material layer, and connecting the conductive wire with the top electrode and the bottom electrode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810290070.3A CN108389964B (en) | 2018-04-03 | 2018-04-03 | Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810290070.3A CN108389964B (en) | 2018-04-03 | 2018-04-03 | Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108389964A CN108389964A (en) | 2018-08-10 |
CN108389964B true CN108389964B (en) | 2021-05-25 |
Family
ID=63073297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810290070.3A Expired - Fee Related CN108389964B (en) | 2018-04-03 | 2018-04-03 | Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108389964B (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110676374B (en) * | 2019-05-22 | 2020-06-09 | 集美大学 | Resistive random access memory and preparation method thereof |
CN112259681B (en) * | 2019-07-22 | 2024-03-05 | 华邦电子股份有限公司 | Resistive random access memory structure and manufacturing method thereof |
CN111146341A (en) * | 2020-01-02 | 2020-05-12 | 集美大学 | Preparation method of resistive random access memory with space limitation effect |
CN111293221B (en) * | 2020-04-08 | 2022-04-01 | 电子科技大学 | Preparation method of high-performance memristor |
CN112652712B (en) * | 2020-12-09 | 2022-08-12 | 华中科技大学 | Phase change memory integrated unit of gate tube, preparation method of integrated unit and phase change memory device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102708919A (en) * | 2011-03-28 | 2012-10-03 | 中国科学院微电子研究所 | Resistive random access memory and manufacturing method thereof |
CN106299108A (en) * | 2015-05-25 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Resistance-variable storing device and preparation method thereof |
CN106887519A (en) * | 2017-03-20 | 2017-06-23 | 中国科学院微电子研究所 | A kind of preparation method of the resistance-variable storing device for realizing multilevel storage |
CN106910822A (en) * | 2017-03-17 | 2017-06-30 | 电子科技大学 | A kind of resistance changing film memory and preparation method thereof |
WO2018004574A1 (en) * | 2016-06-29 | 2018-01-04 | Intel Corporation | Rram devices with amorphous bottom ballast layer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005236003A (en) * | 2004-02-19 | 2005-09-02 | Sony Corp | Resistance-variable nonvolatile memory, method of manufacturing the same, method for recording, method for reproduction, method for erasure, fine structure made of resistance-variable material, and method of manufacturing fine structure made of resistance-variable material |
US9515262B2 (en) * | 2013-05-29 | 2016-12-06 | Shih-Yuan Wang | Resistive random-access memory with implanted and radiated channels |
TWI488347B (en) * | 2014-04-08 | 2015-06-11 | Winbond Electronics Corp | Method for forming memory device |
FR3045938B1 (en) * | 2015-12-22 | 2018-03-09 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | INTEGRATED CIRCUIT COINTEGRATING A FET TRANSISTOR AND A RRAM MEMORY POINT |
-
2018
- 2018-04-03 CN CN201810290070.3A patent/CN108389964B/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102708919A (en) * | 2011-03-28 | 2012-10-03 | 中国科学院微电子研究所 | Resistive random access memory and manufacturing method thereof |
CN106299108A (en) * | 2015-05-25 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Resistance-variable storing device and preparation method thereof |
WO2018004574A1 (en) * | 2016-06-29 | 2018-01-04 | Intel Corporation | Rram devices with amorphous bottom ballast layer |
CN106910822A (en) * | 2017-03-17 | 2017-06-30 | 电子科技大学 | A kind of resistance changing film memory and preparation method thereof |
CN106887519A (en) * | 2017-03-20 | 2017-06-23 | 中国科学院微电子研究所 | A kind of preparation method of the resistance-variable storing device for realizing multilevel storage |
Also Published As
Publication number | Publication date |
---|---|
CN108389964A (en) | 2018-08-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108389964B (en) | Method for preparing resistive random access memory by using nano shielding layer to perform ion positioning injection | |
CN108565337B (en) | Method for preparing resistive random access memory by using nano shielding layer to perform positioning plasma processing | |
EP3602561B1 (en) | A switching resistor and method of making such a device | |
JP2007311798A (en) | Nonvolatile memory element using oxygen deficient metal oxide and manufacturing method of the same | |
Wang et al. | Improving the electrical performance of resistive switching memory using doping technology | |
CN104054190A (en) | Memristor based on mixed metal oxide | |
CN113113537B (en) | Threshold conversion device and preparation method thereof | |
Hu et al. | High speed and multi-level resistive switching capability of Ta2O5 thin films for nonvolatile memory application | |
CN101872836A (en) | Resistor-type nonvolatile storage device and manufacturing method thereof | |
CN109411600A (en) | A kind of method and its resistance-variable storing device reducing resistance-variable storing device operation voltage | |
Chang et al. | Bipolar resistive switching behavior in sol-gel MgTiNiO x memory device | |
Samanta et al. | Improvement in Threshold Switching Performance Using Al₂O₃ Interfacial Layer in Ag/Al₂O₃/SiOₓ/W Cross-Point Platform | |
Rahmani et al. | Coexistence of volatile and non-volatile resistive switching in Ni/SiO2/Pt memristor device controlled from different current compliances | |
Adiba et al. | Multilevel resistive switching with negative differential resistance in Al/NiO/ZnFe2O4/ITO ReRAM device | |
CN109920911A (en) | The preparation method of resistance-variable storing device | |
CN112467027A (en) | Memristor based on interface doping and preparation method thereof | |
Zhang et al. | The improvement of the embedded Ag nanoislands on the performance of Au/Ag/HfO x/HfO2/Ag-NIs/Au devices | |
CN102185103B (en) | Memory unit of resistance type random access memory and manufacturing method thereof | |
Chuang et al. | The enhanced electrode-dependent resistive random access memory based on BiFeO3 | |
CN112331766B (en) | Memristor based on molybdenum telluride, preparation method thereof and nonvolatile memory | |
KR101134282B1 (en) | Method for manufacturing non-volatile resistance switching memory | |
CN110783457B (en) | Method for improving consistency of resistive random access memory and resistive random access memory | |
Zaffora et al. | TiO2 in memristors and resistive random access memory devices | |
CN103035838A (en) | Resistive random access memory component and preparation method thereof | |
TWI500193B (en) | Memory device and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20210525 |