CN106285624A - A kind of logger data acquisition means and device - Google Patents
A kind of logger data acquisition means and device Download PDFInfo
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- CN106285624A CN106285624A CN201610576879.3A CN201610576879A CN106285624A CN 106285624 A CN106285624 A CN 106285624A CN 201610576879 A CN201610576879 A CN 201610576879A CN 106285624 A CN106285624 A CN 106285624A
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Classifications
-
- E—FIXED CONSTRUCTIONS
- E21—EARTH OR ROCK DRILLING; MINING
- E21B—EARTH OR ROCK DRILLING; OBTAINING OIL, GAS, WATER, SOLUBLE OR MELTABLE MATERIALS OR A SLURRY OF MINERALS FROM WELLS
- E21B47/00—Survey of boreholes or wells
-
- E—FIXED CONSTRUCTIONS
- E21—EARTH OR ROCK DRILLING; MINING
- E21B—EARTH OR ROCK DRILLING; OBTAINING OIL, GAS, WATER, SOLUBLE OR MELTABLE MATERIALS OR A SLURRY OF MINERALS FROM WELLS
- E21B47/00—Survey of boreholes or wells
- E21B47/01—Devices for supporting measuring instruments on drill bits, pipes, rods or wirelines; Protecting measuring instruments in boreholes against heat, shock, pressure or the like
- E21B47/017—Protecting measuring instruments
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- Life Sciences & Earth Sciences (AREA)
- Engineering & Computer Science (AREA)
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- Mining & Mineral Resources (AREA)
- Geophysics (AREA)
- Environmental & Geological Engineering (AREA)
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- General Life Sciences & Earth Sciences (AREA)
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a kind of logger data acquisition means or device, this logger data acquisition means includes: one or more system in package devices.This system in package device includes: analog-digital converter ADC, digital signal processor DSP, on-site programmable gate array FPGA, digital signal processor DDS and memorizer.Wherein, ADC and DDS is connected with FPGA respectively；DSP with FPGA is connected；DSP is connected with memorizer.Pass through the solution of the present invention, it is possible to solve the problem that High Speed Data Acquisition Circuit works long hours under the extreme temperature environment of down-hole continuously.
Description
Technical field
The present invention relates to High-Temperature Well Logging instrument data and gather field, particularly relate to a kind of logger data acquisition means and
Device.
Background technology
Along with the easy minimizing exploiting petroleum resources, the oil-gas exploration degree of depth is the most constantly deepened, exploration and development logger
Corresponding operating ambient temperature is brought up to 200 DEG C of even more high-temperatures by 175 DEG C.Under oil well extreme temperature environment, relevant skill
Art mainly uses thermos flask (Dewar flask) heat-insulating technique, by High Speed Data Acquisition Circuit module (the highest 20MHz of sample frequency
SPS) it is placed in thermos flask (Dewar flask), due to the heat absorption of the heat insulation and built-in heat absorbent of thermos flask, when certain work
Within between, the ambient temperature of data acquisition circuit module is positively retained at less than 85 DEG C, but, the effect of heat insulation of thermos flask is with built-in
The heating power of circuit, the thermal capacity of heat absorbent, the heat conductivity of thermos flask and working time are relevant, by logger chi
The restriction of degree, therefore, thermos flask (Dewar flask) the built-in Acquisition Circuit module working time under oil well extreme temperature environment has
Limit, design objective is usually no more than 10 hours.But, along with the intensification of the oil-gas exploration degree of depth, connector for logging while drilling it is generally required to
Working continuously in down-hole 300 hours, the most current thermos flask (Dewar flask) cannot be applied to surveying with brill of High Temperature High Pressure oil well
In well instrument.
Summary of the invention
In order to solve the problems referred to above, the present invention proposes a kind of logger data acquisition means and device, it is possible to solve
The problem that High Speed Data Acquisition Circuit works long hours under the extreme temperature environment of down-hole continuously.
In order to achieve the above object, the present invention proposes a kind of logger data acquisition means, and this device includes: one
Or multiple system in package device.
This system in package device includes: analog-digital converter ADC, digital signal processor DSP, field programmable gate array
FPGA, digital signal processor DDS and memorizer.
Wherein, ADC and DDS is connected with FPGA respectively；DSP with FPGA is connected；DSP is connected with memorizer.
Alternatively, this system in package device also includes: LTCC LTCC substrate.
The chip wafer of ADC, DSP, FPGA, DDS and memorizer is pasted onto by having the binding agent of resistance to elevated temperatures
On LTCC substrate.
Alternatively, clear opening array is distributed on ltcc substrate.
Alternatively, this system in package device also includes: encapsulation base plate.
LTCC substrate is pasted onto on encapsulation base plate by eutectic substrate.
Alternatively, the thickness of eutectic substrate is less than or equal to the thickness threshold value preset.
Alternatively, the thermal conductivity of encapsulation base plate is more than or equal to the thermal conductivity threshold value preset.
Alternatively, this encapsulation base plate is high-temperature ceramics.
Alternatively, this system in package device also includes: capping.
Capping is connected with encapsulation base plate, forms the cavity sealed, ADC, DSP, FPGA, DDS and memorizer are sealed in this
In cavity.
Alternatively, it is filled with noble gas in cavity.
Alternatively, the chip of ADC, DSP, FPGA and DDS uses the voltage complementation less than or equal to the voltage threshold preset
Metal-oxide semiconductor (MOS) cmos device.
Alternatively, isolation between each chip and the subfunction circuit in this system in package device, is all used to control,
When test environment temperature reaches default high temperature threshold value, close idle chip and/or subfunction circuit.
In order to achieve the above object, the invention allows for a kind of logger data acquisition unit, including described survey
Well instrument data sampler.
Compared with prior art, the embodiment of the present invention includes: one or more system in package devices.This system in package
Device includes: analog-digital converter ADC, digital signal processor DSP, on-site programmable gate array FPGA, digital signal processor
DDS and memorizer.Wherein, ADC and DDS is connected with FPGA respectively；DSP with FPGA is connected；DSP is connected with memorizer.By this
The scheme of invention, it is possible to solve the problem that High Speed Data Acquisition Circuit works long hours under the extreme temperature environment of down-hole continuously.
Accompanying drawing explanation
Illustrating the accompanying drawing in the embodiment of the present invention below, the accompanying drawing in embodiment is for the present invention is entered one
Step understands, is used for explaining the present invention, is not intended that limiting the scope of the invention together with description.
Fig. 1 is the logger data acquisition means structural representation of the embodiment of the present invention；
Fig. 2 is the dsp chip mounting structure schematic diagram of the embodiment of the present invention.
Detailed description of the invention
For the ease of the understanding of those skilled in the art, the invention will be further described below in conjunction with the accompanying drawings, not
Can be used for limiting the scope of the invention.
In current industrial application, some electronic machine needs to work in high temperature environments, such as the instrument of oil well logging industry
Device is usually required to be operated in 150 DEG C, and along with easily exploiting the minimizing of petroleum resources, the oil-gas exploration degree of depth is the most continuous
Deepening, deeper, the oil gas well mining of bigger thermograde are brought into schedule, the work that exploration and development logger is corresponding
Ambient temperature is brought up to 175 DEG C the most higher 200 DEG C by 150 DEG C.But the integrated electricity of 200 DEG C of temperature environments can be operated in
Road device is little, especially lacks the device that high-speed data acquisition is relevant.
Under oil well extreme temperature environment, the technical scheme of current high-temperature electronic mainly uses the heat insulation skill of Dewar flask
Art, is placed on the High Speed Data Acquisition Circuit module of industrial level in Dewar flask, due to the heat insulation and built-in heat absorption of Dewar flask
The heat-absorbing action of agent, within certain working time, the ambient temperature of data acquisition circuit module is positively retained at less than 85 DEG C,
The High Speed Data Acquisition Circuit module of industrial level can reliably working at this temperature.But, the effect of heat insulation of Dewar flask is with interior
The heating power of circuits, the thermal capacity of heat absorbent, the heat conductivity of thermos flask and working time are relevant, by logger
The restriction of yardstick, the working time under oil well extreme temperature environment is limited, and design objective is usually no more than 10 hours.But,
Connector for logging while drilling is in down-hole it is generally required to work more than 100 hours continuously, and the most current Dewar flask cannot be applied to high temperature
In the connector for logging while drilling of high pressure oil wells.
In order to solve the problems referred to above, the present invention proposes a kind of logger data acquisition means, as it is shown in figure 1, this device
Part includes: one or more system in package devices.
This system in package device includes: analog-digital converter ADC, digital signal processor DSP, field programmable gate array
FPGA, digital signal processor DDS and memorizer.
Wherein, ADC and DDS is connected with FPGA respectively；DSP with FPGA is connected；DSP is connected with memorizer.
In embodiments of the present invention, for current thermos flask (Dewar flask) cannot be applied to High Temperature High Pressure oil well with brill
Problem in logger, devises a kind of logger data acquisition means using system in package, by Acquisition Circuit institute
ADC, DSP, FPGA, DDS of needing and memorizer unification are encapsulated as a data acquisition subsystem, overcome the collection in Dewar flask
The problems such as big, the weak heat-dissipating of power consumption that circuit employing discrete component causes.
First below system in package is done and simply introduces:
SIP (System In a Package system in package) is by several functions chip, including processor, memorizer
It is integrated in an encapsulation Deng functional chip, thus realizes a basic complete function.With SOC (System On a Chip
System level chip) corresponding.Except for the difference that system in package is to use different chip to carry out side-by-side or superimposed packaged type, and
The chip product that SOC is then a highly integrated.
SIP encapsulation there is no certain kenel, and for the arrangement mode of chip, SIP can be multi-chip module (Multi-
chipModule；MCM) plane formula 2D encapsulation, it is possible to the structure of recycling 3D encapsulation, effectively to reduce package area；And its
Interior bonds technology can be that simple routing engages (WireBonding), also can use chip bonding (FlipChip), but also
Can the two use with.In addition to the encapsulating structure of 2D Yu 3D, another kind of in the way of multi-functional substrate integrated assembly, it is possible to include in
The covering scope of SIP.Difference assembly is mainly built in Multi-functional base plate by this technology, is also considered as the concept of SIP, reaches
Purpose to Function Integration Mechanism.Different chip arrangement, the interior bonds technology collocation from different, make the encapsulation kenel of SIP
Produce diversified combination, and can the most customized or elastic production according to the demand of client or product.
The High Speed Data Acquisition Circuit system in package of the embodiment of the present invention is by multiple integrated electricity with difference in functionality
Road naked core and passive element are assembled into the subsystem that can provide several functions, then use high thermal conductivity material (such as 10#
Steel, black porcelain) constitute single standard component as encapsulation, this system in package can work 300 continuously when ambient temperature is up to 200 DEG C
Hour.
In embodiments of the present invention, compared with carrying out the system integration on a printed circuit, due in traditional Dewar flask
Acquisition Circuit all use discrete component based on printed circuit board (PCB), connection line between each element is complicated, and distance,
Making spurious impedance the highest, and printed circuit board (PCB) many employings epoxy resin copper coated foil plate is as substrate, heat dispersion is poor, based on
These problems, embodiment of the present invention scheme is encapsulated as unified to ADC, DSP, FPGA, the DDS needed for Acquisition Circuit and memorizer etc.
One data acquisition subsystem, in system in package device, the interconnection line Distance Shortened of each element, reduces spurious impedance, carries
Rise transmission speed, and reduced power consumption, therefore, improve the electric property under high temperature.
The major function of this system in package is measured signal sample via ADC after through FPGA with dsp system to signal
Process, it is achieved that at high speed analog signal data acquisition (sample frequency the highest 20MHz, 12bit per second) and digital signal
Reason, also has asynchronous and synchronous serial communication, multi-path digital input detection simultaneously and exports the additional functions such as control, and module
The internal IO that also expanded except acquisition system drives and single-ended transfer difference drive circuit, extends in order to functions of modules.
For using the SIP module of hybrid technique design, along with the raising of integrated level and reducing of volume, its unit
Power consumption in volume is very big, thus causes the increase of caloric value and steeply rising of temperature, therefore also needs to further by good
Good thermal design reduces module thermal resistance, reduces SIP module temperature rise.The embodiment of the present invention will be described in detail in SIP module whole below
Heat dissipation design on body.
Alternatively, this system in package device also includes: LTCC LTCC substrate.
The chip wafer of ADC, DSP, FPGA, DDS and memorizer is pasted onto by having the binding agent of resistance to elevated temperatures
On LTCC substrate.
In embodiments of the present invention, the heat on each chip or element is mainly passed by SiP heat dissipation by bottom substrate
Leading on SiP shell, then be transmitted to external environment condition by shell, therefore, in such an embodiment, substrate is in heat dissipation channel
Individual key link, the selection of substrate is also required to consider have good heat conductivility, owing to the thermal conductivity of pottery is much larger than pcb board
The thermal conductivity of epoxy resin, therefore, the present embodiment scheme can use LTCC LTCC substrate as encapsulation base
Sheet.
Alternatively, clear opening array is distributed on ltcc substrate.
In embodiments of the present invention, the heat-sinking capability of ltcc substrate is to improve the key of module life, in order to carry further
The heat conductivity of high whole package system, based on current ltcc substrate processing technology, can be carried out on the substrate of thermal source bottom
The making of clear opening array, to reduce the thermal resistance of thermal source, improves the heat-sinking capability of module, it is achieved high temperature resistant SiP module is at environment
The radiating requirements worked at temperature 200 DEG C.It should be noted that the spread pattern of this clear opening array and the size of clear opening
It is not specifically limited, can be according to different application scenarios self-definings.
It addition, in embodiments of the present invention, the binding agent of this resistance to elevated temperatures can use the conduction with high heat conductance
Glue.Further, the material thickness of binding agent needs less than or equal to certain thickness threshold value, i.e. makes bonding in feasible region as far as possible
The thickness ratio of agent is relatively thin, so can effectively reduce system thermal resistance.Here, this thickness threshold value can be according to selected binding agent
Different or applied environment the different temperatures of material carry out different definition, concrete numerical value is not limited
Alternatively, this system in package device also includes: encapsulation base plate.
LTCC substrate is pasted onto on encapsulation base plate by eutectic substrate.
In embodiments of the present invention, when above-mentioned various chips and LTCC substrate carry out system in package, it is required to install
On an encapsulation base plate, equally, in order to reduce thermal resistance, improve thermal conductivity, can be by eutectic substrate by LTCC substrate
It is pasted onto on this encapsulation base plate, or equally uses the conducting resinl with high heat conductance to paste.
Alternatively, the thickness of eutectic substrate is less than or equal to the thickness threshold value preset.
In embodiments of the present invention, in order to effectively reduce system thermal resistance, the thickness of eutectic substrate and the material of conducting resinl
Material thickness needs also exist for less than or equal to certain thickness threshold value, and this thickness threshold value can according to selected adhesive material not
Same or eutectic composition difference carries out different definition, does not limits concrete numerical value.
Alternatively, the thermal conductivity of encapsulation base plate is more than or equal to the thermal conductivity threshold value preset.
In embodiments of the present invention, by foregoing, SiP heat dissipation mainly passes through bottom substrate by each chip
Or the heat on element is transmitted on SiP shell, i.e. on the encapsulation base plate of the embodiment of the present invention, then by shell (encapsulation base plate)
Being transmitted to external environment condition, therefore, encapsulation base plate itself is also a fin, and the material selection of encapsulation base plate affects whole equally
The heat dispersion of individual system.In embodiments of the present invention, the thermal conductivity for encapsulation base plate can limit, in advance such as this
The thermal conductivity of the encapsulation base plate in bright embodiment scheme is more than or equal to the thermal conductivity threshold value preset, to ensure that encapsulation base plate has
Good heat conductivility.Here, this thermal conductivity threshold value can carry out self-defined according to different applied environments, such as, works as application
When ambient temperature is the highest, this thermal conductivity threshold value can be larger, and when applied environment temperature is relatively low, this thermal conductivity threshold value can be little
Some.Applied environment based on the embodiment of the present invention is more than 150 degree, simultaneously takes account of Cost Problems, and this thermal conductivity threshold value can
To be limited to 0.1W/cm DEG C or 0.15W/cm DEG C, restriction based on this thermal conductivity, alternatively, this encapsulation base plate can be high temperature
Pottery, thermal conductivity 0.17W/cm DEG C of high-temperature ceramics.
Alternatively, this system in package device also includes: capping.
Capping is connected with encapsulation base plate, forms the cavity sealed, ADC, DSP, FPGA, DDS and memorizer are sealed in this
In cavity.
Alternatively, it is filled with noble gas in cavity.
In embodiments of the present invention, in order to prevent because of in air the gas such as water vapour, oxygen at high temperature to materials such as wafers
There is oxidation and corrosion in material, the present embodiment have also been devised capping, and this capping is connected with encapsulation base plate, forms the cavity sealed, will
The chip such as ADC, DSP, FPGA, DDS and memorizer or device sealing are in this cavity, and in order to prevent the oxygen of circuit further
Change and corrosion, in this cavity, be filled with noble gas, with thoroughly isolation inside chip and device at high temperature with in air
The gas such as water vapour, oxygen contacts.
Alternatively, this noble gas is nitrogen.
Current air-tight packaging circuit is substantially all under high pure nitrogen environment encapsulation, carries out air-tightness inspection after encapsulation again
The projects such as survey, screening.Circuit air pressure inside is in theory more than or equal to 1 atmospheric pressure.
Alternatively, the spun gold material mixed with palladium is used to be bonded.
, there is the heterogeneous bonding system of gold-aluminum, can produce in the environment of long term high temperature in spun gold bonding on aluminum membrane DNA chip
Kinkendal Effect, causes bond strength serious degradation, contact resistance can be made simultaneously to increase, electrical property Sensitive Apparatus is caused shadow
Ring.Embodiment of the present invention scheme is by selecting the spun gold material mixed with palladium to be bonded, and the palladium in bonding wire is to chemical combination between gold aluminum
The generation of thing serves certain inhibitory action, makes bond strength degradation trend slow down.
Above content is the heat dissipation design that the embodiment of the present invention considers to carry out from SIP module overall structure, in order to from root
Reducing the caloric value of thermal source in basis, the embodiment of the present invention has also carried out heat radiation from the selection of device itself and has considered.
Alternatively, the chip of ADC, DSP, FPGA and DDS uses the voltage complementation less than or equal to the voltage threshold preset
Metal-oxide semiconductor (MOS) cmos device.
In embodiments of the present invention, in order to reduce power consumption, the application of device is selected, due to low-voltage device
Power consumption is less, and the heat of generation is less, mainly selects low-voltage device, it addition, the material of cmos device is silicon semiconductor
Compound, silicon has relatively low thermal impedance and higher thermal conductivity, considers device cost and heat conductivility, in the present embodiment
Chip all can use cmos device.
Alternatively, isolation between each chip and the subfunction circuit in this system in package device, is all used to control,
When test environment temperature reaches default high temperature threshold value, close idle chip and/or subfunction circuit.
In embodiments of the present invention, in order to reduce power consumption by device itself further, thus reduce the generation of heat, can
With when test environment temperature reaches default high temperature threshold value, close idle chip and/or subfunction circuit, such as,
Under hot operation state, the devices such as FPGA are closed.The high temperature here preset at therewith can be fixed voluntarily according to different application scenarios
Justice, is not particularly limited.
Below by as a example by the dsp chip maximum by power consumption, the heat dissipation design effect of the embodiment of the present invention is analyzed.
Before carrying out labor, need first to determine the concrete mounting structure of dsp chip, in this embodiment, DSP core
Sheet uses conductive adhesive to LTCC substrate, and on LTCC substrate conductive adhesive to encapsulation base plate, encapsulation base plate is high temperature
Ceramic material, as shown in Figure 2.
The every kind of assembled material relevant parameter and the thermal resistance value that use in module are as shown in table 1:
| Sequence number | Title material | Thermal conductivity | Thickness | Equivalence heat radiation sectional area | Thermal resistance value |
| 1 | Silicon | 0.91W/cm℃ | 0.03cm | 0.675cm×0.655cm | 0.07℃/W |
| 2 | Conducting resinl | 0.016W/cm℃ | 0.01cm | 0.685cm×0.665cm | 1.37℃/W |
| 3 | LTCC | 0.03W/cm℃ | 0.1cm | 0.795cm×0.775cm | 5.41℃/W |
| 4 | Conducting resinl | 0.016W/cm℃ | 0.01cm | 0.905cm×0.885cm | 0.78℃/W |
| 5 | High-temperature ceramics | 0.17W/cm℃ | 0.2cm | 1.115cm×1.095cm | 0.96℃/W |
Table 1
Entire thermal resistance between dsp chip to the external world includes: chip self thermal resistance R1；Thermal resistance R2 of conducting resinl；LTCC base
Sheet thermal resistance R3；Thermal resistance R4 of conducting resinl；Thermal resistance R5 of encapsulation base plate.Being series relationship between every layer, entire thermal resistance is calculated as follows:
Dsp chip maximum power dissipation is 1.5W, and chip temperature rise is 13 DEG C.Therefore, the heat radiation in embodiment of the present invention scheme sets
Under meter, dsp chip can keep relatively low temperature rise.
It addition, by table 1 it is also seen that be ltcc substrate, die bonding respectively to the factor that module Effect of Thermal Performance is maximum
Conducting resinl, high-temperature ceramics shell, the conducting resinl of substrate bonding.Thermal design it is crucial that reduce ltcc substrate and adhesives
Thermal resistance.Therefore, the dsp chip that power consumption is maximum can be considered 3 kinds of different packaging technologies:
(1) conventional ltcc substrate Wiring technique, ltcc substrate is connected selection reflow welding, about 7 DEG C/W of thermal resistance with shell；
(2) on ltcc substrate, carry out heat through-hole design, reduce ltcc substrate thermal resistance, about 5 DEG C/W of thermal resistance；
(3) opening straight-through cavity on ltcc substrate, dsp chip is adhered directly to high-temperature ceramics shell (i.e. encapsulation base plate)
On, about 2.5 DEG C/W of thermal resistance.
In order to achieve the above object, the invention allows for a kind of logger data acquisition unit, including described survey
Well instrument data sampler.
Compared with prior art, the present invention includes: one or more system in package devices.This system in package device bag
Include: analog-digital converter ADC, digital signal processor DSP, on-site programmable gate array FPGA, digital signal processor DDS and deposit
Reservoir.Wherein, ADC and DDS is connected with FPGA respectively；DSP with FPGA is connected；DSP is connected with memorizer.By the side of the present invention
Case, it is possible to solve the problem that High Speed Data Acquisition Circuit works long hours under the extreme temperature environment of down-hole continuously.System-level envelope
The interconnection line Distance Shortened of element in dress, it is possible to decrease spurious impedance, promotes transmission speed, reduces power consumption, and make under high temperature is electric
Performance is improved；Metallic shield used by system in package and internal noble gas play the work of protection key signal cabling
With, the corrosive gas impact produced from outside electromagnetic interference and hot environment, make high temperature reliability be improved；System-level
Encapsulation employing high thermal conductivity materials is as shell, and naked core is by good thermally contacting between substrate and encapsulation, can will encapsulate
The heat distributed during intra subsystem work is fully discharged in environment, can significantly reduce internal integrated circuit naked core and environment temperature
The temperature difference between degree, in raising system in package, the ambient temperature of the highest allowable work of integrated circuit, improves Department of Electronics
System temperature grade.
In sum, the embodiment of the present invention has the advantage that
1, hot property is significantly improved
Because good thermally contacting between high thermal conductivity materials, and naked core with encapsulation used by system in package, will encapsulation
The heat distributed during intra subsystem work is fully discharged in environment, therefore system in package can significantly reduce internal integrated circuit
The temperature difference between naked core and ambient temperature, the ambient temperature of the highest allowable work of integrated circuit in raising system in package.
2, the reliability under hot operation is improved；
1. metallic shield and inert gas shielding key signal cabling, the corrosive gas produced from hot environment are used
Impact.
2. bonding technology is improved, it is to avoid metallization reaction occurs between aluminum pad and gold thread under high temperature.
3, electric property is optimized
In system in package, element integration packaging is in unified shell mechanism, effectively reduces outside total solder joint；Pass through
Shorten crucial cable run distance, reduce spurious impedance, promote transmission speed, improve electromagnetic interference, strengthen noise resisting ability, and reduce
Power consumption.
Understand it should be noted that embodiment described above is for only for ease of those skilled in the art, and
It is not used in and limits the scope of the invention, on the premise of without departing from the inventive concept of the present invention, those skilled in the art couple
Any obvious replacement that the present invention is made and improvement etc. are all within protection scope of the present invention.
Claims (10)
1. a logger data acquisition means, it is characterised in that described device includes: one or more system in package devices
Part；
Described system in package device includes: analog-digital converter ADC, digital signal processor DSP, field programmable gate array
FPGA, digital signal processor DDS and memorizer；
Wherein, described ADC and described DDS is connected with described FPGA respectively；Described DSP is connected with described FPGA；Described DSP and institute
State memorizer to connect.
2. logger data acquisition means as claimed in claim 1, it is characterised in that described system in package device also wraps
Include: LTCC LTCC substrate；
The chip wafer of described ADC, DSP, FPGA, DDS and memorizer is pasted onto institute by having the binding agent of resistance to elevated temperatures
State on LTCC substrate.
3. logger data acquisition means as claimed in claim 2, it is characterised in that described system in package device also wraps
Include: encapsulation base plate；
Described LTCC substrate is pasted onto on described encapsulation base plate by eutectic substrate.
4. logger data acquisition means as claimed in claim 3, it is characterised in that be distributed straight on described ltcc substrate
Via-hole array.
5. logger data acquisition means as claimed in claim 3, it is characterised in that described encapsulation base plate is high temperature pottery
Porcelain.
6. logger data acquisition means as claimed in claim 3, it is characterised in that described system in package device also wraps
Include: capping；
Described capping is connected with described encapsulation base plate, forms the cavity sealed, by described ADC, DSP, FPGA, DDS and memorizer
It is sealed in described cavity.
7. logger data acquisition means as claimed in claim 6, it is characterised in that be filled with indifferent gas in described cavity
Body.
8. logger data acquisition means as claimed in claim 1, it is characterised in that described ADC, DSP, FPGA and DDS
Chip use voltage less than or equal to the complementary metal oxide semiconductors (CMOS) cmos device of voltage threshold preset.
9. logger data acquisition means as claimed in claim 1, it is characterised in that in described system in package device
Isolation is all used to control between each chip and subfunction circuit, when test environment temperature reaches default high temperature threshold value,
Close idle chip and/or subfunction circuit.
10. a logger data acquisition unit, it is characterised in that include the survey as described in claim 1-9 any one
Well instrument data sampler.
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| CN201610576879.3A CN106285624A (en) | 2016-07-20 | 2016-07-20 | A kind of logger data acquisition means and device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610576879.3A CN106285624A (en) | 2016-07-20 | 2016-07-20 | A kind of logger data acquisition means and device |
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| CN106285624A true CN106285624A (en) | 2017-01-04 |
Family
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