CN106253655B - DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up - Google Patents

DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up Download PDF

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Publication number
CN106253655B
CN106253655B CN201610679742.0A CN201610679742A CN106253655B CN 106253655 B CN106253655 B CN 106253655B CN 201610679742 A CN201610679742 A CN 201610679742A CN 106253655 B CN106253655 B CN 106253655B
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input
circuit
output
door
termination
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CN106253655A (en
Inventor
罗萍
黄龙
邱双杰
王康乐
刘泽浪
甄少伟
曾鹏灏
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Shenzhen Taide Semiconductor Co ltd
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention belongs to electronic circuit technology field, it is related to the DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up.The adaptive dead zone generation circuit samples the load current of DC-DC converter by current sampling circuit, and is converted to information of voltage, obtains input voltage of the sampled voltage as integrator circuit；Integral control circuit controls the integral of integrator circuit；Last waveform processing circuit obtains the power tube grid drive signal containing adaptive dead zone after handling the output waveform of integrator circuit.Beneficial effects of the present invention are effectively adaptively to provide optimal dead time for power tube according to the load situation of change of DC-DC converter, ensure that the no-voltage of power tube is opened.The circuit is compared with the fixed dead-zone circuit of tradition, and the conduction loss of switching tube is approximately zero, and output waveform is more stablized under different loading conditions, can effectively improve the efficiency of DC-DC converter.

Description

DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up
Technical field
The invention belongs to electronic circuit technology field, it is related to the DC-DC converter adaptive dead zone based on zero voltage start-up Generation circuit.
Background technology
In DC-DC converter, the conducting resistance very little of power tube, if two power tubes are opened simultaneously, it may appear that electricity Source to the low impedance path on ground, the electric current for flowing through power tube will be very big, which can reach ampere levels, make the power consumption of chip It greatly increases, when serious power tube or even entire chip can seriously damaged.Therefore generally by adding between two power tubes Enter dead time to prevent from simultaneously turning on the high low side power tube of arm in the course of work.Common practice is using regular length Dead time, its advantage is that design is convenient and simple, reliability is high, and its disadvantage is also particularly evident：Fixed dead time is relatively light It will appear the case where high-low power pipe simultaneously closes off longer time under load, load voltage, current wave that thus can be to driving Shape has an impact, and can further cause efficiency low and the problem of stability difference.
Invention content
It is to be solved by this invention, aiming at the above problem, propose that the DC-DC converter based on zero voltage start-up is adaptive Answer dead-zone generating circuit.
To achieve the above object, the present invention adopts the following technical scheme that：
DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up, including load current sample circuit, product Divide device circuit, integral control circuit and waveform processing circuit；The input of load current sample circuit terminates the defeated of DC-DC converter Go out voltage, the first input end of the output termination integrator circuit of load current sample circuit；Second input of integrator circuit Terminate the output end of integral control circuit, the third input termination PWM input signals of integrator circuit, the output of integrator circuit Terminate the first input end of the first input end and integral control circuit of waveform processing circuit；Second input of integral control circuit Terminate PWM input signals；Second input termination PWM input signals of waveform processing circuit, the output end of waveform processing circuit are defeated Go out the grid drive signal containing the adaptive dead zone time.
Wherein PWM input signals are that the power tube gate control signal of dead time, waveform processing are free of in DC-DC converter The output of circuit is the output signal of the present invention.
The total technical solution of the present invention samples the load current of DC-DC converter by current sampling circuit, and It is converted to information of voltage, obtains input voltage of the sampled voltage as integrator circuit, integral control circuit is to integrator circuit Integral controlled, last waveform processing circuit is obtained after handling the output waveform of integrator circuit containing adaptive The power tube grid drive signal in dead zone.
The load current sample circuit is made of 3rd resistor RL, the 4th resistance Rsense and operational amplifier；The The output end of a termination DC-DC converter of three resistance RL, one end of the 4th resistance Rsense of another termination of 3rd resistor RL； The other end of 4th resistance Rsense is grounded；The positive input termination 3rd resistor RL's and the 4th resistance Rsense of operational amplifier Common end, negative input end and output end short circuit, the output end of operational amplifier are the output of the load current sample circuit End；
The waveform processing circuit is by third comparator COMP3, the 4th comparator COMP4, two inputs and door AND2, two Input or door OR3 are constituted；The positive input of third comparator COMP3 terminates biasing voltage signal Vref3, negative input termination integral The output end of device circuit, the first input end of output termination two input and door AND2；The positive input terminal of 4th comparator COMP4 Connect the output end of integrator circuit, negative input terminates biasing voltage signal Vref4, two input of output termination or door OR3's Second input terminal；Two inputs and the second of door AND2 the input termination pwm signal, output end are the of the waveform processing circuit One output end；The first input end of two inputs or door OR3 connect pwm signal, and output end is the second of the waveform processing circuit Output end.
Further, the integrator circuit is by first resistor R1, second resistance R2, the first NMOS tube MN1, the 2nd NMOS Pipe MN2, third NMOS tube MN3, the first PMOS tube MP1, the second PMOS tube MP2, capacitance C and operational amplifier are constituted；First electricity Hinder the output end of a termination load current detection circuit of R1, the drain terminal of the first NMOS tube MN1 of another termination；Second resistance R2 One termination the second PMOS tube MP2 drain terminal, the other end ground connection；The grid of first NMOS tube MN1 connects pwm signal, source electrode Connect the drain terminal of the second NMOS tube MN2；The grid of second NMOS tube MN2 meets the output Vc of integral control circuit, and source electrode connects operation The negative input end of amplifier；The grid of third NMOS tube MN3 connects pwm signal, source electrode ground connection, and drain electrode connects operational amplifier Positive input terminal；The grid of first PMOS tube MP1 connects pwm signal, and source electrode connects the output end of load current detection circuit, drain electrode Connect the positive input terminal of operational amplifier；The grid of second PMOS tube MP2 connects pwm signal, and source electrode connects the source of the first NMOS tube MN1 Pole, grounded drain；Capacitance C positive plates connect the negative input end of operational amplifier, and negative plate connects the output of operational amplifier；Fortune The output end for calculating amplifier is the output end of the integrator circuit.
Further, the integral control circuit by first comparator COMP1, the second comparator COMP2, phase inverter INV, First liang of input or door OR1, second liang of input or door OR2, two inputs are constituted with door AND1；First comparator COMP1's is just defeated Enter to terminate biasing voltage signal Vref1, negative input terminates the output end of integrator circuit, the first liang of input of output termination or The first input end of door OR1；The output end of the positive input termination integrator circuit of second comparator COMP2；Its negative input terminates The second input terminal of biasing voltage signal Vref2, the second liang of input of output termination or door OR2；The input of phase inverter INV terminates The first input end of pwm signal, the second liang of input of output termination or door OR2；The second input terminal of first liang of input or door OR1 Pwm signal is connect, output connects the first input end of two inputs and door AND1；Second liang of input or the output of door OR2 termination two are defeated Enter the second input terminal with door AND1；The output end of two inputs and door AND1 are the output Vc of the Integral Processing circuit.
Further, described bias voltage Vref1, Vref2, Vref3 and Vref4 have following relationship, Vref1>Vref4 >Vref3>Vref2；And (Vref1-Vref2)s >2|Vref3-Vref2|And Vref1-Vref4=Vref3-Vref2；Vref1– The value of Vref4 and Vref3-Vref2 is big by the output voltage of DC-DC converter, SW point equivalent capacitys and integrating capacitor C's Small decision, the product for being embodied in Vref1-Vref4 and integrating capacitor are equal to SW point equivalent capacitys and DC-DC converter output The common drain terminal current potential of two switching power tubes in the product of voltage, wherein SW point current potential, that is, DC-DC converter.
Beneficial effects of the present invention are, can be effectively adaptively work(according to the load situation of change of DC-DC converter Rate pipe provides optimal dead time, ensures that the no-voltage of power tube is opened.The circuit is opened compared with the fixed dead-zone circuit of tradition The conduction loss for closing pipe is approximately zero, and output waveform is more stablized under different loading conditions, can effectively improve DC-DC transformation The efficiency of device.
Description of the drawings
Fig. 1 is the DC-DC converter adaptive dead zone circuit structure block diagram based on zero voltage start-up of the present invention；
Fig. 2 is load current sample circuit schematic diagram；
Fig. 3 is integrator circuit schematic diagram；
Fig. 4 is integral control circuit schematic diagram；
Fig. 5 is waveform processing circuit schematic diagram；
Fig. 6 is the waveform diagram of the DC-DC converter adaptive dead zone circuit based on zero voltage start-up.
Specific implementation mode
Fig. 1 is the DC-DC converter adaptive dead zone circuit structure block diagram based on zero voltage start-up of the present invention, such as Fig. 1 Shown, the load current of load current sampling circuit samples DC-DC converter is simultaneously electric using the current signal of sampling as integrator The input on road.For integrator circuit using the electric current as the charging and discharging currents of integrating capacitor C, charging, stops charge and discharge at electric discharge State passes through the product of logic judgment integrator by pwm signal and Vc signal co- controllings, wherein Vc signals by integral control unit It is generated after isloation state.By above-mentioned steps, integrator module will export trapeziodal voltage signal and be input to waveform processing circuit, and should The slope of trapeziodal voltage signal is determined by the size of the load current of DC-DC converter, therefore has adaptivity.Last waveform Processing circuit handles the trapeziodal voltage signal, generates the lower power tube grid drive signal with adaptive dead zone.This Invention devises mentioned load current sample circuit, integrator circuit, integral control circuit and waveform processing circuit.
Fig. 2 load current sample circuit schematic diagrams, RL are the load of DC-DC converter, and Rsense is sampling resistor, resistance The resistance value selection of Rsense should be much smaller than resistance RL.According to the empty short empty disconnected principle of operational amplifier, the current sampling circuit Output voltage Vsense be the both ends sampling resistor Rsense voltage, can be in load current sample circuit in subsequent conditioning circuit Output end connect a resistance identical with Rsense resistance values again, with obtain with the electric current of DC-DC converter load current equivalence, Complete the sampling to load current.
Fig. 3 and Fig. 4 is respectively the schematic diagram of integrator circuit and integral control circuit, if the initial value of Vc is high level, When PWM is high level, MN1, MN2 and MN3 pipe conducting in integrator circuit, the positive input terminal ground connection of amplifier, according to empty short The disconnected principle of void, negative input end are also 0 current potential.Voltage Vsense loads electricity by being converted into after resistance R1 with DC-DC converter It flowing equivalent electric current and charges to capacitance, Vout starts to discharge at this time, when Vout is less than voltage Vref2, integration control In circuit the defeated COMP2 of the second comparator go out low level to second liang input or door OR2 the second input terminal, make second liang input or Door OR2 exports low level, eventually passes through two inputs and is set to low level, the cut-off of MN2 pipes with Vc after door AND1, electric discharge stops.At this time PWM remains as high level, and before the arriving of its low level, capacitance neither charges nor discharges.When PWM is to become low level, integral First liang of input of control circuit or door OR1 and second liang of input or door OR2 export high level, and Vc is set to high electricity again at this time It is flat.MN2, MP1 and MP2 pipe conducting in integrator circuit, the positive input terminal of amplifier are connected to current potential Vsense, according to empty short empty disconnected Principle, negative input end are also Vsense current potentials, and negative input end voltage Vsense after resistance R2 to ground by being converted into and DC-DC The electric current of converter load current equivalence simultaneously discharges to capacitance, and Vout starts to discharge at this time, when Vout is higher than voltage Vref1 When, first comparator COMP1 exports low level to first liang of input or the first input end of door OR1 in integral control circuit, makes First liang of input or door OR1 export low level, eventually pass through two inputs and are set to low level, the cut-off of MN2 pipes with Vc behind the door, charging stops Only.PWM remains as low level at this time, and before the arriving of its high level, capacitance neither charges nor discharges.When PWM becomes high level When, first liang of integral control circuit input or door OR1 and second liang of input or door OR2 export high level, and Vc is again at this time It is set to high level, that is, returns to original hypothesis value；Wherein biasing voltage signal Vref1 is more than biasing voltage signal Vref2, and (Vref1-Vref2)>2|Vref3-Vref2|.It as a result, can be to integrated signal by integrator circuit and integral control circuit Positive integral, reverse integral, terminate integral and controlled, and then required specification trapezoidal wave is obtained, for the wave of next step Shape processing is prepared.
Fig. 5 is waveform processing circuit schematic diagram, and Fig. 6 is the DC-DC converter adaptive dead zone electricity based on zero voltage start-up The waveform diagram on road, the input of waveform processing circuit terminate the output of integrator circuit, the integrated signal in as Fig. 6.Such as Shown in Fig. 6, integrated signal is handled as follows in waveform processing circuit：When pwm signal is high level and integrated signal voltage value When higher than bias voltage Vref3, the first output end GH of waveform processing circuit exports high level, remaining situation exports low level； When pwm signal is high level or integrated signal voltage value is higher than bias voltage Vref4, the second output of waveform processing circuit GL is held to export high level, remaining situation exports low level；Wherein biasing voltage signal Vref4 is more than biasing voltage signal Vref3, That is Vref1>Vref4>Vref3>Vref2, and Vref1-Vref4=Vref3-Vref2.In order to ensure that the no-voltage of power tube is opened It opens, the value of Vref1-Vref4 and Vref3-Vref2 is by the output voltage of DC-DC converter, SW point equivalent capacitys and integral The size of capacitance C determines that the product for being embodied in Vref1-Vref4 and integrating capacitor is equal to SW point equivalent capacitys and DC-DC The product of converter output voltage.By waveform processing circuit, the power containing adaptive dead zone time tdr and tdf is produced Pipe grid drive signal GH and GL, according to the difference of loading condition, dead time tdr and tdf meeting adaptive change, in figure Load1 and load2 is two different loading conditions, since the input integral electric current of integrator circuit is to DC-DC converter The sample rate current of load current so that the slope for integrating filtered output changes because of the variation of loading condition.It is loading as a result, In the case of load1, the dead zone length of generation is tdr1 and tdf1；In the case where loading load2, the dead zone length of generation is Tdr2 and tdf2.

Claims (4)

1. the DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up, including load current sample circuit, integral Device circuit, integral control circuit and waveform processing circuit；The output of the input termination DC-DC converter of load current sample circuit Voltage, the first input end of the output termination integrator circuit of load current sample circuit；Second input terminal of integrator circuit Connect the output end of integral control circuit, the third input termination PWM input signals of integrator circuit, the output end of integrator circuit The first input end of welding wave processing circuit and the first input end of integral control circuit；Second input terminal of integral control circuit Connect PWM input signals；Second input termination PWM input signals of waveform processing circuit, the output end output of waveform processing circuit Grid drive signal containing the adaptive dead zone time；
The load current sample circuit is made of 3rd resistor RL, the 4th resistance Rsense and operational amplifier；Third electricity Hinder the output end of a termination DC-DC converter of RL, one end of the 4th resistance Rsense of another termination of 3rd resistor RL；4th The other end of resistance Rsense is grounded；The positive input termination 3rd resistor RL's and the 4th resistance Rsense of operational amplifier is public End, negative input end and output end short circuit, the output end of operational amplifier are the output end of the load current sample circuit；
The waveform processing circuit is by third comparator COMP3, the 4th comparator COMP4, two inputs and door AND2, two inputs Or door OR3 is constituted；The negative input of third comparator COMP3 terminates biasing voltage signal Vref3, and positive input terminates integrator electricity The output end on road, the first input end of output termination two input and door AND2；The positive input termination product of 4th comparator COMP4 The output end of device circuit, negative input is divided to terminate biasing voltage signal Vref4, output terminates the second of two inputs or door OR3 Input terminal；Two inputs and the second of door AND2 the input termination pwm signal, output end are the first defeated of the waveform processing circuit Outlet；The first input end of two inputs or door OR3 connect pwm signal, and output end is the second output of the waveform processing circuit End.
2. the DC-DC converter adaptive dead zone generation circuit according to claim 1 based on zero voltage start-up, feature It is, the integrator circuit is by first resistor R1, second resistance R2, the first NMOS tube MN1, the second NMOS tube MN2, third NMOS tube MN3, the first PMOS tube MP1, the second PMOS tube MP2, capacitance C and operational amplifier are constituted；One end of first resistor R1 Connect the output end of load current detection circuit, the drain terminal of the first NMOS tube MN1 of another termination；A termination the of second resistance R2 The drain terminal of two PMOS tube MP2, other end ground connection；The grid of first NMOS tube MN1 connects pwm signal, and source electrode meets the 2nd NMOS The drain terminal of pipe MN2；The grid of second NMOS tube MN2 meets the output Vc of integral control circuit, and source electrode connects the negative of operational amplifier Input terminal；The grid of third NMOS tube MN3 connects pwm signal, source electrode ground connection, and drain electrode connects the positive input terminal of operational amplifier； The grid of first PMOS tube MP1 connects pwm signal, and source electrode connects the output end of load current detection circuit, and drain electrode connects operation and puts The positive input terminal of big device；The grid of second PMOS tube MP2 connects pwm signal, and source electrode connects the source electrode of the first NMOS tube MN1, and second The drain electrode of PMOS tube MP2 is grounded after second resistance R2；Capacitance C positive plates connect the negative input end of operational amplifier, cathode Plate connects the output of operational amplifier；The output end of operational amplifier is the output end of the integrator circuit.
3. the DC-DC converter adaptive dead zone generation circuit according to claim 2 based on zero voltage start-up, feature Be, the integral control circuit by first comparator COMP1, the second comparator COMP2, phase inverter INV, first liang input or Door OR1, second liang of input or door OR2, two inputs are constituted with door AND1；The positive input of first comparator COMP1 terminates biased electrical Signal Vref1, negative input is pressed to terminate the output end of integrator circuit, output terminates the first of first liang of input or door OR1 Input terminal；The output end of the positive input termination integrator circuit of second comparator COMP2, negative input terminate biasing voltage signal The second input terminal of Vref2, the second liang of input of output termination or door OR2；The input of phase inverter INV terminates pwm signal, defeated Go out second liang of input of termination or the first input end of door OR2；The second input termination pwm signal of first liang of input or door OR1, Output connects the first input end of two inputs and door AND1；Second liang of input or two input of output termination of door OR2 are with door AND1's Second input terminal；The output end of two inputs and door AND1 are the output Vc of the Integral Processing circuit.
4. the DC-DC converter adaptive dead zone generation circuit according to claim 3 based on zero voltage start-up, feature It is, described bias voltage Vref1, Vref2, Vref3 and Vref4 have following relationship, Vref1>Vref4>Vref3> Vref2；And (Vref1-Vref2)s >2|Vref3-Vref2|And Vref1-Vref4=Vref3-Vref2；Vref1-Vref4 with The value of Vref3-Vref2 determines by the size of the output voltage of DC-DC converter, SW point equivalent capacitys and integrating capacitor C, The product for being embodied in Vref1-Vref4 and integrating capacitor is equal to SW point equivalent capacitys and DC-DC converter output voltage Product.
CN201610679742.0A 2016-08-17 2016-08-17 DC-DC converter adaptive dead zone generation circuit based on zero voltage start-up Active CN106253655B (en)

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CN116846196B (en) * 2023-06-05 2024-01-05 广东工业大学 Control circuit applied to high-gain converter

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