CN106233479A - Light-emitting device - Google Patents

Light-emitting device Download PDF

Info

Publication number
CN106233479A
CN106233479A CN201580021604.7A CN201580021604A CN106233479A CN 106233479 A CN106233479 A CN 106233479A CN 201580021604 A CN201580021604 A CN 201580021604A CN 106233479 A CN106233479 A CN 106233479A
Authority
CN
China
Prior art keywords
electrode pad
lateral electrode
light
type
width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201580021604.7A
Other languages
Chinese (zh)
Other versions
CN106233479B (en
Inventor
梅津典雄
松村孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Dexerials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dexerials Corp filed Critical Dexerials Corp
Publication of CN106233479A publication Critical patent/CN106233479A/en
Application granted granted Critical
Publication of CN106233479B publication Critical patent/CN106233479B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/27312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29005—Structure
    • H01L2224/29007—Layer connector smaller than the underlying bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32104—Disposition relative to the bonding area, e.g. bond pad
    • H01L2224/32105—Disposition relative to the bonding area, e.g. bond pad the layer connector connecting bonding areas being not aligned with respect to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials

Abstract

In the N-shaped side that is formed on substrate 20 the bonding cream of anisotropic conductive 30 should be used to be arranged on by light-emitting component 10 bumpless ground flip-chip, the light-emitting device 100 of N-shaped lateral electrode pad 21,22, it is set to solve suppression short circuit simultaneously and improves radiating efficiency the two problem.In the N-shaped side that is formed on substrate 20 using the bonding cream of anisotropic conductive 30 to be arranged on by light-emitting component 10 bumpless ground flip-chip, the light-emitting device 100 of p-type lateral electrode pad 21,22, make N-shaped side, p-type lateral electrode pad 21,22 width and the width of light-emitting component 10 equal or narrower than it.

Description

Light-emitting device
Technical field
The present invention relates to the use of the bonding cream of anisotropic conductive by light-emitting component flip-chips such as light emitting diode (LED) chips It is arranged on the light-emitting device of substrate.
Background technology
When the light-emitting components such as light emitting diode (LED) chip are arranged on substrate, with Au wire bonding technique method phase Ratio, extensively application can be expected to improve light extraction efficiency or the flip-chip process method (patent documentation 1) of heat dissipation characteristics.But, LED The light-emitting components such as chip, generally in cutting (dicing) step after bigbore semiconductor crystal wafer assembles many light-emitting components In cut-off, be made as the semiconductor chip of light-emitting component, if the anisotropically conducting adhesive attachment containing conducting particles To the side of semiconductor chip, then due to the block of many conducting particles of populated with, semiconductor layer can be there is and electrically connect with electrode, Produce this problem of poor short circuit.
Therefore, carry out flip-chip installation by being pre-formed projection (bump) at light-emitting component or substrate, thus prevent Produce short circuit.Specifically, such as the top view of Fig. 3 A(light-emitting device), Fig. 3 B(light-emitting device of watching from the A direction of Fig. 3 A Side view) shown in, by N-shaped side element electrode 111 and the p-type side element electrode at chip body 131 back side of light-emitting device 110 112 respectively via anisotropic conductive bonding cream 130 thermo-compressed in the N-shaped side on surface of the substrate 120 being formed with gold projection Bp Electronic pads 121 and p-type lateral electrode pad 122, thus carry out flip-chip installation.In this case, in order to ensure turning on reliability, one For as, the width L1 of N-shaped lateral electrode pad 121 is configured to more than chip body 131 with the width L2 of p-type lateral electrode pad 122 Width L0, and width Lla, L2a, L1b, L2b of projection are set to more than the 30 μm 50 following degree of μm.
Prior art literature
Patent documentation
Patent documentation 1: Japanese Unexamined Patent Publication 2007-123613 publication.
Summary of the invention
The problem that invention is to be solved
But, in the case of the light-emitting device using projection as in figure 3 a and constitute, although short circuit can be suppressed, but gold is convex It is the highest that block forms cost, additionally, due to the luminescent layer sending the light-emitting component of light and heat is remote with the distance of substrate, therefore exists The problem that heat dissipation characteristics declines (in other words, thermal resistance increases).Therefore, it is also contemplated that light-emitting device is set to bumpless (bumpless) structure, but, although have and improve this advantage without gold projection formation this advantage of cost and heat dissipation characteristics, But worry as before to produce short circuit.So, present situation is to seek solve suppression short circuit simultaneously and improve heat dissipation characteristics the two The light-emitting device of the bumpless structure of problem.
It is an object of the invention to want to solve problem of the prior art point, incite somebody to action the bonding cream of anisotropic conductive should be used Light-emitting component bumpless ground flip-chip is arranged in the light-emitting device of the electronic pads being formed on substrate, can solve to suppress short simultaneously Road and raising heat dissipation characteristics the two problem.
For solving the scheme of problem
The present inventors send out currently use the bonding cream of anisotropic conductive by light-emitting component bumpless ground flip-chip be arranged on formation In the light-emitting device of the electronic pads on substrate, equal by the width of the width Yu light-emitting component that make the electronic pads on substrate or Narrower than it, thus the electronic pads on substrate and the bonding cream of anisotropic conductive overflowed between light-emitting component are maintained at than electricity The light-emitting component of the relief width of polar cushion and light-emitting component and the gap of substrate surface, therefore, it is possible to prevent short between P layer and N shell Road, and due to bumpless carry out flip-chip installation, therefore, it is possible to compression manufacturing cost, and can improve heat dissipation characteristics (fall Low thermal resistance), complete the present invention.
That is, the present invention is to use the bonding cream of anisotropic conductive will to have the light-emitting component of the chip body of quasiconductor without convex Block ground flip-chip is arranged on the light-emitting device of the electronic pads being formed on substrate, is the width with electronic pads and described chip body Width equal or than its narrow light-emitting device being characterized.
Additionally, the present invention is light-emitting device, be described chip body be the light-emitting device of light-emitting diode chip for backlight unit.
Additionally, the present invention is light-emitting device, be the width of described chip body is set to 100 in the case of, described electrode The light-emitting device that width is less than more than 80% 100% of pad.
Additionally, the present invention is light-emitting device, it is edge and the width of described chip body of the width of described electronic pads The light-emitting device being spaced apart below more than 10 μm 40 μm at the edge in degree direction.
Additionally, the present invention is light-emitting device, it is configured with containing conducting particles between light-emitting component and loading device The bonding cream of anisotropic conductive, described light-emitting component is located at sending out of described loading device by the bonding cream of described anisotropic conductive Electro-optical device, described loading device has: substrate and configuration N-shaped lateral electrode pad on the substrate and p-type lateral electrode pad；Institute State light-emitting component to have: flat shape is the chip body of quadrangle form and is arranged on the p-type side element of described chip body Electrode and N-shaped side element electrode；In the inside of described chip body, it is provided with p-type area and n-type region, is formed with pn-junction, institute Stating p-type side element electrode and be connected electrically in described p-type area via described conducting particles, described N-shaped side element electrode is via institute State conducting particles and be connected electrically in described n-type region, the surface of described p-type lateral electrode pad and the surface of described N-shaped lateral electrode pad Being positioned at the top of described substrate surface, described p-type lateral electrode pad and described N-shaped lateral electrode pulvilliform become the band that width is fixed value Shape, the front end of the front end of described p-type lateral electrode pad and described N-shaped lateral electrode pad be positioned at the underface of described chip body the most just under In region, side, with the part of the opposition side, front end of described p-type lateral electrode pad and with the opposition side, front end of described N-shaped lateral electrode pad Part be positioned at the outside in region, described underface, the described width of described p-type lateral electrode pad is set to described chip body, position Length below the length on the first limit of the surface of described p-type lateral electrode pad, the described width of described N-shaped lateral electrode pad sets For the length below the length on described chip body, the surface that is positioned at described N-shaped lateral electrode pad the second limit.
Additionally, the present invention is light-emitting device, in this light-emitting device, the described width of described p-type lateral electrode pad is set to than institute The length on the first limit of surface that state chip body, that be positioned at described p-type lateral electrode pad is short, the institute of described N-shaped lateral electrode pad State width and be set to shorter, described than the length on described chip body, the surface that is positioned at described N-shaped lateral electrode pad the second limit Immediately below the described light-emitting component in described p-type lateral electrode pad in region and the outside of described N-shaped lateral electrode pad and described substrate Between, be configured with between described light-emitting component with described p-type lateral electrode pad overflow the bonding cream of described anisotropic conductive and From the bonding cream of described anisotropic conductive overflowed between described light-emitting component with described N-shaped lateral electrode pad.
Additionally, the present invention is light-emitting device, in this light-emitting device, described first limit is put down with equal length with described second limit Configuring, the two ends on described first limit are positioned at the outside of the surface of described p-type lateral electrode pad, the position, two ends on described second limit capablely Outside in the surface of described N-shaped lateral electrode pad.
Invention effect
According to using anisotropic conductive bonding cream, light-emitting component bumpless ground flip-chip is arranged on the electricity being formed on substrate The light-emitting device of the present invention of polar cushion, it is equal or narrower than it that the width of electronic pads is configured to the width with light-emitting component.Therefore, press down System is short-circuited, and can realize the raising (reduction of thermal resistance) of heat dissipation characteristics simultaneously.
Additionally, the bonding cream of anisotropic conductive due to non-cohesive in the side of light-emitting component, thus without hinder from luminescence The transmitting of the light of the side radiation of element.
Accompanying drawing explanation
The top view of the light-emitting device of [Figure 1A] present invention
The side view of the light-emitting device of the present invention that [Figure 1B] watches from the A direction of Figure 1A
[Fig. 2 A] is put for the local that the state of the anisotropic conductive bonding cream configuration light-emitting component on mounted board is described Big sectional view
The enlarged partial sectional view of state when [Fig. 2 B] is for illustrating to press light-emitting component
[Fig. 2 C] is used for illustrating that p-type side, N-shaped side element electrode are electrically connected by conducting particles with p-type side, N-shaped side electrode of substrate The enlarged partial sectional view of the state connect
[Fig. 2 D] is bonding for the anisotropic conductive accompanying by side that the element body of the light-emitting device of prior art is described The enlarged drawing of cream
The top view of [Fig. 3 A] existing light-emitting device
The side view of the existing light-emitting device that [Fig. 3 B] watches from the A direction of Fig. 3 A.
Detailed description of the invention
Hereinafter, referring to the drawings, one is described in detail one side in the face of the light-emitting device of the present invention.
Figure 1A is the top view of the light-emitting device 100 of the present invention, and Figure 1B is sending out of the present invention from the viewing of the A direction of Figure 1A The side view of electro-optical device 100.The light-emitting device 100 of the present invention is for being arranged on substrate 20 by light-emitting component 10 bumpless ground flip-chip On light-emitting device.Specifically, light-emitting component 10 has chip body 31, N-shaped side element electrode 11 and p-type side element electrode 12, N-shaped side element electrode 11 and p-type side element electrode 12 are arranged in chip body 31.
On the base plate 20, it is configured with N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22, by substrate 20, N-shaped lateral electrode pad 21 And p-type lateral electrode pad 22 forms loading device 18.After N-shaped side element electrode 11 and p-type side element electrode 12 are respectively via solidification The bonding cream of anisotropic conductive 30 and anisotropic conductive is connected to N-shaped lateral electrode pad 21 and the p-type side electricity of loading device 18 Polar cushion 22.
The manufacturing process of its light-emitting device 100 is illustrated.
Containing conducting particles 36 in the bonding cream of anisotropic conductive 30, if the uncured bonding cream of anisotropic conductive is claimed For stock solution, then in the surface of loading device 18, it is positioned at the N-shaped side in the dead astern of the light-emitting component 10 being fixed on loading device 18 Configuring after stock solution with on p-type lateral electrode pad 22 on electronic pads 21, make light-emitting component 10 is formed with N-shaped side element electrode 11 and p The face of type side element electrode 12 is relative with configuration stock solution on the base plate 20, makes the N-shaped side element electrode 11 of light-emitting component 10 connect Touch the stock solution on N-shaped lateral electrode pad 21, make p-type side element electrode 12 contact the stock solution on p-type lateral electrode pad 22.
Fig. 2 A represents that its state, label 28 represent stock solution, is dispersed with conducting particles 36 in the bonding composition 29 of stock solution 28. Substrate 20 is carried on platform 51.
Herein, when stock solution 28 carries light-emitting component 10, if being set to the bottom surface of chip body 31 and the surface of substrate 20 Parallel, then the label H in Fig. 2 A1Expression is from the distance i.e. chip body of the bottom surface 38 of surface 39 to the chip body 31 of substrate 20 The height of the bottom surface 38 of 31.Label Wa, Wb be N-shaped lateral electrode pad 21 with p-type lateral electrode pad 22 in the direction parallel with substrate 20 On the distance at edge away from chip body 31.
N-shaped side element electrode 11 is equal with the thickness of p-type side element electrode 12, additionally, N-shaped lateral electrode pad 21 and p-type side The thickness of electronic pads 22 is the most equal, the height H of the bottom surface 38 of this chip body 311For by N-shaped lateral electrode pad 21 and p-type lateral electrode The thickness P of pad 221, by the stock solution 28 of N-shaped side or p-type lateral electrode pad 21,22 and N-shaped or p-type side element electrode 11,12 clamping Thickness Q1, and the thickness E of N-shaped side element electrode 11 and p-type side element electrode 121Carry out the value added up to.
N-shaped side element electrode 11 is that the electric conductivity to the surface being formed at chip body 31 is thin with p-type side element electrode 12 Film is etched and is formed, if by the thickness E of N-shaped side element electrode 11 with p-type side element electrode 121It is set to ratio N-shaped lateral electrode Pad 21 and the thickness P of p-type lateral electrode pad 221Thin, calculate the thickness that can ignore that in the distance of short transverse, then from carrying dress Put 39 to N-shaped side, the surface element electrode 11 of 18 or the distance (H on the surface of p-type side element electrode 121-E1) be with from substrate 20 The height H of bottom surface 38 of surface 39 to chip body 311Identical value.
Furthermore, it is possible on the N-shaped side element electrode 11 of light-emitting component 10, configure stock solution with on p-type side element electrode 12 28, make N-shaped lateral electrode pad 21 contact the stock solution 28 on N-shaped side element electrode 11, make p-type lateral electrode pad 22 contact p-type side element Stock solution 28 on electrode 12.
Then, light-emitting component 10 is mutually pressed with substrate 20.Herein, as shown in Figure 2 B, will be sent out by pressing member 52 Optical element 10 presses to substrate 20, now, one side by stock solution 28 between N-shaped side element electrode 11 and N-shaped lateral electrode pad 21 and Extruding between p-type side element electrode 12 and p-type lateral electrode pad 22, one side makes N-shaped side element electrode 11 and p-type side element electrode 12 Respectively close to N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22.Height H now2Become than carrying light-emitting component 10 time height H1Low, the thickness Q of the stock solution 28 on N-shaped lateral electrode pad 21 and p-type lateral electrode pad 222Also than thickness Q originally1Reduce.
And, as shown in Figure 2 C, N-shaped side element electrode 11 contacts with N-shaped lateral electrode pad 21 via conducting particles 36, p-type Side element electrode 12 contacts with p-type lateral electrode pad 22 via conducting particles 36.
Now, due to the slightest to the insignificant degree of conducting particles 36, therefore make N-shaped side or p-type side element electrode 11,12 is identical with situation about directly contacting with the situation that N-shaped side or p-type lateral electrode pad 21,22 connect via conducting particles 36, can Think the thickness Q of stock solution 283It is zero.If ignoring N-shaped side or the thickness E of p-type side element electrode 11,121, then light-emitting component 10 with Distance between substrate 20 i.e. height H3Become the thickness P of N-shaped lateral electrode pad 21 and p-type lateral electrode pad 221。
The bonding composition 29 of stock solution 28 is containing heat curable component, if at N-shaped side element electrode 11 and p-type side element electrode 12 It is contacted with under the N-shaped lateral electrode pad 21 state with p-type lateral electrode pad 22 via conducting particles 36, to light-emitting component 10 and substrate 20 Heating, make stock solution 28 heat up, then form the bonding cream of anisotropic conductive 30 of solidification, light-emitting component 10 is mutual with substrate 20 Fixing, it is thus achieved that by conducting particles 36 by N-shaped side or p-type side element electrode 11,12 and N-shaped side or 21,22 points of p-type lateral electrode pad The light-emitting device 100 not electrically connected.
Chip body 31 is to pass through being internally provided with the N-type semiconductor region semiconductor crystal wafer with P-type semiconductor region Cut off and be divided into multiple semiconductor chips, in the inside of each chip body 31, be respectively arranged with N-type semiconductor region, And with the P-type semiconductor region of N-type semiconductor area contact, be respectively formed with pn-junction.
N-shaped side element electrode 11 in each chip body 31 is connected electrically in N-type semiconductor region, p-type side element electrode 12 Being connected electrically in P-type semiconductor region, by the solidification of the bonding cream of anisotropic conductive 30, N-shaped side element electrode 11 is via conduction Particle 36 is connected electrically in N-shaped lateral electrode pad 21, and p-type side element electrode 12 is connected electrically in p-type lateral electrode pad via conducting particles 36 22, therefore, if applying voltage between p-type lateral electrode pad 22 and N-shaped lateral electrode pad 21, then voltage is via p-type side element electrode 12 and N-shaped side element electrode 11 and be applied between P-type semiconductor region and N-type semiconductor region, if pn-junction forward bias and Make current flow through pn-junction, then luminous near pn-junction.
The resin of substrate 20 for example, tabular, N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22 are the table being arranged in substrate 20 The conductive films such as the metal film on face, the surface of N-shaped lateral electrode pad 21 is positioned at than substrate 20 with the surface of p-type lateral electrode pad 22 Surface exceeds the thickness P of N-shaped lateral electrode pad 21 and p-type lateral electrode pad 221Position.
In the case of the size ignoring conducting particles 36, it is turned into N-shaped side element electrode 11 and connects with N-shaped lateral electrode pad 21 Touching, p-type side element electrode 12 contacts with p-type lateral electrode pad 22, but due to the film of N-shaped lateral electrode pad 21 with p-type lateral electrode pad 22 Thick P1Not being zero, height H is left in the bottom surface 38 on the surface 39 and chip body 31 that are therefore turned into substrate 203And form gap 13, additionally, between the surface of the surface 39 of substrate 20 and the surface of N-shaped side element electrode 11 or p-type side element electrode 12 also It is formed with gap.That is, the surface of light-emitting component 10 is left with the surface 39 of substrate 20, is formed with gap.
As it has been described above, N-shaped side element electrode 11 and p-type side element electrode 12 are to be arranged on the surface of chip body 31 In the case of conductive membrane, such as metallic film, its thickness E1Value less than N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22 Thickness P1Value, and the distance phase between the bottom surface 38 of chip body 31 with N-shaped lateral electrode pad 21 or p-type lateral electrode pad 22 Ratio, distance one side between surface or the surface of p-type side element electrode 12 and the surface 39 of substrate 20 of N-shaped side element electrode 11 Bigger (Fig. 2 C).
In contrast, as shown in Figure 2 D, in the light-emitting device of prior art, N-shaped lateral electrode pad 121 and p-type lateral electrode Pad 122 is compared at outside protrusion, the end of surface 139 to the chip body 131 of loading device 180 with the periphery of light-emitting component 110 The height H in face 1384Height H than the present invention3Little N-shaped lateral electrode pad 121 and the thickness P of p-type lateral electrode pad 1221Amount.
It is additionally, since height H4Relatively low, therefore stock solution 128 from light-emitting component 110 and N-shaped side or p-type lateral electrode pad 121, It is extruded towards the more lateral, periphery than light-emitting component 110 between 122.
Owing to the viscosity of stock solution 128 is high, stock solution 128 heap being extruded from behind in the stock solution 128 being therefore extruded is to first Before in the stock solution 128 that is extruded, if the stock solution being extruded 128 is swelled than the bottom surface of chip body 131 of light-emitting component 110 138 is higher, is attached to the side of chip body 131, then make the block of the conducting particles 136 after the solidification of bonding composition 129 become short The reason on road.
In the present application, highly H3Height H higher than the light-emitting device of prior art4, from N-shaped side element electrode 11 And the stock solution 28 extruded between N-shaped lateral electrode pad 21 and between p-type side element electrode 12 and p-type lateral electrode pad 22 is housed in Gap 13, the side will not swelled to light-emitting component 10.
The flat shape of chip body 31 is the tetragon that four limits at right angles intersect, if by four limits relative to two limits set Be one group, then the length on two limits of a group is equal.
Additionally, in the two of one group limits, the underface that N-shaped lateral electrode pad 21 is positioned at, p-type lateral electrode pad 22 is positioned at separately Underface on one side, thus, N-shaped lateral electrode pad 21 enters from the location directly below on two limits of a group with p-type lateral electrode pad 22 Enter to be positioned at the region, underface of the underface of chip body 31, linearly extend in region, underface.
P-type lateral electrode pad 22 and N-shaped lateral electrode pad 21 are not positioned under the both sides of another group.
Herein, the length in the direction rectangular with the direction that N-shaped lateral electrode pad 21 extends is set to N-shaped lateral electrode pad 21 Width L1, is set to the width of p-type lateral electrode pad 22 by the length in the direction rectangular with the direction that p-type lateral electrode pad 22 extends L2, by the length on the limit of chip body 31, the surface that is positioned at N-shaped lateral electrode pad 21 or p-type lateral electrode pad 22 surface It is set to light-emitting component width L0.
In the light-emitting device 100 of the present invention, by the width of the width L1 of N-shaped lateral electrode pad 21 Yu p-type lateral electrode pad 22 It is equal or shorter than it that L2 is configured to the width L0 with chip body 31.Thus, the N-shaped side from substrate 20, p-type lateral electrode pad 21, between 22 with light-emitting component 10 overflow the bonding cream of anisotropic conductive 30 be maintained at than N-shaped side, p-type lateral electrode pad 21, 22 with the gap 13 of the broader light-emitting component in gap 10 of light-emitting component 10 with the surface of substrate 20, therefore, it is possible to prevent from making P layer And short circuit between N shell, and due to bumpless carry out flip-chip installation, therefore, it is possible to compression manufacturing cost, and can improve Radiating efficiency (in other words, reduces thermal resistance).
Secondly, any one during above-mentioned A direction is N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22 is from chip body 31 The direction that the location directly below on limit extends towards inner side.
Herein, the N-shaped side in Figure 1A and Fig. 3 A, the width of p-type lateral electrode pad 21,22 are the direction crossing A direction. In other words, N-shaped side, the width of p-type lateral electrode pad 21,22 be within being parallel to the plane on surface of substrate 20 with A side To rectangular direction.
Thus, the A direction in so-called Figure 1A and Fig. 3 A, can be defined as crossing N-shaped lateral electrode pad 21 and p-type lateral electrode pad The direction in the gap between 22.Furthermore, in Figure 1A and Fig. 3 A, on the base plate 20, respectively by p-type lateral electrode pad 22 He of rectangle N-shaped lateral electrode pad 21 arranges set interval and is formed at adjoining position, therefore, and N-shaped side, the width of p-type lateral electrode pad 21,22 Degree direction becomes the direction being substantially orthogonal with A direction, but in N-shaped side, the shape of p-type lateral electrode pad 21,22 non-rectangle and be In the case of the shapes such as parallelogram, trapezoidal, triangle, N-shaped side, the width of p-type lateral electrode pad 21,22 may not be with The direction that A direction is substantially orthogonal, it is possible to the direction crossed for having the angle of inclination relative to A direction.
Additionally, be configured to than chip body 31 as by width L1, L2 of N-shaped lateral electrode pad 21 with p-type lateral electrode pad 22 Degree short for width L0, if due to too short, have the tendency that heat dissipation characteristics declines, therefore by the width L0 of chip body 31 Length be set to 100 in the case of, the width L1 of N-shaped lateral electrode pad 21 is excellent with the length of the width L2 of p-type lateral electrode pad 22 Choosing is set to less than more than 80 100, is more preferably set to less than more than 90 99.
In this case, the chip body 31 of light-emitting component 10 is at the width of N-shaped lateral electrode pad 21 with p-type lateral electrode pad 22 One or both sides, direction overhang (overhang), but Mold processing (L1a, L1b, L2a, L2b of Figure 1A), i.e. N-shaped side, p-type side electricity If the interval at the edge of the width of the edge of the width of polar cushion 21,22 and chip body 31 is too small, then there is luminous unit The tendency that the amount of climbing of the conductive adhesive cream 30 of part 10 side increases, it is therefore preferable that be below more than 0 120 μm, more preferably 5 μ Below more than m 80 μm, more than particularly preferably 10 μm below 40 μm.
Furthermore, the width L2 of the width L1 of N-shaped lateral electrode pad 21 and p-type lateral electrode pad 22 is usually equal length, but also It can be different length.Additionally, the length that Mold processing (L1a, L1b, L2a, L2b) is alternatively mutually identical, it is possible to the most not With.Generally, for improving the aspect of the precision of the operations such as para-position when manufacturing, the also difficulty of mitigation operation, preferably will These Mold processing are set to the amount being mutually identical.
The width L1 of N-shaped lateral electrode pad 21 is set to be positioned at N-shaped lateral electrode with the width L2 of p-type lateral electrode pad 22 as mentioned above Length below the length on the limit of the chip body 31 of the surface of pad 21, additionally, be set to be positioned at just going up of p-type lateral electrode pad 22 Length below the length on the limit of the chip body 31 of side.
N-shaped lateral electrode pad 21 is the underface in the underface being positioned at chip body 31 with the front end of p-type lateral electrode pad 22 Configure with leaving mutually in region.
Herein, as it has been described above, the preferably width L1 of N-shaped lateral electrode the pad 21 and width L2 of p-type lateral electrode pad 22 is set to ratio The length on the limit being positioned at the chip body 31 of the surface of N-shaped lateral electrode pad 21 is short, additionally, ratio is positioned at p-type lateral electrode pad 22 The length on the limit of the chip body 31 of surface is short, and then, it is preferably located at the core of the surface of the width L1 of N-shaped lateral electrode pad 21 The limit of sheet main body 31 is protruded in the both sides of width L1, additionally, be positioned at the chip master of the surface of the width L2 of p-type lateral electrode pad 22 The limit of body 31 is protruded in the both sides of width L2.
In this case, in the region, underface being positioned at chip body 31 of N-shaped lateral electrode pad 21 with p-type lateral electrode pad 22 The outside of interior fore-end, in addition to the part being positioned at the underface on limit of chip body 31, is configured with and is formed at luminous unit Gap between part 10 and substrate 20, the distance between substrate 20 and light-emitting component 10 is than light-emitting component 10 and N-shaped lateral electrode pad Distance N-shaped lateral electrode pad 21 or the thickness P of p-type lateral electrode pad 22 between 21 or p-type lateral electrode pad 221Amount.
Thus, make N-shaped side element electrode 11 via conducting particles 36 and N-shaped lateral electrode pad 21 at pressing light-emitting component 10 Contact, when making p-type side element electrode 12 contact with p-type lateral electrode pad 22 via conducting particles 36, if being positioned at light-emitting component 10 and n Stock solution 28 between type lateral electrode pad 21 and the stock solution 28 between light-emitting component 10 and p-type lateral electrode pad 22 are from luminous unit Be extruded between part 10 and N-shaped side or p-type lateral electrode pad 21,22, then the amount being extruded is housed in light-emitting component 10 and substrate Gap 13 between 20, eliminates the situation that stock solution 28 is swelled around light-emitting component 10.
In the light-emitting device 100 of the present invention, the width of N-shaped side, p-type lateral electrode pad 21,22 is configured to and chip master The width of body 31 is equal or narrower than it, in addition, can be set to element (the such as light-emitting component with existing light-emitting device Kind/size, the kind/size of its connection gasket, the kind/size of substrate, the raw material/thickness of wiring pattern thereon, Kind/the viscosity of the bonding cream of anisotropic conductive, the kind of contained conducting particles 36 or mean diameter etc.) identical structure Become.
Furthermore, as the light-emitting component 10 of one of the element of light-emitting device 100 of the present invention, can enumerate LED chip, Organic EL chip, inorganic EL chip component etc., especially can preferably enumerate LED chip.These are bumpless certainly.
Embodiment
Hereinafter, by more specifically embodiment, the present invention will be described.
Embodiment 1～7
As by LED chip bumpless and by the width of electronic pads become the width with light-emitting component equal or than it narrow in the way of Flip-chip is arranged on the example of substrate, uses following substrate, LED chip, the bonding cream of anisotropic conductive to make Figure 1A～1B The light-emitting device of shown structure.Specifically, from allotter (dispenser) to the base corresponding with the central part of LED element The bonding cream of anisotropic conductive of given amount is supplied, by LED chip placing in the bonding cream of its anisotropic conductive, in temperature on plate 230 DEG C, pressure 3N/chip, within 30 seconds, carry out thermo-compressed under the conditions of this, thus make light-emitting device.
Furthermore, by the edge of the width of LED element width to the edge of the width of electronic pads (about The form of embodiment in other words, for LED element relative to the amount (L1a=L1b=L2a=L2b) of the overhanging of electronic pads) be shown in Table 1.It is recited as Δ LD in Table 1.In embodiment 1～7, the numerical value of Δ LD is 0 or positive number.
＜ substrate ＞
Substrate material: aluminium oxide 0.6mm is thick
Electronic pads: copper 10 μ m-thick
Electronic pads surface processes: Ni coating 3 μ m-thick/Au0.3 μ m-thick.
＜ LED chip ＞
Goods name: DA3547, Cree company manufactures (U.S. Cree.Inc.)
Size: 350 μ m 470 μ m 155 μm t.
＜ anisotropic conductive bonding cream ＞
Goods name: SLP-04, Dexerials(stock) manufacture.
Comparative example 1～2
As by LED chip upside-down mounting in the way of the width forming the width ratio light-emitting component of projection and electronic pads at electronic pads is wide Sheet is arranged on the comparative example of substrate, by the light-emitting device of the structure shown in Fig. 3 A～Fig. 3 B, in addition to using following substrate, makes With the LED chip as the situation of embodiment 1, the bonding cream of anisotropic conductive, repetitiousness carries out behaviour similarly to Example 1 Make, thus be made for light-emitting device.
Base material ＞ used in ＜ comparative example 1
Substrate material: aluminium oxide 0.6mm is thick
Electronic pads: copper 10 μ m-thick
Au projection: diameter 80 μm, highly 15 μm
Au number of lugs: each electronic pads 3
Au bump pitch: 500 μm.
Base material ＞ used in ＜ comparative example 2
Substrate material: aluminium oxide 0.6mm is thick
Electronic pads: copper 10 μ m-thick
Au projection: diameter 80 μm, highly 15 μm
Au number of lugs: each electronic pads 6
Au bump pitch: 200 μm.
Furthermore, the edge of the width of LED element width to the edge of the width of electronic pads (is changed sentence Talk about, the amount (L1a=L1b=L2a=L2b) that electronic pads protrudes from the width of LED element) it is shown in table 1.Remember in Table 1 Carry as Δ LD.Comparative example 1 and 2 and following comparative example 3 in, the numerical value of Δ LD is necessarily negative.
Comparative example 3
As substrate, use and do not form Au projection, be applied with the substrate that electronic pads surface processes similarly to Example 1, except this In addition, light-emitting device is made in the same manner as comparative example 1.
(evaluation)
For the light-emitting component made in embodiment and comparative example, as described below to " poor short circuit " and " heat radiation spy Property " carry out test evaluation.The result obtained is shown in table 1.
＜ poor short circuit ＞
The light-emitting component of each embodiment and each comparative example is respectively prepared 100, uses tester (curve plotter TCT- 2004, state's ocean electric machine industry (stock)) confirm whether produce short circuit between side, P pole and side, N pole, obtain the luminous unit creating short circuit The ratio (short circuit generation rate) of part.Short circuit generation rate is preferably less than 1%, and more preferably less than 0.5%, particularly preferably 0%.
＜ heat dissipation characteristics ＞
In order to heat dissipation characteristics is evaluated, measure the thermal resistance of each light-emitting component according to " JE-DEC standard, JESD51-14 " Value, obtains the thermal resistance value of comparative example 1 as embodiment during comparison or the slip of the thermal resistance value of the light-emitting component of comparative example (thermal resistance slip).Slip is preferably more than 25%, and more preferably more than 30%, particularly preferably more than 35%.
Table 1 experimental result
As shown in Table 1, by using anisotropic conductive bonding cream that LED chip bumpless ground flip-chip is arranged on and is formed at Electronic pads on substrate and in the case of making light-emitting device, if could be aware that the width of width and the light-emitting component making electronic pads Equal or narrower than it, then short circuit generation rate is less than 1% and thermal resistance slip is more than 20%.If it is particularly that light-emitting component is relative Mold processing in the electronic pads of substrate is set to below more than 10 μm 40 μm, then short circuit generation rate is 0% and thermal resistance slip becomes More than 35%, ideal.
On the other hand, it is known that in the case of using the light-emitting device of comparative example 1,2 of the substrate being provided with projection, although Poor short circuit is improved, but heat dissipation characteristics does not improves.Understand in the case of the light-emitting device of comparative example 3, although heat radiation spy Property is improved, but poor short circuit can be more than 1%.
Industrial applicability
Use anisotropic conductive bonding cream that light-emitting component bumpless ground flip-chip is arranged on the electronic pads being formed on substrate The light-emitting device of the present invention, the width of electronic pads is configured to the width with light-emitting component equal or narrower than it.Accordingly, as The generation suppressing short circuit and the light-emitting device improving heat dissipation characteristics (reduction thermal resistance) are useful.
Label declaration
100 light-emitting devices；10 light-emitting components；11 N-shaped side element electrodes；12 p-type side element electrodes；20 substrates；21 N-shapeds Lateral electrode private school；22 p-type lateral electrode pads；The 30 bonding cream of anisotropic conductive；31 chip body；Bp gold projection；L0 luminescence unit The width of part；The width of L1 N-shaped lateral electrode pad；The width of L2 p-type lateral electrode pad.

Claims (7)

1. a light-emitting device, uses the bonding cream of anisotropic conductive will to have the light-emitting component of the chip body of quasiconductor without convex Block ground flip-chip is arranged on the electronic pads being formed on substrate, it is characterised in that:
The width of electronic pads is equal or narrower than it with the width of described chip body.
2. light-emitting device as claimed in claim 1, wherein, described chip body is light-emitting diode chip for backlight unit.
3. light-emitting device as claimed in claim 1 or 2, wherein, in the situation that the width of described chip body is set to 100 Under, the width of described electronic pads is less than more than 80% 100%.
4. light-emitting device as claimed in claim 1 or 2, wherein, the edge of the width of described electronic pads and described chip The edge of the width of main body be spaced apart below more than 10 μm 40 μm.
5. a light-emitting device, is configured with the anisotropic conductive containing conducting particles between light-emitting component and loading device and glues Connecing cream, described light-emitting component is located at described loading device by the bonding cream of described anisotropic conductive, wherein,
Described loading device has:
Substrate；And
Configuration N-shaped lateral electrode pad on the substrate and p-type lateral electrode pad,
Described light-emitting component has: flat shape is the chip body of quadrangle form；And
It is arranged on p-type side element electrode and the N-shaped side element electrode of described chip body,
In the inside of described chip body, it is provided with p-type area and n-type region, is formed with pn-junction,
Described p-type side element electrode is connected electrically in territory, described p type island region via described conducting particles, described N-shaped side element electrode It is connected electrically in described n-type region via described conducting particles,
The surface of the surface of described p-type lateral electrode pad and described N-shaped lateral electrode pad is positioned at the top on the surface of described substrate,
Described p-type lateral electrode pad and described N-shaped lateral electrode pulvilliform become the banding that width is fixed value,
The front end of described p-type lateral electrode pad is the most just being positioned at the underface of described chip body with the front end of described N-shaped lateral electrode pad In lower zone, with the part of the opposition side, front end of described p-type lateral electrode pad and contrary with the front end of described N-shaped lateral electrode pad The part of side is positioned at the outside in region, described underface,
Surface that the described width of described p-type lateral electrode pad is set to described chip body, that be positioned at described p-type lateral electrode pad Length below the length on the first limit,
Surface that the described width of described N-shaped lateral electrode pad is set to described chip body, that be positioned at described N-shaped lateral electrode pad Length below the length on the second limit.
6. light-emitting device as claimed in claim 5, wherein,
The described width of described p-type lateral electrode pad is set to than described chip body, the surface that is positioned at described p-type lateral electrode pad The length on the first limit short,
The described width of described N-shaped lateral electrode pad is set to than described chip body, the surface that is positioned at described N-shaped lateral electrode pad The length on the second limit short,
The described light-emitting component in the outside of the described p-type lateral electrode pad in region, described underface and described N-shaped lateral electrode pad And between described substrate, it is configured with the described anisotropy from overflowing between described light-emitting component and described p-type lateral electrode pad and leads Electricity bonding cream and between described light-emitting component with described N-shaped lateral electrode pad overflow the bonding cream of described anisotropic conductive.
7. light-emitting device as claimed in claim 6, wherein,
Described first limit configures with equal length abreast with described second limit, and the two ends on described first limit are positioned at described p-type side The outside of the surface of electronic pads,
The two ends on described second limit are positioned at the outside of the surface of described N-shaped lateral electrode pad.
CN201580021604.7A 2014-03-12 2015-03-11 Light emitting device Active CN106233479B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014-048750 2014-03-12
JP2014048750 2014-03-12
PCT/JP2015/057202 WO2015137414A1 (en) 2014-03-12 2015-03-11 Light-emitting device

Publications (2)

Publication Number Publication Date
CN106233479A true CN106233479A (en) 2016-12-14
CN106233479B CN106233479B (en) 2019-11-22

Family

ID=54071853

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580021604.7A Active CN106233479B (en) 2014-03-12 2015-03-11 Light emitting device

Country Status (5)

Country Link
JP (1) JP2015188078A (en)
KR (1) KR102348352B1 (en)
CN (1) CN106233479B (en)
TW (1) TWI669837B (en)
WO (1) WO2015137414A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107170880A (en) * 2017-07-14 2017-09-15 上海天马微电子有限公司 Luminescence unit and display device
CN109560178A (en) * 2017-09-27 2019-04-02 旭化成株式会社 Semiconductor light-emitting apparatus and luminescence-utraviolet module
CN111179750A (en) * 2019-12-12 2020-05-19 武汉华星光电技术有限公司 Structure of display panel and manufacturing method thereof
TWI773538B (en) * 2021-09-24 2022-08-01 友達光電股份有限公司 Self-luminous device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11168235A (en) * 1997-12-05 1999-06-22 Toyoda Gosei Co Ltd Light emitting diode
CN1471179A (en) * 2002-07-05 2004-01-28 ��ķ�ɷ����޹�˾ Semiconductor luminescent device
JP2007049045A (en) * 2005-08-11 2007-02-22 Rohm Co Ltd Semiconductor light emitting device and semiconductor device using the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4951937B2 (en) 2005-10-28 2012-06-13 日亜化学工業株式会社 Light emitting device
JP5880025B2 (en) * 2011-12-26 2016-03-08 日亜化学工業株式会社 Light emitting device
US8877561B2 (en) * 2012-06-07 2014-11-04 Cooledge Lighting Inc. Methods of fabricating wafer-level flip chip device packages

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11168235A (en) * 1997-12-05 1999-06-22 Toyoda Gosei Co Ltd Light emitting diode
CN1471179A (en) * 2002-07-05 2004-01-28 ��ķ�ɷ����޹�˾ Semiconductor luminescent device
JP2007049045A (en) * 2005-08-11 2007-02-22 Rohm Co Ltd Semiconductor light emitting device and semiconductor device using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107170880A (en) * 2017-07-14 2017-09-15 上海天马微电子有限公司 Luminescence unit and display device
CN109560178A (en) * 2017-09-27 2019-04-02 旭化成株式会社 Semiconductor light-emitting apparatus and luminescence-utraviolet module
CN111179750A (en) * 2019-12-12 2020-05-19 武汉华星光电技术有限公司 Structure of display panel and manufacturing method thereof
TWI773538B (en) * 2021-09-24 2022-08-01 友達光電股份有限公司 Self-luminous device

Also Published As

Publication number Publication date
TW201603335A (en) 2016-01-16
KR20160132917A (en) 2016-11-21
JP2015188078A (en) 2015-10-29
TWI669837B (en) 2019-08-21
CN106233479B (en) 2019-11-22
KR102348352B1 (en) 2022-01-10
WO2015137414A1 (en) 2015-09-17

Similar Documents

Publication Publication Date Title
US8894249B2 (en) LED module and method of bonding thereof
CN101621101A (en) LED and production method thereof
US7554126B2 (en) Semiconductor light-emitting element, manufacturing method and mounting method of the same and light-emitting device
US8399904B2 (en) Light emitting device and lighting system having the same
US9673361B2 (en) Light-emitting apparatus with leads coated with metal films
TWI597346B (en) Anisotropic conductive adhesive and connecting structure
US8247833B2 (en) LED package and manufacturing method thereof
US10847691B2 (en) LED flip chip structures with extended contact pads formed by sintering silver
US9117689B2 (en) Light emitting device and manufacturing method thereof
CN106233479A (en) Light-emitting device
US11107945B2 (en) Component with end-side mounted light emitting semiconductor chip
JP2014103262A (en) Method of manufacturing light-emitting device, mounting board, and light-emitting device
WO2015076281A1 (en) Light-emitting device and light-emitting device manufacturing method
TWI669721B (en) Anisotropic conductive adhesive
JP5912471B2 (en) Semiconductor device
CN110010753A (en) Semiconductor light-emitting apparatus and its manufacturing method
KR101513642B1 (en) A device of a semiconductor
JP2015185685A (en) Light emitting device manufacturing method and light device
TW201830737A (en) Light-emitting device and manufacturing method of light-emitting device using a conductor line to connect two ohmic contact layers so that a package process required by wire bonding can be eliminated to thus reduce the size of the light-emitting device
JP2016086148A (en) Light emitting device and manufacturing method of the same
JP2014065765A (en) Anisotropic conductive adhesive
US20230197886A1 (en) Semiconductor apparatus
TWM580798U (en) LED carrier board having preset conductive bump
TW202025441A (en) Led carrier board having preset bumps
CN111354845A (en) Light-emitting diode carrier plate with preset conductive bumps

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant