CN106206881B - A kind of preparation method of vertical structure LED blue light extension - Google Patents
A kind of preparation method of vertical structure LED blue light extension Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
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Abstract
The invention discloses a kind of preparation methods of vertical structure LED blue light extension, respectively with ammonia, high-purity trimethyl indium (TMIn), TMAl, TEGa and high-purity trimethyl gallium (TMGa) for source, respectively using SiH4 and Cp2Mg as n and p-type dopant, using hydrogen or nitrogen as carrier gas, reaction chamber and ammonia is passed through to chemically react at 900~1100 DEG C, generate III-V compound semiconductor, it is deposited in sapphire, silicon wafer, silicon carbide plate or quartz glass on piece by certain lattice order, the epitaxial structure is made.The present invention is controlled epitaxial material crystal quality (defect concentration) in zone of reasonableness by process parameter optimizing and adjustment, all there is certain influence to the photoelectric parameter of product in crystal quality, substrate is improved using repair layer and substrate technology and shifts yields, repair layer and substrate technology can be with stress between good release liners and epitaxial layer.
Description
[technical field]
The invention belongs to technical field of semiconductors, and in particular to a kind of preparation method of vertical structure LED blue light extension.
[background technique]
The major parameters such as wavelength, brightness, the forward voltage of LED product each depend on epitaxial growth technology, therefore extension is raw
Length is the core component of LED manufacturing process.Growth technology and equipment are the key point of epitaxial material manufacture, chemical combination
Object semiconductor generally uses chemical synthesis process to prepare, and is divided into LPE (liquid deposition), MOCVD according to the difference of deposition technique
(Metallo-Organic Chemical Vapor deposition), HVPE (hydride vapor phase epitaxy) and MBE (molecular beam deposition) etc..The technology maturation of LPE,
The speed of growth is very fast but can not grown quantum trap, super crystal lattice material；Hydride vapor-phase epitaxy is adapted to III-V nitride and partly leads
A kind of new technology of body thin film and superlattices epitaxial growth, growth rate is fast, but lattice quality is poor, and the scope of application is small；MBE work
Skill control ability is good, easily grows up to very thin epitaxial layer, and purity high planarization is good, but the speed of growth causes volume production ability lower slowly.
MOCVD technology has MBE and has the advantages that outside most of, and volume production ability is much higher compared with MBE, comprehensively considers LED production and is all made of
MOCVD growing technology.
Epitaxial growth technology is primarily directed to horizontal structure chip at present, for the forward voltage for reducing product, in P-GaN table
Corresponding epitaxial structure design is done in face；P-GaN roughing in surface skill is grown or used to improve luminous efficiency using patterned substrate
Art, but these technologies not only cannot achieve its original design intention for light emitting diode (LED) chip with vertical structure, or even will affect production
The final performance of product, it is therefore necessary to develop the epitaxial structure of suitable thin-film LED.
[summary of the invention]
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that.
The invention adopts the following technical scheme:
A kind of preparation method of vertical structure LED blue light extension, respectively with ammonia, high-purity trimethyl indium, TMAl, TEGa,
And high-purity trimethyl gallium is source, respectively with SiH4And Cp2Mg is passed through as n and p-type dopant using hydrogen or nitrogen as carrier gas
Reaction chamber and ammonia are chemically reacted at 900~1100 DEG C, generate III-V compound semiconductor, sapphire, silicon wafer,
Silicon carbide plate or quartz glass on piece are deposited by certain lattice order, and the epitaxial structure is made.
Further, it the described method comprises the following steps:
Step 1: at a temperature of 1070~1090 DEG C, pressure be 150torr under lead to N210~30min is toasted, is nitrogenized blue precious
Stone, SiC or Si substrate；
Step 2: by step 1 nitridation after sapphire, SiC or Si substrate be cooled to 515~535 DEG C, pressure be
800torr, the low stress buffer layer that then growth thickness is 0.8~1.2 μm on substrate, then raises temperature to 1030~1050
DEG C, pressure be 400torr recrystallize low stress buffer layer, 0.8~1 μm of regrowth of N-type roughened layer；
Step 3: be warming up to 1070~1090 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, thickness
It is 0.8~1 μm, the N-type GaN layer of regrowth weight Si doping, with a thickness of 1.8~2.5 μm；
Step 4: growing n-GaN electrons spread layer, on the basis of N-type GaN layer with a thickness of 80~120nm；
Step 5: at 740~760 DEG C of growth temperature of trap, the growth temperature at base is 820~840 DEG C, pressure 200torr
The InGaN/GaN superlattices in 18~23 periods of lower growth are as multiple quantum well layer, and multiple quantum well layer is with a thickness of 150~200nm；
Step 6: it is warming up to 960~980 DEG C, pressure is that 150torr grows PAlGaN electronic barrier layer, with a thickness of 20~
50nm；
920~940 DEG C are cooled to, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 100~150nm；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 10~20nm；
Step 7: growth CTL layers, with a thickness of 10~30nm, be then cooled to 700~730 DEG C carry out annealing 60~
120min, later furnace cooling.
Further, in step 4, regrowth stress release layer on the n-GaN electrons spread layer, with a thickness of 100nm；It is former
Material is TMGa, SiH4 and NH3.
Further, the step 5 specifically:
The InGaN/GaN superlattices that the In that 10~15 periodic thicknesses are 80~100nm is lightly doped first are grown, specifically:
The GaN-cap layer of 30~40nm is first grown, the barrierGaN layer of 5~10nm of regrowth finally grows the InGaN of 1.5~2nm
Well layer.
Further, in the step 5,8 periodic thicknesses of regrowth are the InGaN/ of the In heavy doping of 100~150nm
GaN, specifically:
The barrierGaN layer of 10~15nm is first grown, the InGaN well layer of 2~5nm of regrowth finally grows 30~40nm
Cap layers of GaN.
Further, in step 6, the p-type GaN layer includes hole diffusion layer and hole injection layer, the hole diffusion
Layer is with a thickness of 30~50nm, and the hole injection layer is with a thickness of 50~100nm.
Further, the PAlGaN electronic barrier layer is with a thickness of 30nm, and the p-type GaN layer is with a thickness of 110nm, the P
Type GaN electrode layers thickness is 10nm, and the hole thickness of diffusion layer is 30nm, and the hole injection layer is with a thickness of 80nm.
Further, in step 2, the low stress buffer layer thickness is 1.2 μm, and the N-type roughened layer is with a thickness of 0.8 μ
m。
Further, in step 3, the N-type electrode layer is with a thickness of 0.8 μm, and the N-type GaN layer is with a thickness of 2 μm.
Further, in step 7, described CTL layers with a thickness of 10nm.
Compared with prior art, the present invention at least has the advantages that
A kind of preparation method of vertical structure LED blue light extension of the present invention, with ammonia, TMIn, TMAl, TEGa and
TMGa is source, respectively with SiH4And Cp2Mg is passed through reaction chamber and ammonia using hydrogen or nitrogen as carrier gas as n and p-type dopant
It is chemically reacted at 900~1100 DEG C, III-V compound semiconductor is generated, in sapphire, silicon wafer, silicon carbide plate or stone
It is deposited on English sheet glass by certain lattice order, epitaxial structure is made, it can be by accurately controlling the flow of gaseous source and leading to
The component, doping concentration, thickness etc. that the disconnected time controls epitaxial layer, growth rate adjustable range is wider, faster growth rate
It can be suitable for batch to grow.
Further, it is designed using low stress epitaxial structure, novel transition layer is inserted between substrate and epitaxial layer, effectively
Reduce the collocation degree between epitaxial layer and substrate, while extension ply stress is further discharged to extension structure optimization.Angularity is small
In 250km-1.Low-dislocation-density extension, by pre-nucleating method, before epitaxial growth on substrate formed crystal quality compared with
Good nucleus, provides the basis of subsequent epitaxial high-quality growth.Dislocation density is lower than 5E108/cm2。
Further, using asymmetric chirp band structure, asymmetric chirp band structure, drop are loaded in LED active layer
The low carrier wave function mismatch generated based on LED quantum well layer due to polarity effect, keeps its distribution proportion more uniform.It improves
The internal quantum efficiency of LED component promotes chip light emitting efficiency.
Further, using high Injection Current epitaxial structure, electronic barrier layer is inserted between active area and p-type GaN, effectively
It solves the problems, such as the reduction of Bulk current injection efficiency, hole diffusion layer is inserted between electronic barrier layer and p-type GaN, solves big electricity
Flow down hole deficiency problem.The injection of vertical chip electric current is improved, maximum current injection can reach 2A, and pulsed mode electric current is more
It is high.
Further, hole diffusion layer and hole injection layer use carrier modulation technology, regulate and control point of electrons and holes
Cloth state promotes balanced current distribution, guarantees that vertical chip photoelectric parameter performance under high current working condition is stablized.Particular amount
Sub- well structure and hole injection structure design, raising LED current saturation threshold, under high current density, increase brightness with electric current and hold
It is continuous to increase.
Further, epitaxial material crystal quality (defect concentration) is controlled reasonable by process parameter optimizing and adjustment
All there is certain influence to the photoelectric parameter of product in range, crystal quality.
In conclusion improving substrate using low stress buffer layer technique shifts yields, low stress buffer layer technique can be with
Stress between good release liners and epitaxial layer.
Below by drawings and examples, technical scheme of the present invention will be described in further detail.
[Detailed description of the invention]
Fig. 1 is epitaxial structure schematic diagram of the present invention.
[specific embodiment]
A kind of preparation method of vertical structure LED blue light extension of the present invention need to take into account lining in epitaxial growth structure design
Bottom and epitaxial layer Lattice Matching, extension removing and two aspect factor of epitaxial quality.Lack it for buffer growth adjustment, extension
The requirement that stress between control and different materials adjusts control is fallen into, it is more complicated and difficult than horizontal chip.So this project must
Must design and develop out and be suitable for the dedicated epitaxial structure of thin-film LED, improve and promoted thin-film LED Stress Control and
Product photoelectric properties.Therefore proprietary epitaxial scheme is one of its core process technology, and obtains the primary of thin-film LED
One of condition.
Refering to Figure 1, a kind of preparation method of vertical structure LED blue light extension, respectively with ammonia, high-purity trimethyl
Indium (TMIn), TMAl, TEGa and high-purity trimethyl gallium (TMGa) are source material, respectively with SiH4And Cp2Mg is mixed as n and p-type
It miscellaneous dose, using hydrogen or nitrogen as carrier gas, is passed through reaction chamber and ammonia and is chemically reacted at 900~1100 DEG C, generate III-V
Compound semiconductor is deposited by certain lattice order in sapphire, silicon wafer, silicon carbide plate or quartz glass on piece, is made
The epitaxial structure.
Specifically includes the following steps:
Step 1: at a temperature of 1070~1090 DEG C, pressure be 150torr under lead to N210~30min is toasted, is nitrogenized blue precious
Stone, SiC or Si substrate.
Step 2: by step 1 nitridation after sapphire, SiC or Si substrate be cooled to 515~535 DEG C, pressure be
800torr, the low stress buffer layer that then growth thickness is 0.8~1.2nm on substrate, then raises temperature to 1030~1050
DEG C, pressure be 400torr recrystallize low stress buffer layer, 0.8~1 μm of regrowth of N-type roughened layer, raw material be TMGa and
NH3；
The volume flow of the TMGa is 200sccm, the NH3Volume flow be 35000sccm.
Step 3: be warming up to 1070-1090 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, with a thickness of
0.8~1 μm, raw material TMGa, SiH4And NH3；The volume flow of the TMGa is 340sccm, the SiH4Volume flow be
0.5~1sccm, the NH3Volume flow be 35000sccm；
The N-type GaN layer of regrowth weight Si doping, with a thickness of 1.8~2.5 μm；Raw material is TMGa, SiH4And NH3；It is described
The volume flow of TMGa is 340sccm, the SiH4Volume flow be 3~6.5sccm, the NH3Volume flow be
35000sccm。
Step 4: n-GaN electrons spread layer is grown on the basis of N-type GaN layer, with a thickness of 80~120nm, raw material is
TMGa、SiH4And NH3；The volume flow of the TMGa is 340sccm, the SiH4Volume flow be 0.5~1sccm, it is described
NH3Volume flow be 35000sccm；
Regrowth stress release layer on the n-GaN electrons spread layer, with a thickness of 50~100nm；Raw material is TMGa, SiH4
And NH3；The volume flow of the TMGa is 340sccm, the SiH4Volume flow be 0.5~1sccm, the NH3Volume
Flow is 35000sccm.
Step 5: at 740~760 DEG C of growth temperature of trap, the growth temperature at base is 820~840 DEG C, pressure 200torr
The InGaN/GaN superlattices in 18~23 periods of lower growth are as multiple quantum well layer, and multiple quantum well layer is with a thickness of 150~200nm；
The InGaN/GaN that the In that 10~15 periodic thicknesses are 80~100nm is lightly doped first is grown, specifically:
Grow the GaN-cap layer of 30~40nm, raw material TMGa, SiH4And NH3, the volume flow of the TMGa is
340sccm, the SiH4Volume flow be 0.5~1sccm, the NH3Volume flow be 35000sccm；
The barrierGaN layer of 5~10nm of regrowth, raw material TEGa, SiH4And NH3, the volume flow of the TEGa is
450sccm, the SiH4Volume flow be 0.5~1sccm, the NH3Volume flow be 35000sccm；
Finally grow the InGaN well layer of 1.5~2nm, raw material TEGa, TMIn and NH3；The volume flow of the TEGa is
The volume flow of 450sccm, the TMIn are 570sccm, the NH3Volume flow be 35000sccm；
8 periodic thicknesses of regrowth are the InGaN/AlGaN of the In heavy doping of 100~150nm, specifically:
First grow the barrierGaN layer of 10~15nm, raw material TEGa, SiH4And NH3, the volume flow of the TEGa is
450sccm, the SiH4Volume flow be 0.5sccm, the NH3Volume flow be 35000sccm；
The InGaN well layer of 2~5nm of regrowth, raw material TEGa, TMIn and NH3, the volume flow of the TEGa is
The volume flow of 450sccm, the TMIn are 570sccm, the NH3Volume flow be 35000sccm；
Finally grow the GaN-cap layer of 30~40nm, raw material TMGa, SiH4And NH3, the volume flow of the TMGa is
340sccm, the SiH4Volume flow be 0.5sccm, the NH3Volume flow be 35000sccm.
Step 6: it is warming up to 960~980 DEG C, pressure is that 150torr grows PAlGaN electronic barrier layer, with a thickness of 20~
50nm, raw material TMGa, TMAl, Cp2Mg and NH3；The volume flow of the TMGa is 38sccm, the volume flow of the TMAl
For 100sccm, the Cp2The volume flow of Mg is 1800sccm, the NH3Volume flow be 32000sccm；
The p-type GaN further includes hole diffusion layer and hole injection layer, and the hole thickness of diffusion layer is 30~50nm,
Raw material is TMGa, Cp2Mg and NH3, the volume flow of the TMGa is 38sccm, the Cp2The volume flow of Mg is
1600sccm, the NH3Volume flow be 30000sccm；
The hole injection layer is with a thickness of 50~100nm, raw material TMGa, Cp2Mg and NH3, the volume flow of the TMGa
For 38sccm, the Cp2The volume flow of Mg is 1600sccm, the NH3Volume flow be 30000sccm；
It is cooled to 920~940 DEG C, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 100~150nm,
Raw material is TMGa, Cp2Mg and NH3, the volume flow of the TMGa is 38sccm, the Cp2The volume flow of Mg is
1600sccm, the NH3Volume flow be 30000sccm；；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 10~20nm, raw material TMGa, Cp2Mg and NH3, described
The volume flow of TMGa is 38sccm, the Cp2The volume flow of Mg is 1600sccm, the NH3Volume flow be
30000sccm。
Step 7: growth CTL layers, with a thickness of 10~30nm, be then cooled to 700~730 DEG C carry out annealing 60~
120min, later furnace cooling.
Embodiment 1
A kind of preparation method of vertical structure LED blue light extension, comprising the following steps:
Step 1: at a temperature of 1070 DEG C, pressure be to lead to N2 under 150torr to toast 10min, nitridation sapphire, SiC or Si
Substrate；
Step 2: sapphire, SiC the or Si substrate after step 1 nitridation being cooled to 515 DEG C, pressure 800torr, then
Growth thickness is 0.8 μm of low stress buffer layer on substrate, then raise temperature to 1030 DEG C, pressure be that 400torr makes low stress
Buffer layer recrystallizes, 0.8 μm of regrowth of N-type roughened layer；
Step 3: be warming up to 1070 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, with a thickness of 0.8 μ
M, the N-type GaN layer of regrowth weight Si doping, with a thickness of 1.8 μm；
Step 4: growing n-GaN electrons spread layer, on the basis of N-type GaN layer with a thickness of 80nm；The n-GaN electronics
Regrowth stress release layer on diffusion layer, with a thickness of 100nm；
Step 5: at 740 DEG C of growth temperature of trap, the growth temperature at base is 820 DEG C, pressure is that 10 are first grown under 200torr
A periodic thickness is the InGaN/GaN that the In of 80nm is lightly doped, specifically: first grow the GaN-cap layer of 30nm, regrowth 5nm
BarrierGaN layer, finally grow 1.5nm InGaN well layer；
8 periodic thicknesses of regrowth are the InGaN/GaN of the In heavy doping of 100nm, specifically: first grow 10nm's
BarrierGaN layers, the InGaN well layer of regrowth 2nm finally grows cap layers of GaN of 30nm；
Step 6: being warming up to 960 DEG C, pressure is that 150torr grows PAlGaN electronic barrier layer, with a thickness of 20nm；
920 DEG C are cooled to, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 100nm；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 10nm；
Step 7: CTL layers of growth with a thickness of 10nm, is then cooled to 700 DEG C and carries out annealing 60min, furnace cooling later.
Embodiment 2
A kind of preparation method of vertical structure LED blue light extension, comprising the following steps:
Step 1: at a temperature of 1080 DEG C, pressure be to lead to N2 under 150torr to toast 20min, nitridation sapphire, SiC or Si
Substrate；
Step 2: sapphire, SiC the or Si substrate after step 1 nitridation being cooled to 525 DEG C, pressure 800torr, then
Growth thickness is 1 μm of low stress buffer layer on substrate, then raise temperature to 1040 DEG C, pressure be that 400torr keeps low stress slow
It rushes layer to recrystallize, 0.9 μm of regrowth of N-type roughened layer；
Step 3: be warming up to 1080 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, with a thickness of 0.8 μ
M, the N-type GaN layer of regrowth weight Si doping, with a thickness of 2.1 μm；
Step 4: growing n-GaN electrons spread layer, on the basis of N-type GaN layer with a thickness of 100nm；The n-GaN electronics
Regrowth stress release layer on diffusion layer, with a thickness of 100nm；
Step 5: at 750 DEG C of growth temperature of trap, the growth temperature at base is 830 DEG C, pressure is that 13 are first grown under 200torr
A periodic thickness is the InGaN/GaN that the In of 90nm is lightly doped, specifically: first grow the GaN-cap layer of 35nm, regrowth 8nm
BarrierGaN layer, finally grow 1.8nm InGaN well layer；
8 periodic thicknesses of regrowth are the InGaN/GaN of the In heavy doping of 130nm, specifically: first grow 13nm's
BarrierGaN layers, the InGaN well layer of regrowth 3.5nm finally grows cap layers of GaN of 35nm；
Step 6: being warming up to 970 DEG C, pressure is that 150torr grows PAlGaN electronic barrier layer, with a thickness of 35nm；
930 DEG C are cooled to, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 130nm；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 15nm；
Step 7: CTL layers of growth with a thickness of 20nm, is then cooled to 720 DEG C and carries out annealing 100min, cold with furnace later
But.
Embodiment 3
A kind of preparation method of vertical structure LED blue light extension, comprising the following steps:
Step 1: at a temperature of 1090 DEG C, pressure be to lead to N2 under 150torr to toast 30min, nitridation sapphire, SiC or Si
Substrate；
Step 2: sapphire, SiC the or Si substrate after step 1 nitridation being cooled to 535 DEG C, pressure 800torr, then
Growth thickness is 1.2 μm of low stress buffer layer on substrate, then raise temperature to 1050 DEG C, pressure be that 400torr makes low stress
Buffer layer recrystallizes, 1 μm of regrowth of N-type roughened layer；
Step 3: be warming up to 1090 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, with a thickness of 1 μm,
The N-type GaN layer of regrowth weight Si doping, with a thickness of 2.5 μm；
Step 4: growing n-GaN electrons spread layer, on the basis of N-type GaN layer with a thickness of 120nm；The n-GaN electronics
Regrowth stress release layer on diffusion layer, with a thickness of 100nm；
Step 5: at 760 DEG C of growth temperature of trap, the growth temperature at base is 840 DEG C, pressure is that 15 are first grown under 200torr
A periodic thickness is the InGaN/GaN that the In of 100nm is lightly doped, specifically: first grow the GaN-cap layer of 40nm, regrowth
The barrierGaN layer of 10nm finally grows the InGaN well layer of 2nm；
8 periodic thicknesses of regrowth are the InGaN/GaN of the In heavy doping of 150nm, specifically: first grow 15nm's
BarrierGaN layers, the InGaN well layer of regrowth 5nm finally grows cap layers of GaN of 40nm；
Step 6: being warming up to 980 DEG C, pressure is that 150torr grows PAlGaN electronic barrier layer, with a thickness of 50nm；
940 DEG C are cooled to, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 150nm；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 20nm；
Step 7: CTL layers of growth with a thickness of 30nm, is then cooled to 730 DEG C and carries out annealing 120min, cold with furnace later
But.
The vertical structure LED blue light epitaxial structure technical indicator prepared according to the method is as shown in the table:
| Test item | Project arranges index | Measured data | Test condition |
| Wavelength | 450nm-460nm | 450nm-460nm | 10msec@20mA |
| Positive operating voltage | / | 2.9-3.2V | 10msec@20mA |
| Wavelength distribution half-breadth | < 3.5nm | ≤2nm | The interval 2mmx2mm, PL tester |
Vertical structure LED blue light epitaxial surface pattern:
Surface topography is one of epitaxial wafer evaluation index, reflects the superiority and inferiority of epitaxial growth technology control ability.Utilize high power
Optical microscopy and atomic force microscope (AFM) can observe epitaxial wafer surface smoothness and its atom level arrangement situation, thus
Obtain epitaxial crystal mass growth information.In optical microscope, the smooth no significant defect of epitaxial surface；AFM test
Picture proves that gallium nitride surface Atomic Arrangement is neat, and atomic steps are clear.
Epitaxial crystal quality is to measure an important reference indicator of LED epitaxial wafer grade.It is surveyed using high-resolution XRD
Examination analyzes in XRD diagram rocking curve half-value width to evaluate the crystal quality of epitaxial film.Shadow of the crystal quality to rocking curve
The broadening effect for showing half-peak breadth is rung, there are corresponding relationships for the two.
The helical dislocation and edge dislocation defect concentration of epitaxial structure, new light sources epitaxial wafer are obtained from XRD test result calculations
(002) face half-value width is 293arcsec, and (102) face half-value width is 312arcsec.The defect concentration of edge dislocation is about
2.82 × 108cm-2, the defect concentration of helical dislocation are about 1.65 × 108cm-2, and powder injection molding is in preferable level.
Vertical structure LED blue light epitaxial material carrier concentration:
N-type GaN foreign atom is Si, and p-type GaN foreign atom is Mg.To meet the work of vertical structure LED high current, need
Want higher N-type GaN electron concentration and p-type GaN hole concentration.It is more that foreign atom is mixed in GaN single crystal material, acquisition
Crystal quality is poorer, eventually results in carrier mobility reduction.Hall test, N-type GaN carrier are carried out at room temperature
For concentration in 1018cm-3 range, carrier mobility is more than that 200cm2/vs is good.New light sources sample is under equal conditions surveyed
Examination, mobility reach 372.44cm2/vs, and material property is excellent.
Mg adulterates p-GaN and forms hole difficulty, and hole concentration is low, and mobility is small, leads to p-type gallium nitride material current expansion
Property is poor, and contact resistance is larger, light emission luminance, the problems such as luminous efficiency is low.Using non-uniform doping technology, activation energy is reduced, is mentioned
High Mg activation efficiency.Hall test is carried out in room temperature condition vacation, hole concentration 1018cm-3 or more belongs to advanced level in the industry.
The control of vertical structure LED blue light extension wavelength uniformity:
Epitaxial wafer emission wavelength directly affects the wavelength yields of epitaxial chip.In preparation process, wavelength uniformity control
Difficulty is higher, and stress release technology is used to adjust growth rate to special construction to achieve the effect that homoepitaxial, while to setting
Standby hardware, production technology are controlled, and epitaxial wafer wavelength uniformity is effectively increased.It is equal with about 80% furnace epitaxial wafer medium wavelength
Difference is within 5nm.
Epitaxial wafer Wavelength distribution section is between 450nm-460nm, while Wavelength distribution half-breadth is all within 2nm
The above content is merely illustrative of the invention's technical idea, and this does not limit the scope of protection of the present invention, all to press
According to technical idea proposed by the present invention, any changes made on the basis of the technical scheme each falls within claims of the present invention
Protection scope within.
Claims (6)
1. a kind of preparation method of vertical structure LED blue light extension, which is characterized in that respectively with ammonia, high-purity trimethyl indium,
TMAl, TEGa and high-purity trimethyl gallium are source material, respectively with SiH4And Cp2Mg is as n and p-type dopant, with hydrogen or nitrogen
Gas is carrier gas, is passed through reaction chamber and ammonia and chemically reacts at 900~1100 DEG C, generates III-V compound semiconductor,
It is deposited in sapphire, silicon wafer, silicon carbide plate or quartz glass on piece by certain lattice order, the epitaxial structure is made；
It the described method comprises the following steps:
Step 1: at a temperature of 1070~1090 DEG C, pressure be 150torr under lead to N2Toast 10~30min, sapphire, SiC or Si
Substrate；
Step 2: sapphire, SiC the or Si substrate after step 1 nitridation being cooled to 515~535 DEG C, pressure 800torr, so
Growth thickness is 0.8~1.2 μm of low stress buffer layer on substrate afterwards, then raise temperature to 1030~1050 DEG C, pressure be
400torr recrystallizes low stress buffer layer, 0.8~1 μm of regrowth of N-type roughened layer；
Step 3: be warming up to 1070~1090 DEG C, pressure be N-type electrode layer that 200torr first grows light Si doping, with a thickness of 0.8
~1 μm, the N-type GaN layer of regrowth weight Si doping, with a thickness of 1.8~2.5 μm；
Step 4: n-GaN electrons spread layer, with a thickness of 80~120nm, the n-GaN electronics are grown on the basis of N-type GaN layer
Regrowth stress release layer on diffusion layer, with a thickness of 100nm；Raw material is TMGa, SiH4 and NH3；
Step 5: at 740~760 DEG C of growth temperature of trap, the growth temperature at base is 820~840 DEG C, pressure is raw under 200torr
The InGaN/GaN superlattices in long 18~23 periods are as multiple quantum well layer, and multiple quantum well layer is with a thickness of 150~200nm；
The InGaN/GaN superlattices that the In that 10~15 periodic thicknesses are 80~100nm is lightly doped first are grown, specifically: sir
The GaN-cap layer of long 30~40nm, the barrierGaN layer of 5~10nm of regrowth finally grow the InGaN trap of 1.5~2nm
Layer；
8 periodic thicknesses of regrowth are the InGaN/GaN of the In heavy doping of 100~150nm, specifically:
The barrierGaN layer of 10~15nm is first grown, the InGaN well layer of 2~5nm of regrowth finally grows 30~40nm's
Cap layers of GaN；
Step 6: it is warming up to 960~980 DEG C, pressure is 150torr growing P-type AlGaN electronic barrier layer, with a thickness of 20~
50nm；
920~940 DEG C are cooled to, pressure is the p-type GaN layer that 150torr grows Mg doping, with a thickness of 100~150nm；
The p-type GaN electrode layer of high Mg doping is grown, with a thickness of 10~20nm；
Step 7: growing surface contact layer, with a thickness of 10~30nm, be then cooled to 700~730 DEG C carry out annealing 60~
120min, later furnace cooling.
2. a kind of preparation method of vertical structure LED blue light extension according to claim 1, which is characterized in that step 6
In, the p-type GaN layer includes hole diffusion layer and hole injection layer, and the hole thickness of diffusion layer is 30~50nm, the sky
Cave implanted layer is with a thickness of 50~100nm.
3. a kind of preparation method of vertical structure LED blue light extension according to claim 2, which is characterized in that the p-type
AlGaN electronic barrier layer is with a thickness of 30nm, and for the p-type GaN layer with a thickness of 110nm, the p-type GaN electrode layers thickness is 10nm,
The hole thickness of diffusion layer is 30nm, and the hole injection layer is with a thickness of 80nm.
4. a kind of preparation method of vertical structure LED blue light extension according to claim 1, which is characterized in that step 2
In, the low stress buffer layer thickness is 1.2 μm, and the N-type roughened layer is with a thickness of 0.8 μm.
5. a kind of preparation method of vertical structure LED blue light extension according to claim 1, which is characterized in that step 3
In, the N-type electrode layer is with a thickness of 0.8 μm, and the N-type GaN layer is with a thickness of 2 μm.
6. a kind of preparation method of vertical structure LED blue light extension according to claim 1, which is characterized in that step 7
In, the surface contact layer is with a thickness of 10nm.
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| CN102412351A (en) * | 2011-10-27 | 2012-04-11 | 华灿光电股份有限公司 | Preparation method of compound n-GaN layer structure raising ESD |
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| CN104835885A (en) * | 2015-05-13 | 2015-08-12 | 湘能华磊光电股份有限公司 | LED epitaxial layer structure and preparation method thereof, and LED device provided with the structure |
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| CN102412351A (en) * | 2011-10-27 | 2012-04-11 | 华灿光电股份有限公司 | Preparation method of compound n-GaN layer structure raising ESD |
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