CN106168777A - Rely on the method that assistant SCM extends 51 single-chip microcomputer external interrupt quantity - Google Patents

Rely on the method that assistant SCM extends 51 single-chip microcomputer external interrupt quantity Download PDF

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Publication number
CN106168777A
CN106168777A CN201610530500.5A CN201610530500A CN106168777A CN 106168777 A CN106168777 A CN 106168777A CN 201610530500 A CN201610530500 A CN 201610530500A CN 106168777 A CN106168777 A CN 106168777A
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interrupt
external interrupt
mouth
source
chip microcomputer
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CN201610530500.5A
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CN106168777B (en
Inventor
陈炜
王婧
陈叶凯
周国良
王玉槐
叶霞
倪虹
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Yongchun County Product Quality Inspection Institute Fujian Fragrance Product Quality Inspection Center National Incense Burning Product Quality Supervision And Inspection Center Fujian
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Qianjiang College of Hangzhou Normal University
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/23Pc programming
    • G05B2219/23218Interrupt queued requests only at the end of each segment of each of requests

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Microcomputers (AREA)
  • Bus Control (AREA)

Abstract

The invention discloses the method relying on assistant SCM to extend 51 single-chip microcomputer external interrupt quantity.Existing expansion of external interrupt mode easily misses interrupt signal.The sub-single-chip microcomputer of the present invention continually scans for the level state of the input port of definition, the most a certain incoming level produces change, the level of the most sub-single-chip microcomputer external interrupt delivery outlet changes therewith, thus trigger host scm external interrupt, host scm scans the level state of the input port of definition in interrupt routine, finds the interrupt source of triggering and performs the program that this interrupt source is corresponding.The present invention ensure that the accuracy of down trigger;Meanwhile, it is capable to the system that effectively compatible external interrupt source quantity is different.

Description

Rely on the method that assistant SCM extends 51 single-chip microcomputer external interrupt quantity
Technical field
The invention belongs to technical field of single chip microcomputer, be specifically related to a kind of dependence assistant SCM and extend outside 51 single-chip microcomputers The method of portion's number of interruptions.
Background technology
51 single-chip microcomputers have cheap feature, and its unit price is general all within 5 yuan.But its external interrupt quantity is general Less, as a example by the STC89C51 of macrocrystalline company, it only has two exterior interrupt.Even if release after the said firm 12 are Row, 15 series monolithics can provide more external interrupt, but these external interrupt increased are only capable of and realize trailing edge and touch Send out, and rising edge cannot be realized as two interrupt sources of INT0, INT1, trailing edge all triggers.Therefore, needed for control system External interrupt quantity more time, depend merely on 51 single-chip microcomputers and will be difficult to meet demand for control.
Currently there is a kind of expansion of external interrupt mode more typically, will multiple outside sources and logical "and" door chip The input of foot is connected, and is connected with the common I/O mouth of single-chip microcomputer by these outside sources simultaneously.And by logical "and" door chip Output pin is connected with external interrupt INT0 or the INT1 (macrocrystalline company is generally P3.0 and P3.1) of single-chip microcomputer.By used Single-chip processor i/o mouth is each configured to quasi-two-way mode.Now, when external interrupt signal source is all high level, and external interrupt pin has One is high level, and another is low level, then external interrupt pin is low level.Therefore, when three exterior interrupt have One when becoming low level, single-chip microcomputer external interrupt receives a trailing edge, is triggered.In outside interrupt routine, scanning The all common I/O mouth that single-chip microcomputer is connected with interrupt source signal, scanning discovery is that the interrupt source that low level I/O mouth is corresponding is exactly The required interrupt signal triggered.Single-chip microcomputer just can make corresponding response.When low level exterior interrupt becomes high level again Time, the output with door chip becomes high level, and single-chip microcomputer external interrupt receives a rising edge, again triggers, and makes phase The response answered.
Said external interrupt expansion mode is capable of in the outside all triggered rising edge, trailing edge to a certain extent Break and be extended, but it has following defects that
1. when signal source becomes low level, it is possible to trigger external interrupt.Now, if this signal source becomes high electricity the most in time again Put down, and another interrupt source also becomes low level, it is desirable to trigger and interrupt, but owing to an input inputs as low for low level and two During level, output is low level, then single-chip microcomputer will be unable to receive second interrupt requests, and system will be missed in this outside Disconnected, produce corresponding mistake.
2. AND gate chip has two inputs, three inputs, four inputs, when external input signal quantity exceedes the input number with door Amount, then to complete to trigger accordingly by series connection polylith AND gate chip;When external interrupt signal source quantity is less than AND gate During input quantity, need again the AND gate input pin not connecing signal source is connected high level.Therefore, AND gate chip is using Time be not easy to compatible different external signal quantity.
Summary of the invention
It is an object of the invention to for the deficiencies in the prior art, it is provided that a kind of dependence assistant SCM extends outside 51 single-chip microcomputers The method of portion's number of interruptions.
The present invention specifically comprises the following steps that
The delivery outlet that a respective I/O mouth is all asked by step one, two pieces of sub-single-chip microcomputers as external interrupt and main list The external interrupt I/O mouth of sheet machine is connected;Remaining I/O mouth of sub-single-chip microcomputer is defined as input port according to outside source quantity n, and two The input port sum of individual sub-single-chip microcomputer is n, n≤14, and each single-chip microcomputer at least input port.N outside source with The input port that sub-single-chip microcomputer is corresponding is connected, and is connected with the common I/O mouth of host scm simultaneously.The sub-single-chip processor i/o mouth used and Host scm I/O mouth is each configured to quasi-two-way mode, and the external interrupt of host scm is set to rising edge, trailing edge all triggers.
Step 2, sub-single-chip microcomputer continually scan for the input port level state of definition, the incoming level of the most a certain input port Different from recording level, then recording level is updated to Current interrupt signal source state.And the delivery outlet level of sub-single-chip microcomputer occurs Change, so that the change of host scm external interrupt I/O mouth, triggers the external interrupt of host scm.
Step 3, the external interrupt of host scm trigger and select one from following three kinds of down trigger modes:
(1) rising edge, trailing edge all trigger host scm external interrupt: host scm by external interrupt program scanning with The all common I/O mouth that outside source is connected, outside source corresponding to the scanning discovery I/O mouth different from recording level is just It is the interrupt source signal of required triggering, then performs the program corresponding with this interrupt source signal, and recording level is updated to currently Interrupt source signal state.
(2) only rising edge triggers host scm external interrupt: host scm is by external interrupt program scanning and outside letter The all common I/O mouth that number source is connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then Recording level is updated to Current interrupt signal source state;If this outside source is high level, perform and this interrupt source signal pair The program answered, if this outside source is low level, then exits interruption.
(3) only trailing edge triggers host scm external interrupt: host scm is by external interrupt program scanning and outside letter The all common I/O mouth that number source is connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then Recording level is updated to Current interrupt signal source state;If this outside source is low level, perform and this interrupt source signal pair The program answered.If this interrupt source signal is high level, then exit interruption.
Described host scm uses IAP15W4K58S4 chip;Sub-single-chip microcomputer uses STC15F104E chip.
The invention have the benefit that
1, the present invention provides the sub-single-chip microcomputer of a kind of use and continually scans for external interrupt source signal, and by sub-single-chip microcomputer to main list Sheet machine sends the extended mode of down trigger request, makes all interrupt requests all can be received by host scm, is effectively ensured and is The stability of system;Meanwhile, it is capable to the system that effectively compatible external interrupt source quantity is different.
2, the present invention select STC15F104E as sub-single-chip microcomputer, the unit price of this single-chip microcomputer difference encapsulation all below 3 yuan, Its internal generation clock signal, it is not necessary to external crystal oscillator, maximum clock frequency is up to 33MHz, it is possible to realize quickly scanning;It is write Simply it is connected with host scm after entering extender and can use;Can complete to extend external interrupt quantity with extremely low cost Purpose.
Accompanying drawing explanation
Fig. 1 is the program flow diagram of neutron single-chip microcomputer of the present invention.
Detailed description of the invention
The invention will be further described below in conjunction with the accompanying drawings.
The method relying on assistant SCM to extend 51 single-chip microcomputer external interrupt quantity, specifically comprises the following steps that
The delivery outlet that a respective I/O mouth is all asked by step one, two pieces of sub-single-chip microcomputers as external interrupt and main list The external interrupt I/O mouth of sheet machine is connected;Remaining I/O mouth of sub-single-chip microcomputer is defined as input port according to outside source quantity n, and two The input port sum of individual sub-single-chip microcomputer is n, n≤14, and each single-chip microcomputer at least input port, two pieces of sons in the present embodiment The input port of single-chip microcomputer is 3.The input port that n outside source is corresponding with sub-single-chip microcomputer is connected, simultaneously and host scm Common I/O mouth connect.Sub-single-chip processor i/o mouth and the host scm I/O mouth used are each configured to quasi-two-way mode, host scm External interrupt be set to rising edge, trailing edge all triggers.Host scm uses IAP15W4K58S4 chip;Sub-single-chip microcomputer uses STC15F104E chip.
Step 2 is as it is shown in figure 1, sub-single-chip microcomputer continually scans for the input port level state of definition, the most a certain input port Incoming level different from recording level, then recording level is updated to Current interrupt signal source state.And the output of sub-single-chip microcomputer Mouth level changes, so that the change of host scm external interrupt I/O mouth, triggers the external interrupt of host scm.
Step 3, the external interrupt of host scm trigger and select one from following three kinds of down trigger modes:
(1) rising edge, trailing edge all trigger host scm external interrupt: host scm by external interrupt program scanning with The all common I/O mouth that outside source is connected, outside source corresponding to the scanning discovery I/O mouth different from recording level is just It is the interrupt source signal of required triggering, then performs the program corresponding with this interrupt source signal, and recording level is updated to currently Interrupt source signal state.
(2) only rising edge triggers host scm external interrupt: host scm is by external interrupt program scanning and outside letter The all common I/O mouth that number source is connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then Recording level is updated to Current interrupt signal source state;If this outside source is high level, perform and this interrupt source signal pair The program answered, if this outside source is low level, then exits interruption.
(3) only trailing edge triggers host scm external interrupt: host scm is by external interrupt program scanning and outside letter The all common I/O mouth that number source is connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then Recording level is updated to Current interrupt signal source state;If this outside source is low level, perform and this interrupt source signal pair The program answered.If this interrupt source signal is high level, then exit interruption.
This dependence assistant SCM extends the method for 51 single-chip microcomputer external interrupt quantity, and the most a certain signal source produces and becomes Changing, the state of external interrupt delivery outlet will change, and under this state, host scm just will not miss and perform current external The external interrupt produced during interruption.The scanning speed of sub-single-chip microcomputer is the highest, and the external interrupt of host scm is less susceptible to omit.Son The scanning speed of single-chip microcomputer is mainly determined by two aspects: 1. the length of program, judges that statement is typically one-cycle instruction during scanning, Perform this statement and need one machine cycle of used time.Program is the shortest for the shortest sweep time, and the scanning I/O mouth i.e. defined is the fewest, sweeps Retouch precision the highest.2. the length of machine cycle, single-chip microcomputer performs statement and is usually single machine cycle instruction.Machine cycle is by clock Cycle determines, the clock cycle is determined by the frequency of crystal oscillator.Crystal oscillator frequency is the highest, and the machine cycle is the shortest, execution the fastest, does not more allow Error-prone, configuring crystal oscillator frequency during download is 30M.

Claims (2)

1. rely on the method that assistant SCM extends 51 single-chip microcomputer external interrupt quantity, it is characterised in that: the concrete step of the method Rapid as follows:
Delivery outlet that a respective I/O mouth is all asked by step one, two pieces of sub-single-chip microcomputers as external interrupt and host scm External interrupt I/O mouth be connected;Remaining I/O mouth of sub-single-chip microcomputer is defined as input port according to outside source quantity n, two sons The input port sum of single-chip microcomputer is n, n≤14, and each single-chip microcomputer at least input port;N outside source and sub-list The input port that sheet machine is corresponding is connected, and is connected with the common I/O mouth of host scm simultaneously;The sub-single-chip processor i/o mouth used and main list Sheet machine I/O mouth is each configured to quasi-two-way mode, and the external interrupt of host scm is set to rising edge, trailing edge all triggers;
Step 2, sub-single-chip microcomputer continually scan for the input port level state of definition, the incoming level of the most a certain input port and note Record level is different, then recording level is updated to Current interrupt signal source state;And the delivery outlet level of sub-single-chip microcomputer changes, So that the change of host scm external interrupt I/O mouth, trigger the external interrupt of host scm;
Step 3, the external interrupt of host scm trigger and select one from following three kinds of down trigger modes:
(1) rising edge, trailing edge all trigger host scm external interrupt: host scm is by external interrupt program scanning and outside The all common I/O mouth that signal source is connected, the outside source that the scanning discovery I/O mouth different from recording level is corresponding is exactly institute The interrupt source signal that need to trigger, then perform the program corresponding with this interrupt source signal, and recording level be updated to Current interrupt Signal source state;
(2) only rising edge triggers host scm external interrupt: host scm passes through external interrupt program scanning and outside source The all common I/O mouth being connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then record Level is updated to Current interrupt signal source state;If this outside source is high level, perform corresponding with this interrupt source signal Program, if this outside source is low level, then exits interruption;
(3) only trailing edge triggers host scm external interrupt: host scm passes through external interrupt program scanning and outside source The all common I/O mouth being connected, the outside source that the scanning discovery I/O mouth different from recording level before is corresponding, then record Level is updated to Current interrupt signal source state;If this outside source is low level, perform corresponding with this interrupt source signal Program;If this interrupt source signal is high level, then exit interruption.
Dependence assistant SCM the most according to claim 1 extends the method for 51 single-chip microcomputer external interrupt quantity, its feature Being: described host scm uses IAP15W4K58S4 chip, sub-single-chip microcomputer uses STC15F104E chip.
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1288201A (en) * 1999-09-09 2001-03-21 上海贝尔有限公司 Communication interface of master-slave type processor system
DE102006034681A1 (en) * 2006-07-24 2008-01-31 Areva Np Gmbh Automation system`s cycle time stabilizing method for e.g. nuclear plant, involves forming cyclic process such that additional process is shifted when cyclic process does not disturb cycle start before starting cycle start
CN201397503Y (en) * 2008-11-21 2010-02-03 冶金自动化研究设计院 Interrupt expander circuit
JP2010198432A (en) * 2009-02-26 2010-09-09 Brother Ind Ltd Numerical control type machine tool and interrupt processing method thereof

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