CN106155160B - A kind of band-gap reference circuit with high PSRR characteristic and self-start circuit - Google Patents
A kind of band-gap reference circuit with high PSRR characteristic and self-start circuit Download PDFInfo
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- CN106155160B CN106155160B CN201510148150.1A CN201510148150A CN106155160B CN 106155160 B CN106155160 B CN 106155160B CN 201510148150 A CN201510148150 A CN 201510148150A CN 106155160 B CN106155160 B CN 106155160B
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Abstract
The invention discloses a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit, it includes band-gap reference circuit, current circuit, feedback circuit and start-up circuit；Described current circuit is used to increase the resistance between dc source VDD and the DC input of band gap reference core circuit, interference of the dc source VDD to the DC supply input terminal voltage Vd of band-gap reference circuit is reduced, so as to strengthen PSRR and circuit stability；When band-gap reference circuit is in zero current condition, start-up circuit start working, make band-gap reference circuit deviate zero current condition, while band-gap reference circuit by feedback circuit by its status information feedback to start-up circuit, when band-gap reference circuit normal work, start-up circuit is stopped.
Description
Technical field
The present invention relates to band-gap reference circuit field, has high PSRR characteristic and self-starting more particularly to one kind
The band-gap reference circuit of circuit.
Background technology
The general principle of band-gap reference circuit is to be added the voltage that two have opposite temperature coefficients with suitable weight,
It is final to obtain the reference voltage with zero-temperature coefficient.For example, voltage V+ possesses positive temperature coefficient, voltage V- possesses negative temperature system
, be present suitable weight α and weight beta in number, meetThus obtain the base with zero-temperature coefficient
Quasi- voltage, the expression formula of reference voltage is Vref=α V++βV-。
Bipolar transistor (BJT) has following two characteristics：
1st, the base stage of bipolar transistor-emitter voltage VBEVoltage is inversely proportional with absolute temperature；
2nd, under different collector currents, the difference DELTA V of base stage-emitter voltage of bipolar transistorBEWith absolute temperature
Spend directly proportional.Therefore bipolar transistor may make up the core of band-gap reference voltage circuit.
In band-gap reference circuit, the fluctuation of supply voltage, Vref fluctuation can be caused.PSRR is to weigh circuit
To the parameter of the rejection ability of noise on power line.Therefore, it is necessary to design a kind of enhancing PSRR, power supply ripple can be reduced
The band-gap reference circuit of the dynamic interference brought to band-gap reference circuit.
Band-gap reference (bandgap) circuit module provides the reference voltage with zero-temperature coefficient for other circuit modules.
In bandgap engineered benchmark (bandgap) circuit, in order to avoid it is in undesirable zero current condition, it is necessary to increase startup electricity
Road module.Current start-up circuit is typically all by way of providing and starting voltage, forces controlled circuit to deviate zero current shape
State, but this Starting mode is unstable, and controlled circuit may can return to zero current condition and can not normally start again.
The content of the invention
There is high PSRR characteristic it is an object of the invention to overcome the deficiencies of the prior art and provide one kind and open certainly
The band-gap reference circuit of dynamic circuit, dc source VDD is reduced to band gap reference core circuit and its DC supply input of each branch road
Terminal voltage Vd interference, improve PSRR；Using the current circuit of Cascade structures, increase dc source VDD and band gap
Resistance between the DC input of benchmark core circuit, so as to strengthen PSRR and circuit stability.And pass through note
Enter the mode of starting current, force band-gap reference circuit to deviate zero current condition, after band-gap reference circuit normal work, start
Circuit is by being automatically stopped injection starting current；The working condition of start-up circuit can also be controlled artificially.
The purpose of the present invention is achieved through the following technical solutions：One kind has high PSRR characteristic and opened certainly
The band-gap reference circuit of dynamic circuit, it includes band-gap reference circuit, current circuit, feedback circuit and start-up circuit.
Described current circuit uses Cascade structures, for increasing dc source VDD and band gap reference core circuit
Resistance between DC input, dc source VDD is reduced to the dry of the DC supply input terminal voltage Vd of band-gap reference circuit
Disturb, so as to strengthen PSRR and circuit stability.
When band-gap reference circuit is in zero current condition, start-up circuit is started working, and band-gap reference circuit is deviateed zero
Current status, at the same band-gap reference circuit by feedback circuit by its status information feedback to start-up circuit, when band-gap reference electricity
During the normal work of road, start-up circuit is stopped.
The current input terminal of current circuit, feedback circuit and start-up circuit is connected with dc source VDD, the electricity of current circuit
The first feedback input end for flowing feedback end and feedback circuit connects, the feedback output end of feedback circuit and the 4th electricity of start-up circuit
Flow feedback port o4 connections.
The 3rd of start-up circuit start the current output terminal of output port o3 and current circuit with band-gap reference circuit
DC input is port C connections, and the second of start-up circuit starts the port x company of output port o2 and band-gap reference circuit
Connect, the first of start-up circuit starts the startup control terminal connection of output port o1 and feedback circuit, the port Z of band-gap reference circuit
It is connected with the second feedback input end of feedback circuit.
Described band-gap reference circuit includes band gap reference core circuit, and band gap reference core circuit includes operational amplifier
OP1, PMOS PM1, PMOS PM2, triode PNP1, triode PNP2 and resistance R1.
The drain electrode of operational amplifier OP1 inverting input and PMOS PM1 is connected with port x, triode PNP1 hair
Emitter-base bandgap grading is also connected by resistance R1 with the port x of band-gap reference circuit, and triode PNP1 colelctor electrode and base stage dock with ground,
PMOS PM1 source electrode and PMOS PM2 source electrode are connected with the DC input of band-gap reference circuit.
The drain electrode of operational amplifier OP1 in-phase input end, PMOS PM2 and triode PNP2 emitter stage are and band gap
The port Y connections of reference circuit, triode PNP2 colelctor electrode and base stage dock with ground.
The grid of operational amplifier OP1 output end, PMOS PM1 grid and PMOS PM2 is electric with band-gap reference
The port Z connections on road.
Described band-gap reference circuit also includes reference voltage generating circuit, and reference voltage generating circuit includes PMOS
PM3, triode PNP3 and resistance R2.
PMOS PM3 source electrode and the DC input of band-gap reference circuit connect, PMOS PM3 drain electrode and benchmark
Voltage VREF output ends are connected, and PMOS PM3 drain electrode is also connected by resistance R2 with triode PNP3 emitter stage, PMOS
The port Z connections of PM3 grid and band-gap reference circuit, triode PNP3 colelctor electrode and base stage dock with ground.
Described band-gap reference circuit also includes leakage path, and leakage path causes band gap reference core circuit port Y's
Output voltage will not change with the change of external condition.
Described leakage path includes PMOS PM4 and NMOS tube NM1；PMOS PM4 source electrode and band-gap reference circuit
DC input connection, PMOS PM4 drain electrode respectively the drain electrode with NMOS tube NM1, grid be connected, PMOS PM4's
The port Y connections of grid and band-gap reference circuit, NMOS tube NM1 source electrode with dock.
Described band-gap reference circuit also includes anti-jamming circuit, and anti-jamming circuit is used to reduce due to dc source VDD
Fluctuation and the interference that brings, reduce and disturbed caused by each branch current of band-gap reference circuit, improve band-gap reference circuit
PSRR.
Described anti-jamming circuit includes capacity cell, one end of capacity cell and the DC supply input of band-gap reference circuit
End connection, the other end of capacity cell with dock.
Described current circuit includes the current source I1 by PMOS PM5 and PMOS PM6 the Cascade structures formed.
PMOS PM5 source electrode and the input of current circuit connect, PMOS PM5 drain electrode and PMOS PM6 source
Pole connects, PMOS PM5 grid and PMOS PM6 grid respectively with the port A of the current feedback terminal of current circuit and end
Mouth B connections, PMOS PM6 drain electrode and the output end of current circuit connect.
Described start-up circuit includes boot leg, the first current mirror unit, the second current mirror unit, the 3rd electric current
Mirror image unit and the 4th current mirror unit, boot leg, the first current mirror unit, the second current mirror unit, the 3rd electricity
The power input of traffic mirroring unit and the 4th current mirror unit is connected with dc source VDD, the image current of boot leg
Image current input of the output end respectively with the first current mirror unit and the second current mirror unit is connected, boot leg
Image current input is connected with the power output end of the 3rd current mirror unit, the image current output end of boot leg and its
Image current input is connected to M points, the power output end of boot leg with dock, the power supply of the first current mirror unit is defeated
Go out end to be connected with the first startup output port o1, the power output end of the second current mirror unit and second starts output port o2
Connection, the image current input of the 3rd current mirror unit are connected with current feedback port o4, the 4th current mirror unit
Power output end is connected with the 3rd startup output port o3, the image current input and boot leg of the 4th current mirror unit
Image current output end connection.
After electricity is started working in boot leg, the first current mirror unit will be started by the first startup output port o1
Current mirror on branch road exports the startup control terminal to feedback circuit, feedback circuit is normally started.
Second current mirror unit is exported the current mirror in boot leg to band by the second startup output port o2
The port x of gap reference circuit, the 4th current mirror unit start output port o3 by the current mirror in boot leg by the 3rd
As exporting the port C to band-gap reference circuit, band-gap reference circuit is set to deviate zero current starting state by two-way starting current.
The feedback electricity that 3rd current mirror unit is exported by the output end of current feedback port o4 reception feedback circuits
Stream, the 3rd current mirror unit feed back to the current mirror on current circuit in boot leg so that Q points in boot leg
Voltage gradually increases, and gradually cut-off is up to completely closing for the first current mirror unit and the second current mirror unit, now, starts
Circuit stops output starting current.
Described start-up circuit also includes first switch unit, and described first switch unit includes being used to control starting branch
The first switch module of road break-make, for control the first current mirror unit break-make second switch module, for control second
3rd switch module of current mirror unit break-make, the 4th switch module and use for controlling the 4th current mirror unit break-make
In the 5th switch module for controlling boot leg and the multiple current mirror unit break-make simultaneously.
The power input of first switch module and the power output end of boot leg connect, the power supply of first switch module
Output end with dock, the power input of second switch module is connected with the power output end of the second current mirror unit,
The power output end of two switch modules is connected with the first startup output port o1, the power input and the 4th of the 4th switch module
The power output end connection of current mirror unit, the power output end of the 4th switch module and the 3rd start output port o3 companies
Connect, first switch module, second switch module, the control terminal of the 3rd switch module and the 4th switch module are believed with the first control
Number port N_S connections.
The power input of 5th switch module is connected with dc source VDD, the power output end of the 5th switch module with
The Q points connection of boot leg, the control terminal of the 5th switch module are connected with the second control signal port S.
Described feedback circuit includes second switch unit and the 5th current mirror unit, the electricity of the 5th current mirror unit
Stream input is connected with dc source VDD, and the first feedback input end of the 5th current mirror unit and the electric current of current circuit are anti-
Present end connection, the port Z connections of the second feedback input end and band-gap reference circuit of the 5th current mirror unit, the 5th current mirror
As the output end of unit is connected with the input of second switch unit, the control terminal of second switch unit and the first of start-up circuit
Start output port o1 connections, the output end of second switch unit with dock.
The beneficial effects of the invention are as follows：
1) in band-gap reference circuit, the leakage path being made up of PMOS PM4 and NMOS tube NM1 is increased, to reduce electricity
The interference that source VDD is brought.
2) in order to strengthen the PSRR of band-gap reference circuit, current source I in current circuit by Cascade structures Lai
Realize, increase dc source VDD to Vd and arrive resistance, interference of the dc source to Vd is reduced, so as to improve PSRR.
3) in order to strengthen the PSRR of band-gap reference circuit, increase a power supply on the side of band-gap reference circuit and arrive
The electric capacity on ground, i.e. anti-jamming circuit, band-gap reference circuit is done to reduce power-supply fluctuation using the charge-discharge principle to electric capacity
Disturb.
4) present invention forces band-gap reference circuit to deviate zero current condition, works as band gap by way of injecting starting current
After reference circuit normal work, start-up circuit is by being automatically stopped injection starting current；The working condition of start-up circuit can also be by people
Controlled for ground.
5) start-up circuit of the invention can set up switch element, and the work of start-up circuit is artificially controlled by switch element
Make state, can also be fully disconnected start-up circuit and controlled circuit.
Brief description of the drawings
Fig. 1 is the structured flowchart of integrated circuit of the present invention；
Fig. 2 is the structured flowchart of band-gap reference circuit of the present invention；
Fig. 3 is the circuit theory diagrams of band-gap reference circuit of the present invention；
Fig. 4 is the structured flowchart of start-up circuit of the present invention；
Fig. 5 is the circuit theory diagrams of start-up circuit of the present invention；
Fig. 6 is the circuit theory diagrams of feedback circuit of the present invention；
Fig. 7 is the circuit theory diagrams of integrated circuit of the present invention；
Fig. 8 is traditional structure figure compared with the PSRR simulation result of structure of the present invention.
Embodiment
Technical scheme is described in further detail below in conjunction with the accompanying drawings, but protection scope of the present invention is not limited to
It is as described below.
As shown in figure 1, a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit, it includes band
Gap reference circuit, current circuit, feedback circuit and start-up circuit.
Described current circuit uses Cascade structures, for increasing dc source VDD and band gap reference core circuit
Resistance between DC input, dc source VDD is reduced to the dry of the DC supply input terminal voltage Vd of band-gap reference circuit
Disturb, so as to strengthen PSRR and circuit stability.
When band-gap reference circuit is in zero current condition, start-up circuit is started working, and band-gap reference circuit is deviateed zero
Current status, at the same band-gap reference circuit by feedback circuit by its status information feedback to start-up circuit, when band-gap reference electricity
During the normal work of road, start-up circuit is stopped.
The current input terminal of current circuit, feedback circuit and start-up circuit is connected with dc source VDD, the electricity of current circuit
The first feedback input end for flowing feedback end and feedback circuit connects, the feedback output end of feedback circuit and the 4th electricity of start-up circuit
Flow feedback port o4 connections.
The 3rd of start-up circuit start the current output terminal of output port o3 and current circuit with band-gap reference circuit
DC input is port C connections, and the second of start-up circuit starts the port x company of output port o2 and band-gap reference circuit
Connect, the first of start-up circuit starts the startup control terminal connection of output port o1 and feedback circuit, the port Z of band-gap reference circuit
It is connected with the second feedback input end of feedback circuit.
(1) band-gap reference circuit
As shown in Fig. 2 described band-gap reference circuit includes band gap reference core circuit, reference voltage generating circuit, let out
Put passage and anti-jamming circuit.
Described leakage path is defeated to the direct current of band gap reference core circuit and its each branch road for reducing dc source
Enter terminal voltage Vd interference and enhancing PSRR；Described anti-jamming circuit is used to reduce due to dc source VDD ripple
The interference moved and brought, reduce and disturbed caused by each branch current of band-gap reference circuit, improve the power supply of band-gap reference circuit
Rejection ratio.
Wherein, the direct current of band gap reference core circuit, reference voltage generating circuit, leakage path and anti-jamming circuit is defeated
Enter end to be connected with dc source VDD, the first output end of band gap reference core circuit and the control of reference voltage generating circuit are defeated
Enter end connection, the second output end of band gap reference core circuit and the control signal of leakage path connect, and reference voltage produces
First output end output reference voltage V of circuitREF, the output of the second output end, leakage path of reference voltage generating circuit
3rd output end at end, the output end of anti-jamming circuit and band gap reference core circuit is docked with ground.
(1) band gap reference core circuit
As shown in figure 3, the band gap reference core circuit in the present invention includes operational amplifier OP1, PMOS PM1, PMOS
Pipe PM2, triode PNP1, triode PNP2 and resistance R1.
The drain electrode of operational amplifier OP1 inverting input and PMOS PM1 is connected with port x, triode PNP1 hair
Emitter-base bandgap grading is also connected by resistance R1 with the port x of band-gap reference circuit, and triode PNP1 colelctor electrode and base stage dock with ground,
PMOS PM1 source electrode and PMOS PM2 source electrode are connected with the DC input of band-gap reference circuit.
The drain electrode of operational amplifier OP1 in-phase input end, PMOS PM2 and triode PNP2 emitter stage are and band gap
The port Y connections of reference circuit, triode PNP2 colelctor electrode and base stage dock with ground.
The grid of operational amplifier OP1 output end, PMOS PM1 grid and PMOS PM2 is electric with band-gap reference
The port Z connections on road.
(2) reference voltage generating circuit
Reference voltage generating circuit in the present invention includes PMOS PM3, triode PNP3 and resistance R2.
PMOS PM3 source electrode and the DC input of band-gap reference circuit connect, PMOS PM3 drain electrode and benchmark
Voltage VREFOutput end is connected, and PMOS PM3 drain electrode is also connected by resistance R2 with triode PNP3 emitter stage, PMOS
The port Z connections of PM3 grid and band-gap reference circuit, triode PNP3 colelctor electrode and base stage dock with ground.
(3) leakage path
Leakage path causes band gap reference core circuit port Y output voltage not become with the change of external condition
Change.
Leakage path in the present invention includes PMOS PM4 and NMOS tube NM1.PMOS PM4 source electrode and band-gap reference
The DC input connection of circuit, the drain electrode with NMOS tube NM1, grid are connected respectively for PMOS PM4 drain electrode, PMOS
The port Y connections of PM4 grid and band-gap reference circuit, NMOS tube NM1 source electrode with dock.
Leakage path is the leakage path in band-gap reference circuit so that port C voltage will not changing with external condition
Become and change, can also be not provided with PMOS PM4.
(4) anti-jamming circuit
Anti-jamming circuit is used to reduce the interference brought due to dc source VDD fluctuation, reduces band-gap reference circuit
Disturbed caused by each branch current, improve the PSRR of band-gap reference circuit.
Described anti-jamming circuit includes capacity cell, one end of capacity cell and the DC supply input of band-gap reference circuit
End connection, the other end of capacity cell with dock.
General electric capacity can be selected in described capacity cell, and MOS capacitor also can be selected, such as the MOS capacitor NM2 in Fig. 3,
MOS capacitor NM2 grid and the DC input of band-gap reference circuit connect, and MOS capacitor NM2 source electrode and drain electrode are equal
Docked with ground.
(2) current circuit
In order to strengthen PSRR, current circuit is realized by the current source of Cascade structures, increases dc source
VDD to Vd arrives resistance, interference of the dc source to Vd is reduced, so as to improve PSRR.
Current circuit in the present invention includes the current source by PMOS PM5 and PMOS PM6 the Cascade structures formed
I1。
PMOS PM5 source electrode and the input of current circuit connect, PMOS PM5 drain electrode and PMOS PM6 source
Pole connects, PMOS PM5 grid and PMOS PM6 grid respectively with the port A of the current feedback terminal of current circuit and end
Mouth B connections, PMOS PM6 drain electrode and the output end of current circuit connect.
Assuming that：Due to supply voltage VDD fluctuation, Injection Current source I change is caused to turn to Δ I.
MOS capacitor NM4 in anti-jamming circuit, pass through the curent change Δ of charge-discharge principle anti-jamming circuit
I1。
PMOS PM4 and NMOS tube NM1 in leakage path cause the curent change Δ I of the branch road2。
Now Δ I ≈ Δs I1+ΔI2, so as to reduce the interference to other branch currents in band-gap reference circuit, effectively increase
Strong PSRR.
(3) start-up circuit
In bandgap engineered reference circuit, in order to avoid it is in undesirable zero current condition, it is necessary to increase startup electricity
Road module.When band-gap reference circuit is in zero current condition, start-up circuit is started working so that band-gap reference breaks away from zero current shape
State；Band-gap reference circuit after normal work, close by start-up circuit.
As shown in figure 4, described start-up circuit includes boot leg, the first current mirror unit, the second current mirror list
Member, the 3rd current mirror unit and the 4th current mirror unit, boot leg, the first current mirror unit, the second current mirror
The power input of unit, the 3rd current mirror unit and the 4th current mirror unit is connected with dc source VDD, boot leg
Image current input of the image current output end respectively with the first current mirror unit and the second current mirror unit be connected,
The image current input of boot leg is connected with the power output end of the 3rd current mirror unit, the image current of boot leg
Output end and its image current input are connected to M points, the power output end of boot leg with dock, the first current mirror list
The power output end of member is connected with the first startup output port o1, and the power output end of the second current mirror unit and second starts
Output port o2 connections, the image current input of the 3rd current mirror unit are connected with current feedback port o4, the 4th electric current
The power output end of mirror image unit is connected with the 3rd startup output port o3, the image current input of the 4th current mirror unit
It is connected with the image current output end of boot leg.
After electricity is started working in boot leg, the first current mirror unit will be started by the first startup output port o1
Current mirror on branch road exports the startup control terminal to feedback circuit, feedback circuit is normally started.
Second current mirror unit is exported the current mirror in boot leg to band by the second startup output port o2
The port x of gap reference circuit, the 4th current mirror unit start output port o3 by the current mirror in boot leg by the 3rd
As exporting the port C to band-gap reference circuit, band-gap reference circuit is set to deviate zero current starting state by two-way starting current.
The feedback electricity that 3rd current mirror unit is exported by the output end of current feedback port o4 reception feedback circuits
Stream, the 3rd current mirror unit feed back to the current mirror on current circuit in boot leg so that Q points in boot leg
Voltage gradually increases, and gradually cut-off is up to completely closing for the first current mirror unit and the second current mirror unit, now, starts
Circuit stops output starting current.
Described start-up circuit also includes first switch unit, and described first switch unit includes being used to control starting branch
The first switch module of road break-make, for control the first current mirror unit break-make second switch module, for control second
3rd switch module of current mirror unit break-make, the 4th switch module and use for controlling the 4th current mirror unit break-make
In the 5th switch module for controlling boot leg and the multiple current mirror unit break-make simultaneously.
The power input of first switch module and the power output end of boot leg connect, the power supply of first switch module
Output end with dock, the power input of second switch module is connected with the power output end of the second current mirror unit,
The power output end of two switch modules is connected with the first startup output port o1, the power input and the 4th of the 4th switch module
The power output end connection of current mirror unit, the power output end of the 4th switch module and the 3rd start output port o3 companies
Connect, first switch module, second switch module, the control terminal of the 3rd switch module and the 4th switch module are believed with the first control
Number port N_S connections.
The power input of 5th switch module is connected with dc source VDD, the power output end of the 5th switch module with
The Q points connection of boot leg, the control terminal of the 5th switch module are connected with the second control signal port S.
As shown in figure 5, the start-up circuit in the present invention includes PMOS PM11, PMOS PM12, PMOS PM13, PMOS
Pipe PM14, PMOS PM15, PMOS PM16, resistance R3 and switching tube PM20.PMOS PM11 breadth length ratio is PMOS
N times of PM12, PMOS PM13 and PMOS PM14 breadth length ratio.
PMOS PM12, PMOS PM13 and PMOS PM14 form three current mirrors with PMOS PM11 respectively, respectively
The current mirror flowed through on PMOS PM11 to first is started into output port o1, the second startup output port o2 and the 3rd starts
Output port o3 is exported so that port x, port Z and the DC supply input terminal voltage Vd of band-gap reference circuit deviate zero current shape
State.Branch roads of the PMOS PM15 by the 4th current feedback interface o4 by the current mirror flowed through in current circuit to resistance R3
On, while the voltage on resistance R3 is that M point voltages gradually increase, three current mirrors gradually to completely closing, open by shut-off
Dynamic circuit is stopped.
PMOS PM11, PMOS PM12, PMOS PM13, PMOS PM14, PMOS PM15 and PMOS PM16
Source electrode is connected with dc source VDD.PMOS PM11, PMOS PM12, PMOS PM13 and PMOS PM14 grid, with
And PMOS PM11, PMOS PM15 and PMOS PM16 drain electrode, it is connected by resistance R3 with switching tube PM20 source electrode.
PMOS PM15 grid is connected with the 4th current feedback interface o4.PMOS PM12 drain electrode starts defeated with first
Exit port o1 connections, PMOS PM13 drain electrode are connected with the second startup output port o2, PMOS PM14 drain electrode and the 3rd
Start output port o3 connections, PMOS PM16 grid is connected with the 5th control input port S, switching tube PM20 drain electrode and
Ground is docked, and switching tube PM20 grid is connected with the 6th control input port N_S.
The control signal that described the 5th control input port S and the 6th control input port N_S is inputted is on the contrary, work as
When 5th control input port S exports high level signal, the 6th control input port N_S output low level signals, when the 5th control
During input port S outputs low level signal processed, the 6th control input port N_S output high level signals.
Described start-up circuit can also set up switching tube PM19, and switching tube PM19 source electrode connects with switching tube PM14 drain electrode
Connect, switching tube PM19 drain electrode is connected with the 3rd startup output port o3, and switching tube PM9 grid and the second control signal input
Interface N_S connections.
Described start-up circuit can also set up switching tube PM18, and switching tube PM18 source electrode connects with switching tube PM13 drain electrode
Connect, switching tube PM18 drain electrode is connected with the second startup output port o2, and switching tube PM8 grid and the second control signal input
Interface N_S connections.
Described start-up circuit can also set up switching tube PM17, and switching tube PM17 source electrode connects with switching tube PM12 drain electrode
Connect, switching tube PM17 drain electrode is connected with the first startup output port o1, and switching tube PM17 grid and the second control signal are defeated
Incoming interface N_S connections.
(4) feedback circuit
Feedback circuit in the present invention includes second switch unit and the 5th current mirror unit, the 5th current mirror unit
Current input terminal be connected with dc source VDD, the first feedback input end of the 5th current mirror unit and the electricity of current circuit
Flow feedback end connection, the port Z connections of the second feedback input end and band-gap reference circuit of the 5th current mirror unit, the 5th electricity
The output end of traffic mirroring unit is connected with the input of second switch unit, the control terminal of second switch unit and start-up circuit
First start output port o1 connections, the output end of second switch unit with dock.
As shown in fig. 6, described second switch unit includes switching tube NM3, switching tube NM4, switching tube NM5, switching tube
NM6, switching tube NM7 and switching tube NM8, the 5th current mirror unit include PMOS PM7, PMOS PM8, PMOS PM9,
PMOS PM10 and PMOS PM21.PMOS PM5 breadth length ratio is N times of PMOS PM9 breadth length ratio, PMOS PM6's
Breadth length ratio is N times of PMOS PM10 breadth length ratio.
The port Z connections of PMOS PM21 grid and band-gap reference circuit, PMOS PM21 source electrode and start-up circuit
The 3rd start output port o3 connections, PMOS PM21 drain electrode and switching tube NM3 drain electrode, switching tube NM4 grid, open
The grid for closing pipe NM5 connects with switching tube NM8 grid.
Switching tube NM3 source electrode is connected with switching tube NM4 drain electrode, switching tube NM3, switching tube NM6 and switching tube NM7's
Grid is connected with the first startup output port o1 of start-up circuit, and switching tube NM6 drain electrode connects with PMOS PM8 drain electrode
Connect, the current feedback terminal of switching tube NM7 drain electrode, the grid of PMOS PM10 drain electrode and PMOS PM9 and current circuit
Port A is connected with the current feedback port o4 of start-up circuit, and switching tube NM7 source electrode is connected with switching tube NM8 drain electrode, switch
Pipe NM8, switching tube NM6, switching tube NM5 and switching tube NM4 source electrode dock with ground.
Port B of PMOS PM10, PMOS PM8 and PMOS the PM7 grid with the current feedback terminal of current circuit
Connection, PMOS PM10 source electrode are connected with PMOS PM9 drain electrode, PMOS PM9, PMOS PM8 and PMOS PM7 source
Extremely it is connected with dc source VDD.
(5) integrated circuit
As shown in fig. 7, Fig. 7 is the integrated circuit figure of band-gap reference circuit.
When band-gap reference circuit is in zero current condition, the voltage of X, Y node is zero in band-gap reference circuit；Electric current
In circuit, there is no electric current to pass through above the Cascade current sources that PMOS PM5 and PMOS PM6 are formed.
It is low level state now to set the 6th control input port N_S, and the 5th control input port S is high level shape
State, in start-up circuit, switching tube PM20 conductings, switching tube PM16 shut-offs, PMOS PM11~PM14, switching tube PM17~PM19
Open, first starts output port o1, the second startup output port o2 and the 3rd starts output port o3 output starting currents, compels
Make the voltage deviation nought state of two nodes of X and Y in band-gap reference circuit, the 3rd starts output port o3 output starting current generations
Injected for the Cascade current sources that PMOS PM5 in current circuit and PMOS PM6 is formed to the C nodes of band-gap reference circuit
Electric current, now band-gap reference circuit start-up operation.
And cause there is electric current by with band on PMOS PM5, PMOS PM6 and PMOS PM15 using mirror
The normal work of gap reference circuit, the electric current flowed through on PMOS PM5, PMOS PM6 and PMOS PM15 gradually increase, now
Pressure drop on resistance R3 and switching tube PM20 increases, i.e., M node voltages increase so that PMOS PM12~PM14 is to off state
Transfer, now first starts the startup that output port o1, the second startup output port o2 and the 3rd startup output port o3 are exported
Electric current is gradually reduced.After band-gap reference circuit normal work, PMOS PM12~PM14 shut-offs, while by control signal N_S
High level is arranged to, control signal S is arranged to low level so that PMOS PM15 and current feedback port o4 disconnects, now
Start-up circuit is fully disconnected with band-gap reference circuit.
(6) experiment simulation
As shown in figure 8, Fig. 8 is traditional structure figure compared with the PSRR simulation result of structure of the present invention.In figure
PSRR1 is the PSRR of traditional structure, and PSRR2 is the PSRR of structure of the present invention.
As shown in Figure 8, when frequency is when between 100~104, PSRR1 is approximately equal to -17.5dB, and PSRR2 is approximately equal to -
77.5dB, the PSRR PSRR of band-gap reference circuit proposed by the invention yield value are much smaller than the power supply of traditional structure
The yield value of rejection ratio.Immediately frequency be 104~107 between when, PSRR2 growth trend is larger, but PSRR2 also much smaller than
PSRR1.Therefore, the present invention can effectively reduce supply voltage VDD to reference voltage V REF small-signal gain, enhancing power supply suppression
Ratio processed.
Claims (6)
- A kind of 1. band-gap reference circuit with high PSRR characteristic and self-start circuit, it is characterised in that：It includes band Gap reference circuit, current circuit, feedback circuit and start-up circuit；Described current circuit is used to increase the resistance between dc source VDD and the DC input of band gap reference core circuit Value, interference of the dc source VDD to the DC supply input terminal voltage Vd of band-gap reference circuit is reduced, so as to strengthen PSRR And circuit stability；When band-gap reference circuit is in zero current condition, start-up circuit is started working, and band-gap reference circuit is deviateed zero current State, at the same band-gap reference circuit by feedback circuit by its status information feedback to start-up circuit, when band-gap reference circuit just Often during work, start-up circuit is stopped；The current input terminal of current circuit, feedback circuit and start-up circuit is connected with dc source VDD, and the electric current of current circuit is anti- The first feedback input end for presenting end and feedback circuit connects, and the feedback output end of feedback circuit and the 4th electric current of start-up circuit are anti- Present port o4 connections；The 3rd of start-up circuit starts direct current of the current output terminal of output port o3 and current circuit with band-gap reference circuit Electrical input is port C connections, and the second of start-up circuit starts the port x connection of output port o2 and band-gap reference circuit, opens The first of dynamic circuit starts output port o1 and the startup control terminal of feedback circuit connects, the port Z of band-gap reference circuit with it is anti- The second feedback input end connection of current feed circuit；Described band-gap reference circuit includes band gap reference core circuit, band gap reference core circuit include operational amplifier OP1, PMOS PM1, PMOS PM2, triode PNP1, triode PNP2 and resistance R1；The drain electrode of operational amplifier OP1 inverting input and PMOS PM1 is connected with port x, triode PNP1 emitter stage Also it is connected by resistance R1 with the port x of band-gap reference circuit, triode PNP1 colelctor electrode and base stage dock with ground, PMOS Pipe PM1 source electrode and PMOS PM2 source electrode are connected with the DC input of band-gap reference circuit；The drain electrode of operational amplifier OP1 in-phase input end, PMOS PM2 and triode PNP2 emitter stage are and band-gap reference The port Y connections of circuit, triode PNP2 colelctor electrode and base stage dock with ground；The grid of operational amplifier OP1 output end, PMOS PM1 grid and PMOS PM2 with band-gap reference circuit Port Z connections；Described feedback circuit includes second switch unit and the 5th current mirror unit, and the electric current of the 5th current mirror unit is defeated Enter end to be connected with dc source VDD, the first feedback input end of the 5th current mirror unit and the current feedback terminal of current circuit Connection, the port Z connections of the second feedback input end and band-gap reference circuit of the 5th current mirror unit, the 5th current mirror list The output end of member is connected with the input of second switch unit, and the control terminal of second switch unit and the first of start-up circuit starts Output port o1 connections, the output end of second switch unit with dock.
- 2. a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit according to claim 1, It is characterized in that：Described band-gap reference circuit also includes reference voltage generating circuit, and reference voltage generating circuit includes PMOS Pipe PM3, triode PNP3 and resistance R2；PMOS PM3 source electrode and the DC input of band-gap reference circuit connect, PMOS PM3 drain electrode and reference voltage VREFOutput end is connected, and PMOS PM3 drain electrode is also connected by resistance R2 with triode PNP3 emitter stage, PMOS PM3's The port Z connections of grid and band-gap reference circuit, triode PNP3 colelctor electrode and base stage dock with ground.
- 3. a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit according to claim 1, It is characterized in that：Described band-gap reference circuit also includes leakage path, and leakage path causes band gap reference core circuit port Y Output voltage will not change with the change of external condition；Described leakage path includes PMOS PM4 and NMOS tube NM1；PMOS PM4 source electrode and band-gap reference circuit it is straight Electrical input connection is flowed, the drain electrode with NMOS tube NM1, grid are connected respectively for PMOS PM4 drain electrode, PMOS PM4 grid Be connected with the port Y of band-gap reference circuit, NMOS tube NM1 source electrode with dock.
- 4. a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit according to claim 1, It is characterized in that：Described band-gap reference circuit also includes anti-jamming circuit, and anti-jamming circuit is used to reduce due to dc source VDD fluctuation and the interference brought, reduce and disturbed caused by each branch current of band-gap reference circuit, improve band-gap reference circuit PSRR；Described anti-jamming circuit includes capacity cell, and one end of capacity cell and the DC input of band-gap reference circuit connect Connect, the other end of capacity cell with dock.
- 5. a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit according to claim 4, It is characterized in that：Described current circuit includes the current source by PMOS PM5 and PMOS PM6 the Cascade structures formed I1；PMOS PM5 source electrode and the input of current circuit connect, and PMOS PM5 drain electrode connects with PMOS PM6 source electrode Connect, the port A and port B of PMOS PM5 grid and PMOS PM6 grid respectively with the current feedback terminal of current circuit connect Connect, PMOS PM6 drain electrode and the output end of current circuit connect.
- 6. a kind of band-gap reference circuit with high PSRR characteristic and self-start circuit according to claim 1, It is characterized in that：Described start-up circuit includes boot leg, the first current mirror unit, the second current mirror unit, the 3rd Current mirror unit and the 4th current mirror unit, boot leg, the first current mirror unit, the second current mirror unit, The power input of three current mirror units and the 4th current mirror unit is connected with dc source VDD, the mirror image of boot leg Image current input of the current output terminal respectively with the first current mirror unit and the second current mirror unit is connected, and starts branch The image current input on road is connected with the power output end of the 3rd current mirror unit, the image current output end of boot leg Be connected to M points with its image current input, the power output end of boot leg with dock, the electricity of the first current mirror unit Source output terminal is connected with the first startup output port o1, and the power output end of the second current mirror unit and second starts output end Mouth o2 connections, the image current input of the 3rd current mirror unit are connected with current feedback port o4, the 4th current mirror list The power output end of member is connected with the 3rd startup output port o3, and the image current input of the 4th current mirror unit is with starting The image current output end connection of branch road；After electricity is started working in boot leg, the first current mirror unit starts output port o1 by boot leg by first On current mirror export startup control terminal to feedback circuit, feedback circuit is normally started；Current mirror in boot leg is exported and gives band gap base by the second current mirror unit by the second startup output port o2 The port x of quasi- circuit, the 4th current mirror unit are defeated by the current mirror in boot leg by the 3rd startup output port o3 Go out the port C to band-gap reference circuit, band-gap reference circuit is deviateed zero current starting state by two-way starting current；The feedback current that 3rd current mirror unit is exported by the output end of current feedback port o4 reception feedback circuits, the Three current mirror units feed back to the current mirror on current circuit in boot leg so that the voltage of Q points in boot leg Gradually cut-off is up to completely closing for gradually increase, the first current mirror unit and the second current mirror unit, now, start-up circuit Stop output starting current.
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| CN107967020B (en) * | 2017-12-29 | 2023-07-07 | 上海智浦欣微电子有限公司 | Low-voltage reference source circuit |
| CN109343631A (en) * | 2018-09-13 | 2019-02-15 | 杭州旗捷科技有限公司 | Start-up circuit, core circuit, consumable chip, consumptive material, the starting method of band-gap reference circuit, the working method of core circuit |
| CN112698680B (en) * | 2020-12-29 | 2022-02-11 | 卓捷创芯科技（深圳）有限公司 | Mixed signal control circuit for eliminating degeneracy metastable state of band gap reference circuit |
| CN115016588B (en) * | 2022-07-22 | 2023-10-10 | 南京英锐创电子科技有限公司 | Start-up circuit and start-up method for band gap reference circuit |
| CN117008676B (en) * | 2023-08-17 | 2024-05-31 | 荣湃半导体（上海）有限公司 | Self-starting circuit for band-gap reference circuit |
| CN118041330B (en) * | 2024-04-15 | 2024-07-02 | 上海芯炽科技集团有限公司 | Band gap-based power-on reset circuit |
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Address after: 610041 floor 4, block A, 1 building 200, Tianfu five street, hi tech Zone, Chengdu, Sichuan. Patentee after: Chengdu Rui core micro Polytron Technologies Inc Address before: 610000 1705, 17, 1, 1800, Yizhou Avenue, high tech Zone, Chengdu, Sichuan Patentee before: Chengdu Ruicheng Xinwei Technology Co., Ltd. |
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Denomination of invention: Band-gap reference circuit with high power supply rejection ratio characteristic and automatic starting circuit Effective date of registration: 20190311 Granted publication date: 20180119 Pledgee: Agricultural Bank of China Limited by Share Ltd Chengdu Shuangliu Branch Pledgor: Chengdu Rui core micro Polytron Technologies Inc Registration number: 2019510000025 |
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Date of cancellation: 20210226 Granted publication date: 20180119 Pledgee: Agricultural Bank of China Limited by Share Ltd. Chengdu Shuangliu Branch Pledgor: CHENGDU ANALOG CIRCUIT TECHNOLOGY Inc. Registration number: 2019510000025 |