CN106098863A - A kind of preparation method of high pressure light-emitting diode chip - Google Patents
A kind of preparation method of high pressure light-emitting diode chip Download PDFInfo
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- CN106098863A CN106098863A CN201610455109.3A CN201610455109A CN106098863A CN 106098863 A CN106098863 A CN 106098863A CN 201610455109 A CN201610455109 A CN 201610455109A CN 106098863 A CN106098863 A CN 106098863A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000005520 cutting process Methods 0.000 claims abstract description 29
- 238000009413 insulation Methods 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 18
- 230000004888 barrier function Effects 0.000 claims abstract description 11
- 238000002955 isolation Methods 0.000 claims abstract description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 abstract description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
Abstract
The invention discloses the preparation method of a kind of high pressure light-emitting diode chip, belong to semiconductor technology neck field.Described preparation method includes: forms n type semiconductor layer, mqw light emitting layer, p type semiconductor layer and transparency conducting layer on substrate, and offers the groove extending to n type semiconductor layer；Offer the isolation channel extending to substrate from n type semiconductor layer, between partial high pressure LED chip, offer the Cutting Road extending to substrate from n type semiconductor layer；Insulating barrier is laid in isolation channel；Form metal level on the insulating layer, and N electrode and P electrode are set；The high voltage LED chip of electric insulation is tested；When test result meets the requirements, thinning substrate, use laser to offer the Cutting Road extending to substrate from n type semiconductor layer between all high voltage LED chip, and along Cutting Road cutting substrate, obtain separate high voltage LED chip.The present invention can meet the production requirement of undersized high voltage LED chip.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly to the preparation method of a kind of high pressure light-emitting diode chip.
Background technology
Light emitting diode (Light Emitting Diode is called for short LED) is that electric energy can be efficiently converted into light by one
The semiconductor device of energy, is the green light source of the most most one of prospect, has been widely used for the fields such as illumination and backlight.With
The maturation of LED manufacture technology in the last few years, its range of application is more extensive, and the LED chip of its mesohigh series is exactly
One important range of application.Different from conventional illumination chip, high voltage LED chip is become by multiple low-power LED serial or parallel connections
The light-emitting diode chip for backlight unit of an integrated form, there is high-antistatic ability, high-luminous-efficiency and saving encapsulation factory routing cost
Etc. advantage, gradually manifest in the status of chip field.
The preparation method of existing high voltage LED chip includes: on substrate, growth forms n type semiconductor layer, quantum successively
Trap luminescent layer, p type semiconductor layer and transparency conducting layer, and offer the groove extending to n type semiconductor layer；At N-type semiconductor
Offer isolation channel and the Cutting Road extending to substrate on layer, and in isolation channel, lay insulating barrier, obtain many sub-chips；Absolutely
Form the metal level connecting adjacent sub-chip in edge layer, and N electrode is set on n type semiconductor layer, p type semiconductor layer sets
Put P electrode, obtain high voltage LED chip；All high voltage LED chip are tested, obtains test result；When test result meets
During requirement, thinning substrate along Cutting Road cutting substrate, obtain separate high voltage LED chip.
During realizing the present invention, inventor finds that prior art at least there is problems in that
Cutting Road is to use lithographic technique to be formed, owing to using the width of the Cutting Road of lithographic technique formation to have certain
Fluctuation range, the developed width of the Cutting Road therefore formed is generally big than desired width.In the case of the width of substrate is constant,
The area of effective light-emitting zone of high voltage LED chip reduces, and the chip generation amount of single substrate reduces, it is impossible to meet undersized
The production requirement of high voltage LED chip.
Summary of the invention
In order to solve the problem that prior art cannot meet the production requirement of undersized high voltage LED chip, the present invention is real
Execute example and provide the preparation method of a kind of high pressure light-emitting diode chip.Described technical scheme is as follows:
Embodiments providing the preparation method of a kind of high pressure light-emitting diode chip, described preparation method includes:
On substrate, growth forms n type semiconductor layer, mqw light emitting layer, p type semiconductor layer and electrically conducting transparent successively
Layer, and offer the groove extending to described n type semiconductor layer；
Offer between each sub-chip of all high voltage LED chip and extend to described substrate from described n type semiconductor layer
Isolation channel, between the described high voltage LED chip of part, offer the cutting extending to described substrate from described n type semiconductor layer
Road, the described high voltage LED chip of forming part electric insulation；
Insulating barrier is laid in described isolation channel；
Described insulating barrier is formed the metal level connecting the adjacent described sub-chip of same described high voltage LED chip,
And N electrode is set on described n type semiconductor layer, described p type semiconductor layer arranges P electrode；
The described high voltage LED chip of electric insulation is tested, obtains test result；
When described test result meets the requirements, thinning described substrate, use laser all described high voltage LED chip it
Between offer the Cutting Road extending to described substrate from described n type semiconductor layer, and cut described substrate along described Cutting Road, obtain
Separate described high voltage LED chip.
Alternatively, the described high voltage LED chip of each electric insulation is array arrangement.
Preferably, the spacing of the described high voltage LED chip of the electric insulation of adjacent rows is identical, the electric insulation of adjacent two row
The spacing of described high voltage LED chip is identical.
Alternatively, described high voltage LED chip includes sub-chip described at least two that forms a line.
Preferably, the voltage of each described sub-chip is setting value.
It is highly preferred that the quantity of described sub-chip that includes of described high voltage LED chip is equal to the electricity of described high voltage LED chip
The ratio of the voltage of pressure and described sub-chip.
Preferably, each described sub-chip-in series or parallel connection of same described high voltage LED chip.
Specifically, when each sub-chip-in series of same described high voltage LED chip, two adjacent described sub-chips
In, the described transparency conducting layer of the described n type semiconductor layer of a described sub-chip chip with another described is by described
Metal level electrically connects.
Specifically, when each sub-chip parallel connection of same described high voltage LED chip, two adjacent described sub-chips
In, the described n type semiconductor layer of the described n type semiconductor layer of a described sub-chip chip with another described is by described
Metal level electrically connects, and the described electrically conducting transparent of the described transparency conducting layer of a described sub-chip and another described sub-chip
Layer is electrically connected by described metal level.
Alternatively, described preparation method also includes:
When described test result is undesirable, remove described transparency conducting layer, described insulating barrier and described metal
Layer；
The most again high voltage LED chip is prepared.
The technical scheme that the embodiment of the present invention provides has the benefit that
Extend to the Cutting Road of substrate from n type semiconductor layer by using laser to offer between all high voltage LED chip,
Utilize laser that the Cutting Road of desired width can be precisely formed, it is to avoid to reduce high pressure owing to the developed width of Cutting Road fluctuates
The area of effective light-emitting zone of LED chip, improves the chip generation amount of single substrate, can meet undersized high-voltage LED
The production requirement of chip.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, in embodiment being described below required for make
Accompanying drawing be briefly described, it should be apparent that, below describe in accompanying drawing be only some embodiments of the present invention, for
From the point of view of those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other according to these accompanying drawings
Accompanying drawing.
Fig. 1 is the flow chart of the preparation method of a kind of high voltage LED chip that the embodiment of the present invention provides；
Fig. 2 a is the front view of the high voltage LED chip structure that the embodiment of the present invention provides；
Fig. 2 b is the top view of the high voltage LED chip structure that the embodiment of the present invention provides；
Fig. 3 be the embodiment of the present invention provide the high voltage LED chip of an electric insulation and the structure of adjacent LED chip show
It is intended to.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment
Embodiments providing the preparation method of a kind of high-voltage LED LED chip, see Fig. 1, this is prepared
Method includes:
Step 101: on substrate successively growth formed n type semiconductor layer, mqw light emitting layer, p type semiconductor layer and
Transparency conducting layer, and offer the groove extending to n type semiconductor layer.
Step 102: offer between each sub-chip of all high voltage LED chip and extend to substrate from n type semiconductor layer
Isolation channel, between partial high pressure LED chip, offer the Cutting Road extending to substrate from n type semiconductor layer, forming part electricity
The high voltage LED chip of insulation.
Alternatively, the high voltage LED chip of each electric insulation can arrange in array.
Preferably, the spacing of the high voltage LED chip of the electric insulation of adjacent rows can be identical, the electric insulation of adjacent two row
The spacing of high voltage LED chip can be identical.
Alternatively, high voltage LED chip can include the sub-chip of at least two formed a line.
Preferably, the voltage of each sub-chip can be setting value, such as 3V.
Further, the quantity of the sub-chip that high voltage LED chip includes can be equal to the voltage of high voltage LED chip and sub-core
The ratio of the voltage of sheet.
Preferably, each sub-chip of same high voltage LED chip can be with serial or parallel connection.
Specifically, when each sub-chip-in series of same high voltage LED chip, in two adjacent sub-chips, one
The n type semiconductor layer of sub-chip is electrically connected by metal level with the transparency conducting layer of another sub-chip.
Specifically, when each sub-chip parallel connection of same high voltage LED chip, in two adjacent sub-chips, one
The n type semiconductor layer of sub-chip is electrically connected by metal level with the n type semiconductor layer of another sub-chip, and a sub-chip
Transparency conducting layer is electrically connected by metal level with the transparency conducting layer of another sub-chip.
Step 103: lay insulating barrier in isolation channel.
Step 104: form the metal level connecting the adjacent sub-chip of same high voltage LED chip on the insulating layer, and at N
N electrode is set in type semiconductor layer, p type semiconductor layer arranges P electrode.
Step 105: the high voltage LED chip of electric insulation is tested, obtains test result.When test result meets the requirements
Time, perform step 106；When test result is undesirable, perform step 107.
Step 106: thinning substrate, uses laser to offer between all high voltage LED chip and extends to from n type semiconductor layer
The Cutting Road of substrate, and along Cutting Road cutting substrate, obtain separate high voltage LED chip.
Step 107: remove transparency conducting layer, insulating barrier and the metal level on substrate, and again prepare height on substrate
Pressure LED chip.
Fig. 2 a and Fig. 2 b is as a example by the high voltage LED chip that three sub-chip 100 series connection are formed, and 11 is substrate, and 12 is N-type half
Conductor layer, 13 is mqw light emitting layer, and 14 is p type semiconductor layer, and 15 is transparency conducting layer, and 16 is insulating barrier, and 17 is P electrode,
18 is N electrode, and 19 is metal level, and 21 is isolation channel.
Fig. 3 is as a example by the high voltage LED chip of an electric insulation, and 21 is isolation channel, and 22 is Cutting Road, and 100 is sub-chip,
200 is the high voltage LED chip of electric insulation, and 300 is the high voltage LED chip not forming Cutting Road between adjacent high voltage LED chip.
The embodiment of the present invention extends to from n type semiconductor layer by using laser to offer between all high voltage LED chip
The Cutting Road of substrate, utilizes laser that the Cutting Road of desired width can be precisely formed, it is to avoid due to the developed width ripple of Cutting Road
Move and reduce the area of effective light-emitting zone of high voltage LED chip, improve the chip generation amount of single substrate, little chi can be met
The production requirement of very little high voltage LED chip.And before thinning substrate, offer between partial high pressure LED chip from N-type half
Conductor layer extends to the Cutting Road of substrate, the high voltage LED chip of forming part electric insulation, and the high voltage LED chip to electric insulation
Test, substrate can be recycled when test result is undesirable.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (10)
1. the preparation method of a high-voltage LED LED chip, it is characterised in that described preparation method includes:
On substrate, growth forms n type semiconductor layer, mqw light emitting layer, p type semiconductor layer and transparency conducting layer successively,
And offer the groove extending to described n type semiconductor layer；
Offer between each sub-chip of all high voltage LED chip from described n type semiconductor layer extend to described substrate every
From groove, between the described high voltage LED chip of part, offer the Cutting Road extending to described substrate from described n type semiconductor layer, shape
Become the described high voltage LED chip of part electric insulation；
Insulating barrier is laid in described isolation channel；
The metal level of the described sub-chip that the same described high voltage LED chip of formation connection is adjacent on described insulating barrier, and
On described n type semiconductor layer, N electrode is set, described p type semiconductor layer arranges P electrode；
The described high voltage LED chip of electric insulation is tested, obtains test result；
When described test result meets the requirements, thinning described substrate, use laser to open between all described high voltage LED chip
If extend to the Cutting Road of described substrate from described n type semiconductor layer, and cut described substrate along described Cutting Road, obtain mutually
Independent described high voltage LED chip.
Preparation method the most according to claim 1, it is characterised in that the described high voltage LED chip of each electric insulation is battle array
Row arrangement.
Preparation method the most according to claim 2, it is characterised in that the described high-voltage LED core of the electric insulation of adjacent rows
The spacing of sheet is identical, and the spacing of the described high voltage LED chip of the electric insulation of adjacent two row is identical.
4. according to the preparation method described in any one of claim 1-3, it is characterised in that described high voltage LED chip includes lining up
Sub-chip described at least two of string.
Preparation method the most according to claim 4, it is characterised in that the voltage of each described sub-chip is setting value.
Preparation method the most according to claim 5, it is characterised in that the described sub-chip that described high voltage LED chip includes
Quantity equal to the ratio of the voltage of voltage and the described sub-chip of described high voltage LED chip.
Preparation method the most according to claim 4, it is characterised in that described in each of same described high voltage LED chip
Sub-chip-in series or parallel connection.
Preparation method the most according to claim 7, it is characterised in that when each height of same described high voltage LED chip
During chip-in series, in two adjacent described sub-chips, the described n type semiconductor layer of a described sub-chip with another described in
The described transparency conducting layer of sub-chip is electrically connected by described metal level.
Preparation method the most according to claim 7, it is characterised in that when each height of same described high voltage LED chip
During chip parallel connection, in two adjacent described sub-chips, the described n type semiconductor layer of a described sub-chip with another described in
The described n type semiconductor layer of sub-chip is electrically connected by described metal level, and the described transparency conducting layer of a described sub-chip
The described transparency conducting layer of chip with another described is electrically connected by described metal level.
10. according to the preparation method described in any one of claim 1-3, it is characterised in that described preparation method also includes:
When described test result is undesirable, remove described transparency conducting layer, described insulating barrier and described metal level；
The most again high voltage LED chip is prepared.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610455109.3A CN106098863A (en) | 2016-06-22 | 2016-06-22 | A kind of preparation method of high pressure light-emitting diode chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610455109.3A CN106098863A (en) | 2016-06-22 | 2016-06-22 | A kind of preparation method of high pressure light-emitting diode chip |
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| CN106098863A true CN106098863A (en) | 2016-11-09 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102368516A (en) * | 2011-10-10 | 2012-03-07 | 映瑞光电科技(上海)有限公司 | High-voltage LED device and manufacturing method thereof |
| CN103022334A (en) * | 2012-12-21 | 2013-04-03 | 映瑞光电科技(上海)有限公司 | High-voltage inverted LED chip and manufacturing method thereof |
| CN103236474A (en) * | 2013-04-09 | 2013-08-07 | 中国科学院半导体研究所 | Method for manufacturing optionally cut high-voltage LED devices |
| CN103258836A (en) * | 2012-02-17 | 2013-08-21 | 华新丽华股份有限公司 | High-voltage light-emitting diode chip and manufacturing method thereof |
| CN103762222A (en) * | 2014-01-24 | 2014-04-30 | 中国科学院半导体研究所 | Modularized array high-voltage LED chip and method for manufacturing modularized array high-voltage LED chip |
-
2016
- 2016-06-22 CN CN201610455109.3A patent/CN106098863A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102368516A (en) * | 2011-10-10 | 2012-03-07 | 映瑞光电科技(上海)有限公司 | High-voltage LED device and manufacturing method thereof |
| CN103258836A (en) * | 2012-02-17 | 2013-08-21 | 华新丽华股份有限公司 | High-voltage light-emitting diode chip and manufacturing method thereof |
| CN103022334A (en) * | 2012-12-21 | 2013-04-03 | 映瑞光电科技(上海)有限公司 | High-voltage inverted LED chip and manufacturing method thereof |
| CN103236474A (en) * | 2013-04-09 | 2013-08-07 | 中国科学院半导体研究所 | Method for manufacturing optionally cut high-voltage LED devices |
| CN103762222A (en) * | 2014-01-24 | 2014-04-30 | 中国科学院半导体研究所 | Modularized array high-voltage LED chip and method for manufacturing modularized array high-voltage LED chip |
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Application publication date: 20161109 |