CN106094955A - A kind of low-dropout linear voltage-regulating circuit of low-power consumption - Google Patents
A kind of low-dropout linear voltage-regulating circuit of low-power consumption Download PDFInfo
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- CN106094955A CN106094955A CN201610568623.8A CN201610568623A CN106094955A CN 106094955 A CN106094955 A CN 106094955A CN 201610568623 A CN201610568623 A CN 201610568623A CN 106094955 A CN106094955 A CN 106094955A
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- 230000005611 electricity Effects 0.000 claims description 7
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- 239000000758 substrate Substances 0.000 claims description 6
- 230000001052 transient effect Effects 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 abstract description 4
- 239000003990 capacitor Substances 0.000 description 4
- 230000001105 regulatory effect Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
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- 238000012423 maintenance Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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Abstract
The present invention relates to electronic technology field, low-dropout linear voltage-regulating circuit particularly to a kind of low-power consumption, foregoing circuit is by core circuit, frequency compensated circuit and feedback circuit composition, core circuit is by operational amplifier A MP, first p-type field effect transistor PM1, first resistance R1 and the second resistance R2 composition, frequency compensated circuit is by the 4th p-type field effect transistor PM4, 3rd resistance R3 and the first electric capacity C1 composition, feedback circuit is by the second p-type field effect transistor PM2, 3rd p-type field effect transistor PM3, first N-type field effect transistor NM1, second N-type field effect transistor NM2 and the 3rd N-type field effect transistor NM3 composition, present configuration is simple, achieve fast transient response, and ensure that the stability of circuit when changing in a big way at load current.
Description
Technical field
The present invention relates to electronic technology field, particularly to the low-dropout linear voltage-regulating circuit of a kind of low-power consumption.
Background technology
In super large-scale integration or SOC(SOC(system on a chip)) in, the most all can use LDO (Low Dropout Voltage
Regulator: low pressure difference linear voltage regulator) provide regulated power supply for chip, LDO can use off-chip filter capacitor or without electricity
The LDO of appearance type, uses the LDO of off-chip filter capacitor, can increase the pin of chip, too increases the application cost of chip, without electricity
The LDO of appearance type has lacked the bulky capacitor that outfan is in parallel on circuit structure, has the most also lacked an important charge storage device
With compensation electric capacity, when load current is bigger, the fluctuation of load current can cause the change of output voltage, therefore the transient state of LDO is rung
Power and stability should be able to just become the difficult point in design.
Summary of the invention
It is an object of the invention to provide a kind of low-power consumption can the low voltage difference line without capacitor type of fast transient response
Property mu balanced circuit (being called for short mu balanced circuit below).
In order to achieve the above object, the invention provides following technical scheme, the low pressure difference linearity voltage stabilizing of a kind of low-power consumption
Circuit, comprising:
Core circuit, the first p-type field effect that described core circuit is connected with described operational amplifier output terminal by operational amplifier
The first resistance that Ying Guan is connected with the drain electrode of described first p-type field effect transistor and the second resistance being connected with described first resistance
Composition;
Frequency compensated circuit, described frequency compensated circuit is by the 4th p-type field effect transistor and the leakage of described 4th p-type field effect transistor
Pole connect the 3rd resistance and is connected with described 3rd resistance first electric capacity form;
Feedback circuit, described feedback circuit by the second p-type field effect transistor, the 3rd p-type field effect transistor, the first N-type field effect transistor,
Two N-type field effect transistor and the 3rd N-type field effect transistor composition, the drain electrode of described second p-type field effect transistor respectively with described first N-type
The grid of the drain and gate of field effect transistor, the grid of the second N-type field effect transistor and the 3rd N-type field effect transistor connects, and described the
The drain electrode of two N-type field effect transistor is connected with the drain electrode of described 3rd p-type field effect transistor, and described feedback circuit is by regulating described fortune
Calculate the operating current of amplifier so that described mu balanced circuit provides bigger when load current is bigger for described operational amplifier
Operating current, thus improve the transient state respective capabilities of described mu balanced circuit, described feedback circuit can also be by regulation described the
The size of three resistance comes zeroing position in unity gain bandwidth, it is ensured that described mu balanced circuit is at described load current
Stability when changing in a big way.
As the preferred version of the present invention, the outfan of described operational amplifier respectively with described first p-type field effect transistor
Grid, the grid of the second p-type field effect transistor and the first electric capacity one end connect, the source electrode of described first p-type field effect transistor and
The source electrode of the second p-type field effect transistor connects power supply jointly, the drain electrode of described first p-type field effect transistor, the one of described first resistance
The source electrode of end, the source electrode of described 4th p-type field effect transistor and described 3rd p-type field effect transistor connects circuit output end jointly, institute
State the drain electrode of the second p-type field effect transistor respectively with drain and gate, the second N-type field effect transistor of described first N-type field effect transistor
Grid and the 3rd N-type field effect transistor grid connect, the drain electrode of described 3rd p-type field effect transistor with described second N-type field effect
Should pipe drain electrode connect, the grid of described 3rd p-type field effect transistor is connected with the grid of described 4th p-type field effect transistor, described
The drain electrode of the 4th p-type field effect transistor is connected with one end of described 3rd resistance, the other end and described first of described 3rd resistance
The other end of electric capacity connects, the source electrode of described first N-type field effect transistor, the source electrode of the second N-type field effect transistor, the 3rd N-type field effect
Should the source electrode of pipe and one end common ground of described second resistance, the drain electrode of described 3rd N-type field effect transistor is put with described computing
The source electrode of big device connects, and provides extra current source, the other end of described first resistance and the second electricity for described operational amplifier
The other end of resistance connects the positive input terminal of described operational amplifier jointly, the negative input termination benchmark electricity of described operational amplifier
Pressure.
As the preferred version of the present invention, described first p-type field effect transistor is proportional to the size of the second p-type field effect transistor
Relation.
As the preferred version of the present invention, the value of described circuit output voltage is multiplied by described equal to the value of described reference voltage
First resistance and the sum of the second resistance, then divided by the result of value of described second resistance, i.e. with formula VOUT=VREF* (R1+
R2)/R2(formula 1) represent.
As the preferred version of the present invention, described operational amplifier by the 5th p-type field effect transistor, the 6th p-type field effect transistor,
4th N-type field effect transistor, the 5th N-type field effect transistor and the 6th N-type field effect transistor composition, the source of described 5th p-type field effect transistor
The source electrode of pole and the 6th p-type field effect transistor connects supply voltage, the grid of described 5th p-type field effect transistor and the 6th p-type jointly
The grid of field effect transistor is connected, and the source electrode of described 5th p-type field effect transistor is connected with grid and the most also imitates with described 4th N-type field
Should pipe drain electrode connect, the drain electrode of described 6th p-type field effect transistor is connected with the drain electrode of described 5th N-type field effect transistor and is total to
With forming outfan, the substrate of described 4th N-type field effect transistor and the substrate of described 5th N-type field effect transistor are connected to ground, institute
Stating the grid of the 4th N-type field effect transistor as positive input terminal, the grid of described 5th N-type field effect transistor is as negative input end, institute
The source electrode of the source electrode and described 5th N-type field effect transistor of stating the 4th N-type field effect transistor is connected described 6th N-type field effect transistor jointly
Drain electrode, the drain electrode of described 6th N-type field effect transistor is as the source electrode of described operational amplifier, described 6th N-type field effect transistor
Source ground, described 4th N-type field effect transistor and the 5th N-type field effect transistor composition Differential Input pole, described 5th p-type field effect
Should manage and the 6th p-type field effect transistor composition current mirror, described 6th N-type field effect transistor provides bias current.
Circuit operation principle of the present invention is as follows:
The electric current of described circuit output end output is obtained by described first p-type field effect transistor from power supply, therefore, works as load
When electric current changes, the electric current flowing through described first p-type field effect transistor also can occur to change accordingly, described second p-type field
Effect pipe is the sensing device of described first p-type field effect transistor, is used for sensing the change of described first p-type field effect transistor electric current,
The source class of the source class of described second p-type field effect transistor and the annexation of grid and described first p-type field effect transistor and grid
Annexation is identical, and described second p-type field effect transistor and the proportional relation of size of described first p-type field effect transistor, flows through
The faradic current of described second p-type field effect transistor is unsuitable excessive, in order to avoid increasing power consumption, but flows through described second p-type field effect transistor
Faradic current the most should be not too small, otherwise can be with the breadth length ratio of described second p-type field effect transistor Yu described first p-type field effect transistor
Do not become equal proportion relation, thus reduce faradic precision, described first N-type field effect transistor, the second N-type field effect transistor and
Three N-type field effect transistor composition current-mirror structure, the faradic current of described second p-type field effect transistor is imitated by described first N-type field
Described second N-type field effect transistor and described 3rd N-type field effect transistor, the drain electrode of described 3rd N-type field effect transistor should be supplied to by pipe
It is connected to the source class of described operational amplifier, with described 6th N-type field effect transistor jointly for described operational amplifier offer work
Electric current, the outfan of described operational amplifier connects with the grid of described first p-type field effect transistor and one end of the first electric capacity respectively
Connect, constitute the output capacitance that described operational amplifier is main, big by controlling the voltage of described first p-type fet gate
The little current value regulating output electric current, if described load current becomes big, faradic current also can become big, described operational amplifier
Operating current strain greatly mutually, the most described operational amplifier becomes strong, if at this moment to the driving force of described output capacitance
Described load current produces change, and described operational amplifier just quickly to described output capacitance discharge and recharge, thus can improve
The respond of described first p-type fet gate voltage, reaches to improve the merit of described mu balanced circuit transient response ability
Energy.
When described load current diminishes, the operating current of described operational amplifier diminishes, when described load current is zero,
The electric current of described 3rd N-type field effect transistor is also zero, and described operational amplifier is only by the biased electrical of described 6th N-type field effect transistor
Stream maintenance work, the quiescent dissipation of the low-dropout linear voltage-regulating circuit of described low-power consumption is only that described operational amplifier and flows through
Described first resistance and the electric current of the second resistance, reduce the size of bias current, and increase described first resistance and the second electricity
The resistance of resistance, can make described mu balanced circuit be operated in low power consumpting state when low-load.
Described mu balanced circuit uses general two-stage to amplify, and miller compensation structure, the described mu balanced circuit of this structure exists
When load current excursion is bigger, due to the change of zero pole point, the stability problem of system can be caused, the following detailed description of institute
How state mu balanced circuit is by sensing the curent change of described first p-type field effect transistor and regulating described 3rd resistance
Size, ensures in load current stability of system when changing in a big way, it is achieved principle as follows:
Described first electric capacity, the 3rd resistance and the 4th p-type field effect transistor composition miller compensation electricity in described frequency compensated circuit
Road, the described mu balanced circuit that two-stage is amplified, dominant pole, the frequency computing formula of zero point and the second limit is:
fp1=gm1/ (2 π C1) (formula 2)
fz=1/ [2 π (R3+Rp4) C1(formula 3)
fp2=gm1/(2ΠCL) (formula 4)
In formula 2-4, gm1 represents the mutual conductance of described first p-type field effect transistor, and C1 represents the capacitance of described first electric capacity, and R3 represents
The resistance of described 3rd resistance, Rp4 represents the resistance value of described 4th p-type field effect transistor, and CL represents load capacitance value, and Miller is mended
The effect repaid is that dominant pole is pushed to low frequency value, and by zero compensation the second limit, so in amplifier unit gain frequency, only
There are limit, i.e. a dominant pole, it is ensured that the stability of described mu balanced circuit.
When described load current becomes big, the electric current of described second N-type field effect transistor and the 3rd p-type field effect transistor increases,
Described 4th p-type field effect transistor electric current also can increase, and described 4th p-type field effect transistor is operated in linear zone, and described Rp4 diminishes,
And described gm1 increases with load current and increases, therefore the frequency values of fz and fp2 is big with time-varying, and zero point follows the second limit fortune
Dynamic, serve the effect compensating the second limit, it is ensured that the stability of described voltage-stabilizing circuit system loop, otherwise, when described negative
When load electric current diminishes, described Rp4 becomes big, and described gm1 reduces, and the frequency values of described fz and fp2 reduces simultaneously, in like manner serves steady
The effect of fixed described voltage-stabilizing circuit system loop.
Described operational amplifier and described first p-type field effect transistor constitute the two-stage structure for amplifying of described mu balanced circuit,
Described operational amplifier uses Differential Input Single-end output structure, simple in construction, and limit is few, the design facilitated compensating for and
Stablizing of system, loop gain about 70 ~ 80dB, if it is desired to described mu balanced circuit has higher loop gain, need according to reality
Asking, described operational amplifier can use sleeve amplifier or folded cascode configuration.
Compared with prior art, beneficial effects of the present invention:
By sensing the size of described first p-type field effect transistor electric current, described feedback circuit regulates the work of described operational amplifier
Improving the described mu balanced circuit transient response ability to large current load as size of current, described feedback circuit is by regulation institute
State the size of the 3rd resistance described in frequency compensated circuit to come zeroing position in unity gain bandwidth and ensure
Described voltage-stabilizing circuit system is in the described load current stability when changing in a big way.
Accompanying drawing explanation
Fig. 1 is circuit diagram of the present invention;
Fig. 2 is operation amplifier circuit figure of the present invention.
Detailed description of the invention
Below in conjunction with embodiment and detailed description of the invention, the present invention is described in further detail, but should this not understood
Scope for aforementioned body of the present invention is only limitted to below example, and all technology realized based on present invention belong to this
The scope of invention protection.
First embodiment
As it is shown in figure 1, the present embodiment circuit is made up of core circuit, frequency compensated circuit and feedback circuit, core circuit is by transporting
Calculating amplifier AMP, the first p-type field effect transistor PM1, the first resistance R1 and the second resistance R2 composition, frequency compensated circuit is by the 4th
P-type field effect transistor PM4, the 3rd resistance R3 and the first electric capacity C1 composition, feedback circuit is by the second p-type field effect transistor PM2, the 3rd P
Type field effect transistor PM3, the first N-type field effect transistor NM1, the second N-type field effect transistor NM2 and the 3rd N-type field effect transistor NM3 composition,
The outfan OUT of operational amplifier A MP respectively with grid, the grid of the second p-type field effect transistor PM2 of the first p-type field effect transistor PM1
One end of pole and the first electric capacity C1 connects, and the source electrode of the first p-type field effect transistor PM1 and the source electrode of the second p-type field effect transistor PM2 are altogether
With connecting power vd D, the drain electrode of the first p-type field effect transistor PM1, one end of the first resistance R1, the 4th p-type field effect transistor PM4
The source electrode of source electrode and the 3rd p-type field effect transistor PM3 connects circuit output end VOUT jointly, the drain electrode of the second p-type field effect transistor PM2
Respectively with drain and gate, the grid of the second N-type field effect transistor NM2 and the 3rd N-type field effect of the first N-type field effect transistor NM1
The grid of pipe NM3 connects, and the drain electrode of the 3rd p-type field effect transistor PM3 is connected with the drain electrode of the second N-type field effect transistor NM2, the 3rd P
The grid of the grid of type field effect transistor PM3 and the 4th p-type field effect transistor PM4 connects, the drain electrode of the 4th p-type field effect transistor PM4 with
One end of 3rd resistance R3 connects, and the other end of the 3rd resistance R3 and the other end of the first electric capacity C1 connect, the first N-type field effect
The source electrode of pipe NM1, the source electrode of the second N-type field effect transistor NM2, the source electrode of the 3rd N-type field effect transistor NM3 and the one of the second resistance R2
End common ground, the drain electrode of the 3rd N-type field effect transistor NM3 is connected with the source electrode ladd of operational amplifier A MP, for operational amplifier
AMP provides extra current source, the other end of the first resistance R1 and the other end common concatenation operation amplifier of the second resistance R2
The positive input terminal IN+ of AMP, the negative input end IN-of operational amplifier A MP connect reference voltage V REF.
As in figure 2 it is shown, operational amplifier A MP is by the 5th p-type field effect transistor PM5, the 6th p-type field effect transistor PM6, the 4th N
Type field effect transistor NM4, the 5th N-type field effect transistor NM5 and the 6th N-type field effect transistor NM6 composition, the 5th p-type field effect transistor PM5
The source electrode of source electrode and the 6th p-type field effect transistor PM6 connects supply voltage VDD jointly, the grid of the 5th p-type field effect transistor PM5 and
The grid of the 6th p-type field effect transistor PM6 be connected, the source electrode of the 5th p-type field effect transistor PM5 be connected with grid the most also with the 4th N
The drain electrode of type field effect transistor NM4 connects, the drain electrode of the 6th p-type field effect transistor PM6 and the drain electrode phase of the 5th N-type field effect transistor NM5
Connecting and collectively constitute outfan, the substrate of the 4th N-type field effect transistor NM4 and the substrate of the 5th N-type field effect transistor NM5 connect, the
The grid of four N-type field effect transistor NM4 as positive input terminal, the grid of the 5th N-type field effect transistor NM5 as negative input end, the 4th N
The source electrode of type field effect transistor NM4 and the source electrode of the 5th N-type field effect transistor NM5 connect the leakage of the 6th N-type field effect transistor NM6 jointly
Pole, the drain electrode of the 6th N-type field effect transistor NM6 is as the source electrode ladd of operational amplifier A MP, the source of the 6th N-type field effect transistor NM6
Pole ground connection.
In this enforcement arranges, the breadth length ratio of the first p-type field effect transistor PM1 and the second p-type field effect transistor PM2 is 200:1, i.e.
The electric current flowing through the second p-type field effect transistor PM2 is the 1/200 of the electric current flowing through the first p-type field effect transistor PM1, the ratio of this size
Example relation can change accordingly according to the excursion of load current, and operational amplifier A MP uses simple-stage differential amplifier,
In other embodiments, operational amplifier A MP can use sleeve amplifier or folded cascode configuration amplifier.
Claims (5)
1. a low-dropout linear voltage-regulating circuit for low-power consumption, comprising:
Core circuit, the first p-type field effect that described core circuit is connected with described operational amplifier output terminal by operational amplifier
The first resistance that Ying Guan is connected with the drain electrode of described first p-type field effect transistor and the second resistance being connected with described first resistance
Composition;
Frequency compensated circuit, described frequency compensated circuit is by the 4th p-type field effect transistor and the leakage of described 4th p-type field effect transistor
Pole connect the 3rd resistance and is connected with described 3rd resistance first electric capacity form;
Feedback circuit, described feedback circuit by the second p-type field effect transistor, the 3rd p-type field effect transistor, the first N-type field effect transistor,
Two N-type field effect transistor and the 3rd N-type field effect transistor composition, the drain electrode of described second p-type field effect transistor respectively with described first N-type
The grid of the drain and gate of field effect transistor, the grid of the second N-type field effect transistor and the 3rd N-type field effect transistor connects, and described the
The drain electrode of two N-type field effect transistor is connected with the drain electrode of described 3rd p-type field effect transistor.
The low-dropout linear voltage-regulating circuit of low-power consumption the most according to claim 1, it is characterised in that: described operational amplifier
Outfan respectively with grid, the grid of the second p-type field effect transistor and one end of the first electric capacity of described first p-type field effect transistor
Connecting, the source electrode of described first p-type field effect transistor and the source electrode of the second p-type field effect transistor connect power supply, described first p-type jointly
The drain electrode of field effect transistor, one end of described first resistance, the source electrode of described 4th p-type field effect transistor and described 3rd p-type field effect
The source electrode of pipe should jointly connect circuit output end, the drain electrode of described second p-type field effect transistor respectively with described first N-type field effect
The grid of the drain and gate of pipe, the grid of the second N-type field effect transistor and the 3rd N-type field effect transistor connects, described 3rd p-type field
The drain electrode of effect pipe is connected with the drain electrode of described second N-type field effect transistor, the grid of described 3rd p-type field effect transistor and described the
The grid of four p-type field effect transistor connects, and the drain electrode of described 4th p-type field effect transistor is connected with one end of described 3rd resistance, institute
The other end of the other end and described first electric capacity of stating the 3rd resistance is connected, the source electrode of described first N-type field effect transistor, the 2nd N
The source electrode of type field effect transistor, the source electrode of the 3rd N-type field effect transistor and one end common ground of described second resistance, described 3rd N
The drain electrode of type field effect transistor is connected with the source electrode of described operational amplifier, the other end of described first resistance and the second resistance another
One end connects the positive input terminal of described operational amplifier jointly, the negative input termination reference voltage of described operational amplifier.
The low-dropout linear voltage-regulating circuit of low-power consumption the most according to claim 2, it is characterised in that: described first p-type field
The proportional relation of size of effect pipe and the second p-type field effect transistor.
The low-dropout linear voltage-regulating circuit of low-power consumption the most according to claim 2, it is characterised in that: described circuit output electricity
The value of pressure is multiplied by described first resistance and the sum of the second resistance, then divided by described second resistance equal to the value of described reference voltage
The result of value, i.e. represent with formula VOUT=VREF* (R1+R2)/R2.
The low-dropout linear voltage-regulating circuit of low-power consumption the most according to claim 2, it is characterised in that: described operational amplifier
By the 5th p-type field effect transistor, the 6th p-type field effect transistor, the 4th N-type field effect transistor, the 5th N-type field effect transistor and the 6th N-type field
Effect pipe forms, and the described source electrode of the 5th p-type field effect transistor and the source electrode of the 6th p-type field effect transistor connect supply voltage jointly,
The grid of described 5th p-type field effect transistor and the grid of the 6th p-type field effect transistor are connected, the source of described 5th p-type field effect transistor
The pole the most also drain electrode with described 4th N-type field effect transistor that is connected with grid is connected, the drain electrode of described 6th p-type field effect transistor with
The drain electrode of described 5th N-type field effect transistor is connected and collectively constitutes outfan, and the substrate of described 4th N-type field effect transistor is with described
The substrate of the 5th N-type field effect transistor connects, the grid of described 4th N-type field effect transistor as positive input terminal, described 5th N-type field
The grid of effect pipe is as negative input end, the source electrode of described 4th N-type field effect transistor and the source electrode of described 5th N-type field effect transistor
The common drain electrode connecting described 6th N-type field effect transistor, the drain electrode of described 6th N-type field effect transistor is as described operational amplifier
Source electrode, the source ground of described 6th N-type field effect transistor.
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