CN101295189A - Voltage regulating circuit and method for providing regulated output voltage - Google Patents
Voltage regulating circuit and method for providing regulated output voltage Download PDFInfo
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- CN101295189A CN101295189A CNA2008100923590A CN200810092359A CN101295189A CN 101295189 A CN101295189 A CN 101295189A CN A2008100923590 A CNA2008100923590 A CN A2008100923590A CN 200810092359 A CN200810092359 A CN 200810092359A CN 101295189 A CN101295189 A CN 101295189A
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- current mirror
- coupled
- voltage
- current
- output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
- G05F1/571—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Abstract
A voltage regulating circuit for providing a regulated output voltage. The voltage regulating circuit includes a voltage regulator, a converting circuit, a capacitive device, a first current mirror module, and a second current mirror module. The voltage regulator has a first output producing the regulated output voltage and a second output producing a pass voltage. The converting circuit converts the pass voltage into a first current and a second current passing through a first converting node and a second converting node respectively, where the first current charges/discharges the capacitive device. The first current mirror module has a first current mirror path coupled to the first converting node and a second current mirror path coupled to the second converting node.; The second current mirror module has a first current mirror path coupled to the second converting node and a second current mirror path coupled to the first output.
Description
Technical field
The present invention relates to voltage stabilizing (voltage regulation) haply, especially refer to a kind of can be with minimized linear voltage-stabilizing circuit of negative spike (undershoot) effect (linear voltage regulating circuit) and method thereof, be about a kind of mu balanced circuit specifically and be used to provide through overregulating the method for output voltage.
Background technology
Be coupled to the voltage stabilizer between voltage source of supply and the load device, often be used to provide a sufficiently stable output current to keep driving force to load device.When load device ran into fast load current and changes, just when electric current demand (current draw) or loaded impedance changed between heavy load and little load, traditional voltage stabilizer just had some shortcomings.Shown in Figure 1ly be such in a prior art traditional voltage stabilizer 100.When load device ran into quick change between heavy load and the little load, the voltage stabilizer 100 of prior art just can produce the problem of negative spike (undershoot).This voltage stabilizer 100 has: be coupled to supply voltage V
CcWith output voltage V
OUTTurn-on transistor (pass transistor) MP
xBe coupled to turn-on transistor MP
xAmplifier A
1, it is by comparison reference voltage V
REFWith feedback voltage V
FBControl turn-on transistor MP
xResponse; And be connected in output voltage V
OUTWith amplifier A
1Between feedback circuit, it act as the transmission feedback voltage V
FBIn addition, output voltage V
OUTBe coupled to one by pull-up resistor R
ESRWith load capacitance C
LThe load device of institute's emulation, output voltage V
OUTCan respond to and produce a load current I
LOAD
When heavy load becomes little load, because the restriction of the loop frequency range (loop bandwidth) in the load instantaneous response (transient response), voltage stabilizer 100 can't in time cut out turn-on transistor MP
xSo from turn-on transistor MP
xProduced a big electric current, and immediately to load capacitance C
1Charging and draw high output voltage V
OUTThis forces voltage stabilizer 100 to enter the situation of voltage overload.When coming the burning voltage overload situations by the voltage stabilizer loop, output voltage V
OUTMust keep enough high voltage to close turn-on transistor MP
xYet, utilize resistance R
1And R
2The feedback network that is constituted can make and be stored in load capacitance C because of voltage overload
LElectric charge present exponential decay.After removing the output current load up to amplifier A
1During the suitable response of generation, the output voltage of this moment still is in an unsure state.Simultaneously, if load device can consume output current, load current I for example
LOADUnder situation about changing between heavy load and little load, output current can only be by load capacitance C
LSupply.This will reduce output voltage V
OUT
Work as output voltage V
OUTWhen being lower than required voltage level, the voltage stabilizer loop just can start so that output voltage V
OUTReturn to required voltage level.Yet because the restriction of loop frequency range, at turn-on transistor MP
xBefore being opened, output voltage V
OUTJust can supply a negative spike voltage to load device.In addition, as the turn-on transistor MP that closed originally
xAfter being opened, turn-on transistor MP
xGrid can consume a large amount of electric currents because of having big electric capacity.This can further worsen output voltage V
OUTThe negative spike effect.So output voltage V of tool negative spike
OUTCan the serious running of harming load device.
The 5th, 894, disclosed a kind of voltage stabilizer in No. 227 United States Patent (USP)s; In order to control a discharge transistor MPD, it utilizes a comparator C 1 to come the grid voltage of comparison turn-on transistor and reference voltage VTRIP with control discharge transistor (discharge transistor) MPD.Yet along with the difference of manufacturing course, reference voltage VTRIP is established De Taigao sometimes.This not only influences the running of discharge transistor MPD, has also reduced the whole voltage stabilizing efficient under little load.
The voltage stabilizer of all the other prior aries, for example the 5th, 966, No. 004 United States Patent (USP) and the 6th, 201, the voltage stabilizer that No. 375 United States Patent (USP)s are narrated when output voltage is higher than reference voltage, all utilizes a voltage stabilizer loop with bucking voltage (offset voltage) to open discharge transistor.Though can discharge to initial output voltage apace in the voltage stabilizer loop, this voltage stabilizer still can meet with above-mentioned identical problem.When output voltage became also littler than reference voltage, its discharge path was just identical with the discharge path that the 5th, 894, No. 227 United States Patent (USP) is narrated.Since discharge path still is made up of resistor network, making voltage return to the speed of steady state (SS) by non-steady state by this loop of voltage regulation can't be than comparatively fast.
Summary of the invention
Therefore, one of purpose of the present invention be to provide a kind of can be with minimized linear voltage-stabilizing circuit of negative spike (undershoot) effect (linear voltage regulating circuit) and method thereof.This circuit can make output voltage be recovered by positive kurtosis apace, and provides suitable voltage-regulation under normal situation.
An embodiment of the invention disclose a kind of mu balanced circuit that is used to provide the output voltage (regulatedoutput voltage) that is conditioned.Described mu balanced circuit includes: voltage stabilizer, and it has first output, can produce the described output voltage that is conditioned, and second output, can produce forward voltage (passvoltage); Change-over circuit is used for converting described forward voltage to first electric current and second electric current, described first switching node and described second switching node and described first electric current and described second electric current are flowed through respectively; Capacitive means is coupled to described first switching node; First current mirror module, the first current mirror path of described first current mirror module is coupled to described first switching node, and the second current mirror path of described first current mirror module is coupled to described second switching node; And second current mirror module, the first current mirror path of described second current mirror module is coupled to described second switching node, and the second current mirror path of described second current mirror module is coupled to described first output.Described capacitive means can keep the running of first current mirror module during charge/discharge so that output voltage recovers steady from positive kurtosis.When load device became little load by heavy load, output can return to the state of being regulated.
The present invention discloses a kind of method that is used to provide the output voltage that is conditioned in addition, and described method includes: voltage stabilizer (a) is provided, and described voltage stabilizer has first output, can produce the described output voltage that is conditioned, and second output, can produce forward voltage; (b) described forward voltage is converted to first electric current and second electric current, and make described first electric current and described second electric current respectively by first switching node and second switching node; (c) capacitive means is coupled to described first switching node; (d) the first current mirror path is coupled to described first switching node, and the second current mirror path is coupled to described second switching node, the wherein said first current mirror path is corresponding to the described second current mirror path; And (e) the 3rd current mirror path is coupled to described second switching node, and the 4th current mirror path is coupled to described first output, wherein said the 3rd current mirror path is corresponding to described the 4th current mirror path.
Circuit provided by the invention and method have better voltage regulation result when load variations.
Description of drawings
Fig. 1 is the voltage stabilizer of prior art.
Figure 2 shows that the circuit diagram of a kind of linear voltage-stabilizing circuit that first embodiment of the invention provides.
The circuit diagram of a kind of linear voltage-stabilizing circuit that Figure 3 shows that second embodiment of the invention to be provided.
Figure 4 shows that the circuit diagram of a kind of linear voltage-stabilizing circuit that the 3rd embodiment according to the present invention is provided.
Figure 5 shows that the circuit diagram of a kind of linear voltage-stabilizing circuit that the 4th embodiment according to the present invention is provided.
Fig. 6 is a kind of process flow diagram that is used to provide the method for the output voltage (regulated output voltage) that is conditioned according to the 5th embodiment of the present invention.
Embodiment
In the middle of instructions and claims, used some vocabulary to call specific element.Those skilled in the art should understand, and hardware manufacturer may be called same element with different nouns.This specification and claims book is not used as distinguishing the mode of element with the difference of title, but the criterion that is used as distinguishing with the difference of element on function.Be open term mentioned " comprising " in the middle of instructions and claims in the whole text, so should be construed to " comprise but be not limited to ".In addition, " coupling " speech is to comprise any indirect means that are electrically connected that directly reach at this.Therefore, be coupled to second device, then represent first device can directly be electrically connected in second device, or be connected electrically to second device indirectly by other device or connection means if describe first device in the literary composition.
Figure 2 shows that the circuit diagram of a kind of linear voltage-stabilizing circuit 200 that first embodiment of the invention provides.It (is to utilize capacitor C in the present embodiment that linear voltage-stabilizing circuit 200 includes linear voltage regulator 210, change-over circuit 220, capacitive means
1Implement), first current mirror module 240 and second current mirror module 250.Linear voltage regulator 210 includes turn-on transistor MP, and it is p channel metal oxide semiconductor (PMOS) transistor, and it leaks level and is connected to one by resistance R
11And R
12The voltage divider that is constituted, its source electrode are connected to the first reference voltage Vin, and its grid is connected to error amplifier (erroramplifier) 212.In addition, as shown in Figure 2, feedback circuit is with output voltage V
OutBe coupled in error amplifier 212.Because the running of linear voltage regulator 210 is known by those skilled in that art that for narrating for purpose of brevity, detail section does not repeat them here.
Change-over circuit 220 comprises a plurality of transistor M
11, M
12, M
13, M
14, transistor M wherein
11Be a p channel metal oxide semiconductor transistor, and transistor M
12, M
13And M
14Be the n channel metal oxide semiconductor transistor.As shown in Figure 2, transistor M
11Grid link to each other with the grid of turn-on transistor MP.Therefore, when turn-on transistor MP because forward voltage V
pAnd when opening, transistor M
11Also open thereupon.In the middle of change-over circuit 220, transistor M
12And M
13Constitute a current mirror, can be used as and produce first electric current I
11First current generator; And M
12And M
14Then constitute another current mirror, can be used as and produce second electric current I
12Second current generator.Generally speaking, change-over circuit 220 is used for forward voltage V
pConvert two electric current I to
11And I
12, these two electric currents first switching node N that flows through separately
11And the second switching node N
12As for passing through capacitor C
1The capacitive means of implementing, the one end points is coupled to switching node N
11, its another end points then is coupled to ground.Capacitor C
1Be used to provide a big electric capacity.First current mirror module 240 is used for shining upon (mirror) first electric current I
11To produce the 3rd electric current I
13, and first current mirror module 240 includes two transistor M
15And M
16, wherein because M
15Be connected into the form of diode, make capacitor C
1Be coupled to the first switching node N
11The current mirror that note that the aforementioned currents mirror will be through suitably designing so that second electric current I than (current mirror ratio)
12Greater than the 3rd electric current I
13Therefore because second electric current I
12Cause, be positioned at the second switching node N
12Voltage level can be pulled to almost identical with ground voltage (ground voltage), and at the transistor M of second current mirror module 250
17And M
18Also therefore be closed.In other words, when turn-on transistor MP because forward voltage V
pAnd when opening, second current mirror module 250 is not being shone upon lapse under the situation of any electric current (disabled).
One load device is coupled to the output terminal of linear voltage regulator 210, and utilizes output voltage (the regulated output voltage) V that is conditioned
OutAnd corresponding output current provides electric power.For brevity, load device can include parallel resistance R by one
LWith capacitor C
OutThe RC equivalent electrical circuit represent.
In the middle of the load instantaneous response of linear voltage regulator 210, when the experience heavy load becomes the change of little load, can reduce to very little zero even originally rapidly by a large amount of output currents of load device.Flow through turn-on transistor MP electric current just then flow to capacitor C
Out, thereby make output voltage V
OutRise.Feedback voltage V
fAlso rise thereupon.Yet, since the conversion ratio (slew rate) of error amplifier 212, forward voltage V
pRise inadequately fast to respond the feedback voltage V that rises
fTherefore, after through single loop-delay once, error amplifier 212 can produce enough high forward voltage V
pTo close turn-on transistor MP.It should be noted that time, output voltage V owing to loop-delay
OutCan charge to the output voltage of positive spike at once.When turn-on transistor MP is closed, transistor M
11, M
12, M
13, M
14Also close thereupon.Yet (the capacitor C just because capacitive means
1) cause, in first current mirror module 240, transistor M
16And the transistor M that connects into the diode form
15Still keep the state of opening and continue to produce the 3rd electric current I
13Since transistor M
13Be closed, transistor M flows through
15Electric current just by transistor M
15Grid and leak institute's framework between the level current path then to capacitor C
1Charge.
According to present embodiment, capacitor C
1Capacitance to reach greatly to keep first current mirror module 240 and between charge period, continue running.Because transistor M
14Be closed the second switching node N
12Voltage just no longer be pulled low to ground voltage, and second current mirror module 250 just comes into operation and generates discharge current I with induction
14The 3rd electric current I of receiving with response
13Discharge current I
14Just can be to capacitor C
OutDischarge and then to output voltage V
OutRegulate.In the present embodiment, discharge current I
14Be designed under the very big situation of load, the output current of itself and offered load device has fixing number percent, simultaneously discharge current I
14Just the output current with the offered load device is directly proportional.This is because under the very big situation of load, in case the situation of little load takes place to become from heavy load, output current is bigger, then output voltage V
OutSpike higher.Therefore, under the very big situation of load, since discharge current I
14Depend on output current, linear voltage-stabilizing circuit 200 just can return to the state of being regulated (underregulation condition) fast by the negative spike state.Note that capacitor C
1The capacitance size should suitably be designed to make second current mirror module 250 can be maintained to output voltage V
OutWhen returning to the state of being regulated, positive kurtosis just closes.After surpassing between charge period, transistor M
15And M
16Just because grid voltage is pulled to V nearly
InAnd close.Since transistor M
17No longer include electric current and pass through, discharge current I
14Just regeneration not, and linear voltage-stabilizing circuit 200 also enters stable little load condition.
The circuit diagram of the linear voltage-stabilizing circuit 300 that Figure 3 shows that second embodiment of the invention to be provided.It (is to pass through capacitor C in the present embodiment that linear voltage-stabilizing circuit 300 includes linear voltage regulator 310, change-over circuit 320, capacitive means
2Implement), first current mirror module 340 and second current mirror module 350.Because linear voltage regulator shown in Figure 3 310 is identical with linear voltage regulator 210 both configurations shown in Figure 2, therefore for for purpose of brevity, wherein details does not repeat them here.In the present embodiment, change-over circuit 320 comprises two transistors: (p channel metal oxide semiconductor transistor) M
21And M
22Be coupled to the first switching node N respectively
21And the second switching node N
22As shown in Figure 3, transistor M
21With M
22Grid all link to each other with the grid of turn-on transistor MP.Therefore, when turn-on transistor because forward voltage V
pAnd when opening, transistor M
21With M
22Also open to make first electric current I respectively thereupon
21With second electric current I
22By.In brief, change-over circuit 320 is used for forward voltage V
pConvert two electric current I to
21And I
22, these two electric currents first switching node N that flows through separately
21And the second switching node N
22
As for passing through capacitor C
2The capacitive means of implementing, the one end points is coupled to switching node N
21, its another end points then is coupled to the first reference voltage V
InIn addition, capacitor C
2Be the very big electric capacity of capacitance.First current mirror module 340 is used for shining upon first electric current I
21To produce the 3rd electric current I
23, and include two transistor M
23And M
24, wherein because M
23Be connected into the form of diode, make capacitor C
2Be coupled to the first switching node N
21The current mirror ratio of first current mirror module 340 will be through suitably designing so that the 3rd electric current I
23Less than second electric current I
22This makes and is positioned at the second switching node N
22Voltage level can be because second electric current I
22Cause, be pulled up to almost and the first reference voltage V
InIdentical, and at the transistor M of second current mirror module 350
25To M
28Also therefore be closed.In other words, when turn-on transistor MP because forward voltage V
pAnd when opening, second current mirror module 350 lapses not shining upon under the situation of any electric current.
Similar to precedent, the load device that is coupled to linear voltage regulator 310 output terminals can be by including parallel resistance R
LWith capacitor C
OutThe RC equivalent electrical circuit represent.
In the middle of the load instantaneous response of linear voltage regulator 310, when the experience heavy load becomes the change of little load, can reduce to very little zero even originally rapidly by a large amount of output currents of load device.Flow through turn-on transistor MP electric current just then flow to capacitor C
Out, thereby make output voltage V
OutRise.Feedback voltage V
fAlso rise thereupon.Yet, since the conversion ratio of error amplifier 312, forward voltage V
pRise inadequately fast to respond the feedback voltage V that rises
fTherefore, after through single loop-delay once, error amplifier 312 can produce enough high forward voltage V
pTo close turn-on transistor MP.It should be noted that time, output voltage V owing to loop-delay
OutCan charge to the output voltage of positive spike at once.When turn-on transistor MP is closed, transistor M
21And M
22Also close thereupon.Yet (the capacitor C just because capacitive means
2) cause, in first current mirror module 340, transistor M
24And the transistor M that connects into the diode form
23Still keep the state of opening and continue to produce the 3rd electric current I
23Since transistor M
21Be closed, transistor M flows through
23Electric current just then to capacitor C
2Discharge.According to present embodiment, capacitor C
2Capacitance to reach greatly to keep first current mirror module 340 and continue running at interdischarge interval.Because transistor M
22Be closed the second switching node N
22Voltage level just no longer be pulled up to and the first reference voltage V
InIdentical, and second current mirror module 350 just comes into operation with induction generation discharge current I
24Second electric current I of receiving with response
22Discharge current I then
24Then can be to capacitor C
OutDischarge and then to output voltage V
OutRegulate.Similar with aforesaid embodiment, discharge current I
24Also be designed under the very big situation of load, the output current of itself and offered load device has fixing ratio.So linear voltage-stabilizing circuit 300 just can return to the state of being regulated fast by the negative spike state.In addition, capacitor C
2The capacitance size should suitably be designed to make second current mirror module 350 until output voltage V
OutWhen returning to the state of being regulated, positive kurtosis just closes.Surpass after the interdischarge interval transistor M
23And M
24Just because nearly being pulled low to ground voltage, grid voltage closes.Since transistor M
25No longer include electric current and pass through, discharge current I
24Just regeneration not, and linear voltage-stabilizing circuit 300 also enters stable little load condition.
Must have very big capacitance as the capacitive means that is provided in the middle of Fig. 2 and the embodiment shown in Figure 3, these capacitive means can pass through metal-insulator-metal, and (metal-insulator-metal, MiM) electric capacity of structure is realized.Yet bigger capacitance need occupy bigger chip area, and this also can significantly increase manufacturing cost.Therefore, the present invention has also utilized the little chip area of a kind of only need can obtain the capacitance lift technique of big capacitance.
Figure 4 shows that the circuit diagram of the linear voltage-stabilizing circuit 400 that the 3rd embodiment according to the present invention is provided.Linear voltage-stabilizing circuit 400 includes linear voltage regulator 210, change-over circuit 220, capacitive means 430, first current mirror module 240 and second current mirror module 250.Linear voltage-stabilizing circuit 400 shown in Figure 4 is similar to linear voltage-stabilizing circuit 200 shown in Figure 2.Both main differences are that linear voltage-stabilizing circuit 400 has a capacitive means 430 of not realizing by single big electric capacity.In the present embodiment, capacitive means 430 includes a plurality of transistor M
41-M
43And little capacitor C
3, transistor M wherein
43And the transistor M that connects into the diode form
42Constitute a current mirror.Transistor M
42Aspect ratio (aspect ratio) be K1 (W/L), and transistor M
43Aspect ratio (W/L) be K2; Wherein, in order to promote capacitance, the ratio of K2/K1 is defined as K (K＞1).The detailed operation of capacitance lift technique is as described below.
In the middle of the load instantaneous response of the linear voltage regulator 210 of linear voltage-stabilizing circuit 400, when meeting with heavy load and become the change of little load, the forward voltage V after the lifting
pCan be used to close transistor M
41As mentioned above, transistor M
15And M
16Still stay open.In addition, transistor M
42And M
43Be opened to constitute current mirror, transistor M wherein flows through
43Size of current be the transistor M that flows through
42The K of size of current doubly.Because a current source is shared (promptly from transistor M in these two current mirror paths
15The leakage level electric current of output), by transistor M
15See in the past the equivalent capacity load just in fact (substantially) equal (1+K) * C
3In the present embodiment, K is defined by big more a lot than 1.Therefore by transistor M
15See that equivalent capacity load in the past just equals K*C in fact
3Note that capacitor C
3Little electric capacity can be so that realize that the required chip area of capacitive means 430 is very little.So, because capacitive load has very big value K*C
3, transistor M
15And M
16Grid voltage can rise slowly.Therefore, capacitive means 430 just can make first current mirror module 240 keep running between charge period, so that output voltage V
OutReturn to the state of being regulated by positive kurtosis.In output voltage V
OutReturn to after the state of being regulated long-channel (long channel) transistor M
41Just be opened, and its leakage level electric current can become and transistor M
42Leakage level electric current identical.Electric current is not so just arranged in addition to capacitor C
3Charge.
Figure 5 shows that the circuit diagram of the linear voltage-stabilizing circuit 500 that the 4th embodiment according to the present invention is provided.Linear voltage-stabilizing circuit 500 includes linear voltage regulator 310, change-over circuit 320, capacitive means 530, first current mirror module 340 and second current mirror module 350.Linear voltage-stabilizing circuit 500 shown in Figure 5 is similar to linear voltage-stabilizing circuit 300 shown in Figure 3.Both main differences are that linear voltage-stabilizing circuit 500 has a capacitive means 530 of not realizing by single big electric capacity.In the present embodiment, capacitive means 530 includes a plurality of transistor M
51-M
53And little capacitor C
4, transistor M wherein
53Be coupled to a transistor M who connects into the diode form
52, both constitute a current mirror.Transistor M
52Aspect ratio (W/L) be K1, and transistor M
53Aspect ratio (W/L) be K2; Wherein, in order to promote capacitance, the ratio of K2/K1 is defined as K (K＞1).The detailed operation of capacitance lift technique is as described below.
In the middle of the load instantaneous response of the linear voltage regulator 310 of linear voltage-stabilizing circuit 500, when meeting with heavy load and become the change of little load, the forward voltage V after the lifting
pCan close transistor M
21And M
22As mentioned above, transistor M
23And M
24Still stay open.So, transistor M
51Grid voltage nearly can be pulled low to ground voltage and make transistor M
51Be closed.Yet, transistor M
52And M
53Can be opened to constitute current mirror, transistor M wherein flows through
53Size of current be the transistor M that flows through
52The K of size of current doubly.Because same current source is shared (promptly from transistor M in these two current mirror paths
23The leakage level electric current of output), by transistor M
23See that equivalent capacity load in the past just is equivalent to (1+K) * C
4In the present embodiment, K is defined by big more a lot than 1.Therefore by transistor M
23Seeing in the past equivalent capacity load just can be reduced to is approximately K*C
4Note that capacitor C
4Little electric capacity can be so that realize that the required chip area of capacitive means 530 is very little.So, because capacitive load has very big value K*C
4, transistor M
23And M
24Grid voltage can reduce lentamente.Therefore, capacitive means 530 just can make first current mirror module 340 keep running at interdischarge interval, so that output voltage V
OutReturn to the state of being regulated by positive kurtosis.In output voltage V
OutReturn to after the state of being regulated long channel transistor M
51Just be opened, and its source current can become and transistor M
52Source current identical.So just, no longer include electric current to capacitor C
4Discharge.
Note that Fig. 2 only is used for illustrating the circuit configurations that described embodiment provides to shown in Figure 5, can not be used for as restrictive condition of the present invention.
The present invention discloses a kind of method that is used to provide an output voltage that is conditioned in addition, and as shown in Figure 6, described method is to be used for auxiliary aforesaid device.Note that if can obtain roughly the same result program 600 performed steps provided by the invention not necessarily will be carried out according to following order fully, if also not necessarily continuous; In other words, the central step that also can insert other.Described method includes:
Step 610: a voltage stabilizer is provided, and described voltage stabilizer has first output, can produce the output voltage that is conditioned, and second output, can produce forward voltage;
Step 620: convert forward voltage to first electric current and second electric current, and make first electric current and second electric current respectively by first switching node and second switching node;
Step 630: capacitive means is coupled to first switching node;
Step 640: the first current mirror path is coupled to first switching node, and the second current mirror path is coupled to second switching node, wherein the first current mirror path is corresponding to the second current mirror path; And
Step 650: the 3rd current mirror path is coupled to second switching node, and the 4th current mirror path is coupled to first output, wherein the 3rd current mirror path is corresponding to described the 4th current mirror path.
In brief, the present invention is disclosed is to be used to provide a capacitive means and the method thereof that can keep the running of first current mirror module during charge/discharge.When load device became little load by heavy load, this can allow output voltage return to the state of being regulated from positive kurtosis.
Though the present invention with the better embodiment explanation as above; yet it is not to be used for limiting scope of the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; any change and the change made; all in protection scope of the present invention, specifically the scope that defines with claim is as the criterion.
Claims (18)
1. a mu balanced circuit is characterized in that, described mu balanced circuit is used to provide the output voltage that is conditioned, and described mu balanced circuit includes:
Voltage stabilizer, it has first output, can produce the described output voltage that is conditioned, and second output, can produce forward voltage;
Change-over circuit, be coupled to described voltage stabilizer, be used for converting described forward voltage to first electric current and second electric current, wherein said change-over circuit has voltage input node, first switching node and second switching node, and described voltage input node is coupled to described second output, be used for receiving described forward voltage, described first electric current described first switching node of flowing through, and described second electric current described second switching node of flowing through;
Capacitive means is coupled to described first switching node;
First current mirror module, the first current mirror path of described first current mirror module is coupled to described first switching node, and the second current mirror path of described first current mirror module is coupled to described second switching node; And
Second current mirror module, the first current mirror path of described second current mirror module is coupled to described second switching node, and the second current mirror path of described second current mirror module is coupled to described first output.
2. mu balanced circuit as claimed in claim 1 is characterized in that, described voltage stabilizer includes:
Error amplifier has:
First input is coupled to one first reference voltage;
Second input; And
Error output is coupled to described second output;
Turn-on transistor has:
Grid is coupled to described second output;
First electrode is coupled to second reference voltage; And
Second electrode is coupled to described first output; And
Feedback circuit is coupled between described first output and second input.
3. mu balanced circuit as claimed in claim 1 is characterized in that, described change-over circuit includes in addition:
Transistor has:
Grid is coupled to described second output;
First electrode is coupled to reference voltage; And
Second electrode;
First current generator is coupled to described first switching node and described second electrode, is used for producing described first electric current; And
Second current generator is coupled to described second switching node and described second electrode, is used for producing described second electric current.
4. mu balanced circuit as claimed in claim 3 is characterized in that, described first and second current generator is to have the shared transistorized current mirror of the diode form that is connected into.
5. mu balanced circuit as claimed in claim 1 is characterized in that, described capacitive means is single electric capacity.
6. mu balanced circuit as claimed in claim 1 is characterized in that, described capacitive means includes:
The 3rd current mirror module includes:
The first current mirror path; And
The second current mirror path is coupled to described first switching node;
Compare greater than one with respect to the current mirror in the described first current mirror path of described the 3rd current mirror module in the described second current mirror path of wherein said the 3rd current mirror module;
Electric capacity is coupled between the described first current mirror path and described first switching node of described the 3rd current mirror module; And
Transistor has:
Grid is coupled to described second output;
First electrode is coupled to reference voltage; And
Second electrode is coupled to the described first current mirror path of described the 3rd current mirror module.
7. mu balanced circuit as claimed in claim 6 is characterized in that described transistor is a long channel transistor.
8. mu balanced circuit as claimed in claim 1 is characterized in that, described change-over circuit includes:
The first transistor has:
Grid is coupled to described second output;
First electrode is coupled to reference voltage; And
Second electrode is coupled to described first switching node; And
Transistor seconds has:
Grid is coupled to described second output;
First electrode is coupled to described reference voltage; And
Second electrode is coupled to described second switching node.
9. mu balanced circuit as claimed in claim 1 is characterized in that, described capacitive means includes:
The 3rd current mirror module includes:
The first current mirror path; And
The second current mirror path is coupled to described first switching node;
Compare greater than one with respect to the current mirror in the described first current mirror path of described the 3rd current mirror module in the described second current mirror path of wherein said the 3rd current mirror module;
Electric capacity is coupled between the described first current mirror path and described first switching node of described the 3rd current mirror module; And
Transistor has:
Grid is coupled to described first switching node;
First electrode is coupled to reference voltage; And
Second electrode is coupled to the described first current mirror path of described the 3rd current mirror module.
10. mu balanced circuit as claimed in claim 9 is characterized in that described transistor is a long channel transistor.
11. mu balanced circuit as claimed in claim 1 is characterized in that, described second electric current is greater than described first electric current.
12. a method that is used to provide the output voltage that is conditioned, described method includes:
(a) provide voltage stabilizer, described voltage stabilizer has first output, can produce the described output voltage that is conditioned, and second output, can produce forward voltage;
(b) described forward voltage is converted to first electric current and second electric current, and make described first electric current and described second electric current respectively by first switching node and second switching node;
(c) capacitive means is coupled to described first switching node;
(d) the first current mirror path is coupled to described first switching node, and the second current mirror path is coupled to described second switching node, the wherein said first current mirror path is corresponding to the described second current mirror path; And
(e) the 3rd current mirror path is coupled to described second switching node, and the 4th current mirror path is coupled to described first output, wherein said the 3rd current mirror path is corresponding to described the 4th current mirror path.
13. the method that is used to provide the output voltage that is conditioned as claimed in claim 12 is characterized in that, step (b) is carried out through the following steps:
Transistor is provided, and it has the grid that is coupled to described second output;
Mapped streams through the electric current of described the first transistor to produce described first electric current; And
The described electric current of mapped streams through appealing the first transistor is to produce described second electric current.
14. the method that is used to provide the output voltage that is conditioned as claimed in claim 12 is characterized in that, described capacitive means is single electric capacity.
15. the method that is used to provide the output voltage that is conditioned as claimed in claim 12 is characterized in that, step (c) includes in addition:
Provide current mirror module to described capacitive means, described current mirror module includes:
The first current mirror path; And
The second current mirror path is coupled to described first switching node;
Compare greater than one with respect to the current mirror in the described first current mirror path of described current mirror module in the described second current mirror path of wherein said current mirror module;
Provide electric capacity to described capacitive means, described electric capacity is coupled between the described first current mirror path and described first switching node of described current mirror module;
When the described output voltage that is conditioned enters positive kurtosis, enable described current mirror module and come described electric capacity is carried out charge or discharge; And
When the described output voltage that is conditioned enters the state of being regulated, make described current mirror module stop described electric capacity is carried out charge or discharge.
16. the method that is used to provide the output voltage that is conditioned as claimed in claim 12 is characterized in that, step (b) is carried out through the following steps:
The first transistor is provided, and described the first transistor has the grid that is coupled to described second output, is used for exporting described first electric current; And
Transistor seconds is provided, and described transistor seconds has the grid that is coupled to described second output, is used for exporting described second electric current.
17. the method that is used to provide the output voltage that is conditioned as claimed in claim 16 is characterized in that, step (c) includes in addition:
Provide current mirror module to described capacitive means, described current mirror module includes:
The first current mirror path; And
The second current mirror path is coupled to described first switching node;
Compare greater than one with respect to the current mirror in the described first current mirror path of described current mirror module in the described second current mirror path of wherein said current mirror module;
Provide electric capacity to described capacitive means, described electric capacity is coupled between the described first current mirror path and described first switching node of described current mirror module;
When the described output voltage that is conditioned enters positive kurtosis, enable described current mirror module and come described electric capacity is carried out charge or discharge; And
When the described output voltage that is conditioned enters the state of being regulated, make described current mirror module stop described electric capacity is carried out charge or discharge.
18. the method that is used to provide the output voltage that is conditioned as claimed in claim 12 is characterized in that, described second electric current is greater than described first electric current.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/739,115 US7498780B2 (en) | 2007-04-24 | 2007-04-24 | Linear voltage regulating circuit with undershoot minimization and method thereof |
| US11/739,115 | 2007-04-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101295189A true CN101295189A (en) | 2008-10-29 |
| CN100589059C CN100589059C (en) | 2010-02-10 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200810092359A Active CN100589059C (en) | 2007-04-24 | 2008-04-24 | Voltage regulating circuit and method for providing regulated output voltage |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7498780B2 (en) |
| CN (1) | CN100589059C (en) |
| TW (1) | TWI356291B (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| US20080265853A1 (en) | 2008-10-30 |
| TWI356291B (en) | 2012-01-11 |
| TW200842542A (en) | 2008-11-01 |
| CN100589059C (en) | 2010-02-10 |
| US7498780B2 (en) | 2009-03-03 |
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