CN106094966A - Broadband linear voltage regulator with high power supply rejection ratio - Google Patents

Broadband linear voltage regulator with high power supply rejection ratio Download PDF

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Publication number
CN106094966A
CN106094966A CN201610725193.6A CN201610725193A CN106094966A CN 106094966 A CN106094966 A CN 106094966A CN 201610725193 A CN201610725193 A CN 201610725193A CN 106094966 A CN106094966 A CN 106094966A
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voltage
power supply
ripple
linear regulator
low
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CN201610725193.6A
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Chinese (zh)
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黄继颇
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黄继颇
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/569Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
    • G05F1/571Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector

Abstract

The invention discloses a broadband linear voltage regulator with a high power supply rejection ratio. The linear voltage regulator is characterized by comprising a power supply ripple preprocessor and a low dropout regulator (LDO). The output of the power supply ripple preprocessor is connected with an input power supply of the low dropout regulator (LDO). The power supply ripple preprocessor is used for generating a direct current voltage VP1 having broadband ripple rejection. The power supply ripple preprocessor comprises a resistance voltage division circuit, a low pass filter and a voltage follower. The resistance voltage division circuit, the low pass filter and the voltage follower are connected in sequence. By use of a stable ripple rejection voltage VG1 and a voltage buffer formed by depletion mode transistors, ripples of the input power supply of the low dropout regulator (LDO) are reduced. The broadband linear voltage regulator has the advantages of broadband high power supply rejection ratio (PSRR) load range, small influence on system stability and high current efficiency and the like.

Description

一种宽频高电源抑制比的线性稳压器 One kind of broadband high power supply rejection linear regulator ratio

技术领域 FIELD

[0001]本发明属于高性能模拟集成电路设计技术领域,具体涉及一种宽频高电源抑制比的线性稳压器。 [0001] The present invention pertains to high-performance analog design technical field of integrated circuits, in particular to a broadband high power supply rejection linear regulator ratio.

背景技术 Background technique

[0002]低压差线性稳压器(LDO),由于具有电路结构简单、瞬态响应速度快、成本低等优点得到广泛应用。 [0002] The low-dropout linear regulator (the LDO), since having a simple circuit structure, fast transient response and low cost, is widely used. 低压差线性稳压器可以将输入的直流高电压转换为电子设备所需的低纹波、低噪声的直流低电压。 DC high voltage low-dropout linear regulator may convert the input to the electronic equipment necessary low ripple, low noise, low-voltage DC. 一般情况下,低压差线性稳压器的输入直流电压上,会叠加宽带的交流纹波,会影响设备和电路的稳定性以及电路性能。 In general, the input DC voltage low-dropout linear regulator, superimposed AC ripple broadband, will affect the stability and circuit performance devices and circuits. 当需要高性能电源时,非理想的组件和寄生电容会改变线性稳压器的理想特性,降低对电源电压波动的抑制作用。 When the required high-performance power, non-ideal components and parasitic capacitance will change over the characteristics of the linear regulator, to reduce inhibitory effect on the power supply voltage fluctuations. 电源抑制比这个指标衡量的是稳压器抑制叠加在正常输入直流电压上的交流信号的能力。 Power supply rejection ratio of this measure of the ability of the AC signal is superimposed on the normal input DC voltage regulator suppressed. 电源抑制比在低频时最大,抑制电源电压波动的能力较强,而在高频时,这种能力就减弱了。 Power supply rejection ratio in the low frequency maximum inhibition high capability power supply voltage fluctuations, while at high frequencies, this ability is weakened. 实际低压差线性稳压器的设计,其电源抑制比从IkHz到1kHz范围内开始下降。 The actual low-dropout linear regulator design, the power supply rejection ratio decreases from IkHz into the 1kHz range.

[0003]随着用户对电源纹波抑制能力的要求的提高,低噪声、高电源抑制比线性稳压器要求其在在10kHz时仍具有60dB的良好电源抑制比。 [0003] With the improvement of user requirements for the power supply ripple rejection capacity, low noise, high PSRR linear regulator requires that its rejection ratio in good supply at 10kHz still of 60dB. 在10kHz以上时,电源抑制比主要受输出电容、寄生组件以及调整管上漏电流的影响。 When more than 10kHz, the power supply to suppress the influence than the main by the output capacitor, the parasitic components, and adjust the tube leakage current.

[0004]电源抑制比是线性稳压器的关键性能指标,电源抑制比往往取决于带隙基准的精度和线性稳压器误差信号放大器回路的开环增益。 [0004] The power supply rejection ratio is a key performance linear regulator indicators, power supply rejection ratio often depends on the open loop gain accuracy and linearity regulator error amplifier circuit bandgap reference. 通常情况下,线性稳压器为了获得较高的电源抑制比,就采用较大的误差信号放大的开环增益,或者是增大输出端的耦合电容,降低线性稳压器的带宽。 Typically, the linear regulator in order to obtain a higher power supply rejection ratio, on the use of the larger error amplifier open-loop gain, or increase the coupling capacitance of the output terminal, reduce the bandwidth of the linear regulator. 采用较大的误差放大开环增益,会给电路设计带来较大的挑战。 The use of larger error amplifier open loop gain, will circuit design brings greater challenge. 而增大输出端耦合电容的方式,又会增大芯片的面积,增大生产成本。 Increase output of the coupling capacitor manner, it will increase the chip area, increase of production cost.

发明内容 SUMMARY

[0005]根据以上现有技术的不足,本发明所要解决的技术问题是提出一种宽频高电源抑制比的线性稳压器,具有宽频高电源抑制比特性、对系统稳定性影响小、电流效率高等特点。 [0005] The deficiencies of the above prior art, the present invention is to solve the technical problem is to provide a broadband high power supply rejection linear regulator ratio, having a broadband high power supply rejection ratio characteristics, little effect on the stability of the system, the current efficiency Advanced features.

[0006]为了解决上述技术问题,本发明采用的技术方案为:一种宽频高电源抑制比的线性稳压器,其特征在于,该线性稳压器包括电源纹波预处理器和低压差线性稳压器LDO;所述电源纹波预处理器输出与低压差稳压器LDO输入电源相连;所述电源纹波预处理器用于产生宽频纹波抑制的直流电压VPl;所述低压差线性稳压器LDO用于产生直流输出电压V0UT;所述电源波纹预处理器包括电阻分压电路、低通滤波器和电压跟随器;所述电阻分压电路、低通滤波器、电压跟随器依次相连;所述电阻分压器通过电阻分压电路产生一个低于电源电压的基准电压VRl;所述低通滤波器用于滤除VRl上的电源干扰和噪声,得到纹波抑制电压VGl;所述电压跟随器用于产生纹波抑制的直流电压VP1。 [0006] To solve the above technical problem, the technical solution of the present invention is used are: one kind of broadband high power supply rejection linear regulator ratio, wherein the linear regulator comprises a power supply ripple preprocessor and the low-dropout linear Regulators LDO; the power supply ripple preprocessor outputs a low-dropout regulator LDO input power source is connected; said power supply ripple preprocessor for generating a DC voltage VPl broadband ripple rejection; said low dropout linear regulators pressure LDO for generating a DC output voltage VOUT; the power supply ripple pre-processor includes a resistance voltage dividing circuit, a low pass filter and the voltage follower; the resistive divider circuit, a low pass filter, voltage follower are connected in sequence ; the resistor divider created by resistance voltage dividing circuit a lower than the supply voltage of the reference voltage VRl; the low pass filter for filtering the power of interference and noise on VRl, resulting ripple rejection voltage VGL; the voltage follower for generating a DC voltage VP1 ripple suppression. 所述电阻分压电路通过分压获得略低于电源电压的基准电压VR1。 The resistance voltage dividing circuit to obtain slightly lower than the supply voltage of the reference voltage VR1 by dividing. 所述电阻分压电路为串联电阻分压电路。 The resistance voltage dividing circuit is a series resistor voltage divider circuit.

[0007]所述电压跟随器为采用耗尽型晶体管Ml,耗尽型晶体管Ml连接成电源缓冲级,纹波抑制电压VGl送至耗尽型晶体管Ml的栅极,在Ml的源极得到接近于纹波抑制电压VGl的跟随电压VPl。 [0007] The voltage follower is a depletion type transistor Ml, a depletion mode transistor Ml is connected to the power buffer stage ripple rejection voltages VGl to the gate of a depletion type transistor Ml, the very closely approximate the source of Ml of in ripple rejection voltages VGl follows the voltage VPl.

[0008]所述低压差线性稳压器LDO包括带隙基准电路VBG、误差放大器AMP、调整管、反馈电阻网络、输出耦合电容和偏置电流调整电路IBIAS;所述带隙基准电路VBG、偏置电流调整电路IBIAS分别和误差放大器AMP连接。 [0008] The low-dropout linear regulator LDO comprises a bandgap reference circuit VBG, an error amplifier AMP, the regulator, the feedback resistor network, the output coupling capacitor and the bias current adjusting circuit of the IBIAS; the bandgap reference circuit VBG, partial counter current regulation circuit IBIAS, respectively, and the error amplifier aMP is connected.

[0009]所述带隙基准电路VBG为低压差线性稳压器提供基准参考电压VREF;偏置电流产生电路IBI AS控制基准电流IB的大小;基准参考电压VREF和反馈电压VFB的差值经过放大后,连接到调整管M2的栅极,对输出电压VOUT进行控制;电阻R5和R6构成反馈网络,将分压VFB反馈至误差放大器AMP的正极性输入端。 [0009] The bandgap reference circuit VBG provides a reference voltage reference VREF is low-dropout linear regulator; bias current generating circuit IBI AS controls the reference current IB magnitude; the difference between the reference reference voltage VREF and the feedback voltage VFB is amplified after a gate connected to the adjustment transistor M2, the output voltage VOUT is controlled; resistors R5 and R6 form a feedback network, the divided voltage VFB is fed back to the positive input terminal of the error amplifier aMP.

[0010]由于经过纹波抑制的直流电压VPl减小了低压差线性稳压器LDO的输入电源波动,获得宽频高电源抑制比的直流输出电压VOUT。 [0010] Since the through current voltage VPl ripple rejection reduces the input power fluctuation LDO low-dropout linear regulator, to obtain broadband high power supply rejection DC output voltage VOUT ratio.

[0011]本发明有益效果是:通过使用稳定的纹波抑制电压VGl和耗尽型晶体管构成的电压缓冲级,可以获得较为稳定的宽频纹波抑制的直流电压VPl,减小了低压差线性稳压器LDO输入电源的纹波。 [0011] Advantageous effects of the present invention: by using a stable ripple rejection voltage buffer stage can be obtained more stable broadband ripple rejection of the DC voltage VPl voltages VGl and a depletion type transistor, reduces the low dropout linear regulators pressure LDO input power supply ripple. 电压缓冲级的输出作为低压差线性稳压器的电源输入,最终得到具有宽频高电源抑制比的输出电压V0UT,提高用电设备的精度。 A voltage buffer stage output as the power supply input low-dropout linear regulator, ultimately obtain a broadband high power supply rejection output voltage V0UT ratio, improve the accuracy of electrical equipment. 本发明具有宽频高PSRR负载范围、对系统稳定性影响小、电流效率高等特点。 The present invention has wide high PSRR load range, system stability is small, the current efficiency.

附图说明 BRIEF DESCRIPTION

[0012]下面对本说明书附图所表达的内容及图中的标记作简要说明: [0012] Next, the content and FIG expressed in the present specification numerals in the drawings a brief description:

[0013]图1是本发明的具体实施方式的宽频高电源抑制比的线性稳压器系统结构图。 [0013] FIG. 1 is a system configuration diagram of a linear regulator than broadband high power supply specific embodiments of the present invention to inhibit.

[0014]图2是本发明的具体实施方式的宽频高电源抑制比线性稳压电路的原理图。 [0014] FIG. 2 is a broadband high power supply specific embodiments of the present invention inhibit Schematic than linear regulator circuits.

具体实施方式 Detailed ways

[0015]下面对照附图,通过对实施例的描述,本发明的具体实施方式如所涉及的各构件的形状、构造、各部分之间的相互位置及连接关系、各部分的作用及工作原理、制造工艺及操作使用方法等,作进一步详细的说明,以帮助本领域技术人员对本发明的发明构思、技术方案有更完整、准确和深入的理解。 [0015] The following reference to the drawings, description of embodiments, embodiments of the present invention as related to the members of the shape, structure, the mutual positional and connection relationship between the parts, the actions of parts and working principle , manufacturing processes and operating methods of use, as described in further detail to help those skilled in the art of the inventive concept, the technical solution is more complete, accurate and thorough understanding.

[0016]本发明公开了一种具有宽频高电源抑制比的线性稳压器,采用两级稳压的结构,来获得宽频高电源抑制比特性。 [0016] The present invention discloses inhibition linear regulator having a wide high-power ratio, using the structure of two regulated, to obtain a broadband high power supply rejection ratio characteristics. 其完整电路由一级电源纹波预处理器和一级低压差线性稳压器组成。 The entire circuit from a power supply ripple pre-processor and a low-dropout linear regulator composition. 其中,电源纹波预处理器由电阻分压电路、低通滤波器、电压跟随器串接组成。 Wherein the power supply ripple pre-processor of a resistor divider circuit, low-pass filter, a voltage follower connected in series composition. 通过电阻分压电路产生一个低于电源电压的基准电压VRl,经过低通滤波器,滤除电源干扰和噪声,得到具有较高稳定度纹波抑制电压VG1。 Generating a lower than the supply voltage of the reference voltage VRl through the resistor divider circuit, low-pass filter, to filter out the power of interference and noise, resulting voltages VG1 having a higher degree of stability ripple rejection. 通过电压跟随器得到与VGl数值接近的直流电压VPl,VP1最终作为低压差线性稳压器的供电电源,低压差线性稳压器通过环路控制,为负载提供稳定的电压输出V0UT,从而实现宽频纹波抑制。 To obtain close VGl value by the voltage follower current voltage VPl, VP1 eventually as low-dropout linear regulator power supply, low-dropout linear regulator via a loop control, a load with a stable output voltage VOUT, in order to achieve broadband ripple rejection. 技术方案参见图1。 Aspect Referring to FIG.

[0017]如图2所示,为了使线性稳压器获得高电源抑制比,采用了电源纹波的预处理技术。 [0017] As shown in FIG 2, in order that the linear regulator to achieve high power supply rejection ratio, using the power ripple pretreatment. 其中,第一级电源纹波预处理器由电阻分压电路、低通滤波器和电压跟随器构成。 Wherein a first stage power supply ripple pre-processor of a resistor divider circuit, low-pass filter and the voltage follower configuration. 第二级为一个低压差线性稳压器LD0。 The second stage is a low-dropout linear regulator LD0. 其中,低压差线性稳压器LDO又包含带隙基准电路(VBG)、误差放大器(AMP)、调整管、反馈电阻网络、输出耦合电容、偏置电流调整电路(IBIAS)组成。 Wherein the low-dropout linear regulator LDO turn comprises a bandgap reference circuit (VBG), an error amplifier (AMP), the regulator, the feedback resistor network, the output coupling capacitor, the bias current adjusting circuit (the IBIAS) composition.

[0018] 在第一级电源纹波预处理器中,通过由电阻Rl和R2组成的分压电路和低通滤波器LPF,获得一个相对平稳的直流电压信号VG1。 [0018] In a first stage the power supply ripple preprocessor, the voltage dividing circuit composed of resistors Rl and R2 and the low-pass filter the LPF, to obtain a relatively smooth DC voltage signal VG1. 采用电阻Rl和R2组成的电阻分压电路产生一个低于电源电压的基准电压VRl,也可以由其他类型的电路提供此基准电压VRl。 Using resistors Rl and R2 of the resistance voltage dividing circuit produce a lower than the supply voltage of the reference voltage VRl, can provide this reference voltage VRl by other types of circuitry. 该基准电压VRl再经过低通滤波器,实现高频噪声的滤除,得到平稳的纹波抑制电压VG1。 The reference voltage VRl and then through a low pass filter, implemented to filter out high frequency noise, to obtain a smooth ripple rejection voltage VG1. 纹波抑制电压VGl低于电源供电电压,其电压值由稳压电路的负载大小来决定。 Ripple Rejection voltages VGl lower than the supply voltage, the voltage value determined by the magnitude of the load voltage stabilizing circuit. 耗尽型晶体管Ml连接成电源缓冲级,纹波抑制电压VGl送至耗尽型晶体管Ml的栅极,在Ml的源极可以得到接近于纹波抑制电压VGl的较稳定的跟随电压VPl,VP1作为低压差线性稳压电路LDO的电源输入,具有较小的电源纹波。 Depletion transistor Ml is connected to the power buffer stage ripple rejection voltages VGl to the gate of a depletion type transistor Ml, the source of Ml pole can be close to the ripple rejection stable voltage VGl follows the voltage VPl, VP1 as the power input LDO circuit LDO having a smaller power supply ripple.

[0019]带隙基准电路VBG为低压差线性稳压器提供一个1.2V的基准参考电压VREF。 [0019] bandgap reference circuit VBG with low-dropout linear regulator provides a 1.2V reference the reference voltage VREF. 偏置电流产生电路IBIAS可以控制基准电流IB的大小,进而控制误差放大器AMP工作的静态功耗。 Bias current generating circuit IBIAS control the size of the reference current IB, and thus control the static power consumption of the error amplifier AMP work. 电阻R3和R4构成反馈网络,将分压VFB反馈至误差放大器AMP的正极性输入端。 Resistors R3 and R4 form a feedback network, the divided voltage VFB is fed back to the positive input terminal of the error amplifier AMP. 基准参考电压VREF和反馈电压VFB的差值经过放大后,连接到调整管M2的栅极,对输出电压VOUT进行控制。 Reference reference voltage VREF and the feedback voltage VFB difference after amplification, is connected to the gate of the adjustment transistor M2, the output voltage VOUT is controlled. 由于经过纹波抑制的直流电压VPl减小了低压差线性稳压器LDO的输入电源波动,最终可以获得宽频高电源抑制比的直流输出电压V0UT。 Because after the DC voltage VPl ripple rejection reduces the input power fluctuation LDO low-dropout linear regulator, can be obtained finally broadband high power supply rejection DC output voltage V0UT ratio. 从而使本发明的线性稳压器提供给负载的输出电压具有宽频高纹波抑制的特性。 So that the linear regulator of the present invention provides the output voltage to the load having a characteristic broadband high ripple suppression.

[0020]上面结合附图对本发明进行了示例性描述,显然本发明具体实现并不受上述方式的限制,只要采用了本发明的方法构思和技术方案进行的各种非实质性的改进,或未经改进将本发明的构思和技术方案直接应用于其它场合的,均在本发明的保护范围之内。 [0020] The above in conjunction with the accompanying drawings of the present invention has been exemplarily described, it is clear the present invention is embodied is not limited to the above embodiment, as long as using a variety of non-substantial improvements methods spirit and aspect of the present invention is carried out, or unmodified the spirit and aspect of the present invention is directly applicable to other occasions, it is within the scope of the present invention. 本发明的保护范围应该以权利要求书所限定的保护范围为准。 The invention scope of protection should be based on the claims as defined by the scope of the subject.

Claims (8)

1.一种宽频高电源抑制比的线性稳压器,其特征在于,该线性稳压器包括电源纹波预处理器和低压差线性稳压器LDO; 所述电源纹波预处理器输出与低压差稳压器LDO输入电源相连; 所述电源纹波预处理器用于产生宽频纹波抑制的直流电压VPl; 所述低压差线性稳压器LDO用于产生直流输出电压V0UT。 A broadband high power supply rejection linear regulator ratio, wherein the linear regulator comprises a power supply ripple preprocessor and the low-dropout linear regulator the LDO; preprocessor output of the power supply ripple Low dropout regulator LDO input power source is connected; said power supply ripple preprocessor for generating a DC voltage VPl broadband ripple rejection; said low-dropout linear regulator LDO for generating a DC output voltage VOUT.
2.根据权利要求1所述的宽频高电源抑制比的线性稳压器,其特征在于,所述电源波纹预处理器包括电阻分压电路、低通滤波器和电压跟随器; 所述电阻分压电路、低通滤波器、电压跟随器依次相连; 所述电阻分压器通过电阻分压电路产生一个低于电源电压的基准电压VRl; 所述低通滤波器用于滤除VRl上的电源干扰和噪声,得到纹波抑制电压VGl; 所述电压跟随器用于产生纹波抑制的直流电压VPl。 The broadband high power supply of claim 1 inhibition linear regulator ratio, wherein said power supply ripple pre-processor includes a resistance voltage dividing circuit, a low pass filter and the voltage follower claim; said resistive divider dividing circuit, a low pass filter, voltage follower sequentially connected; said resistor divider to produce a lower than the supply voltage of the reference voltage VRl by resistance dividing circuit; said low pass filter is used for power interference filter out VRl and noise, resulting ripple rejection voltage VGL; the voltage follower for generating a DC voltage VPl ripple suppression.
3.根据权利要求2所述的宽频高电源抑制比的线性稳压器,其特征在于,所述电阻分压电路通过分压获得略低于电源电压的基准电压VRl。 The broadband high power supply according to claim 2 inhibition linear regulator ratio, wherein, the resistive divider circuit to obtain slightly lower than the supply voltage of the reference voltage VRl by dividing.
4.根据权利要求3所述的宽频高电源抑制比的线性稳压器,其特征在于,所述电阻分压电路为串联电阻分压电路。 The broadband high power supply of claim 3 inhibition linear regulator ratio, wherein said resistor voltage dividing circuit is a series resistor voltage divider circuit as claimed in claim.
5.根据权利要求2所述的宽频高电源抑制比的线性稳压器,其特征在于,所述电压跟随器为采用耗尽型晶体管M1,耗尽型晶体管Ml连接成电源缓冲级,纹波抑制电压VGl送至耗尽型晶体管Ml的栅极,在Ml的源极得到接近于纹波抑制电压VGl的跟随电压VP1。 According to claim broadband high power supply of claim 2 inhibition linear regulator ratio, wherein the voltage follower is a depletion type transistor M1, a depletion mode transistor Ml is connected to the power buffer stage ripple inhibition voltage VGl to the gate of a depletion type transistor Ml, the source of Ml pole obtained close to ripple rejection voltages VGl follows the voltage VP1.
6.根据权利要求1所述的宽频高电源抑制比的线性稳压器,其特征在于,所述低压差线性稳压器LDO包括带隙基准电路VBG、误差放大器AMP、调整管、反馈电阻网络、输出耦合电容和偏置电流调整电路IBIAS;所述带隙基准电路VBG、偏置电流调整电路IBIAS分别和误差放大器AMP连接。 The broadband high power supply of claim 1 inhibition linear regulator ratio, wherein said low-dropout linear regulator LDO comprises a bandgap reference circuit VBG, an error amplifier AMP, the regulator, the feedback resistor network as claimed in claim , output coupling capacitor and the bias current adjusting circuit IBIAS; the bandgap reference circuit VBG, a bias current adjustment circuit IBIAS, respectively, and the error amplifier aMP is connected.
7.根据权利要求6所述的宽频高电源抑制比的线性稳压器,其特征在于,所述带隙基准电路VBG为低压差线性稳压器提供基准参考电压VREF;偏置电流产生电路IBIAS控制基准电流IB的大小;基准参考电压VREF和反馈电压VFB的差值经过放大后,连接到调整管M2的栅极,对输出电压VOUT进行控制;电阻R5和R6构成反馈网络,将分压VFB反馈至误差放大器AMP的正极性输入端。 The broadband high power supply according to claim 6 inhibition linear regulator ratio, wherein the bandgap reference circuit VBG provides a reference voltage reference VREF is low-dropout linear regulator; bias current generating circuit IBIAS controlling the reference current IB magnitude; the difference between the reference reference voltage VREF and the feedback voltage VFB is after amplification, is connected to the gate of the adjustment transistor M2, the output voltage VOUT is controlled; resistors R5 and R6 form a feedback network, the divided voltage VFB fed back to the positive input terminal of the error amplifier aMP.
8.根据权利要求6所述的宽频高电源抑制比的线性稳压器,其特征在于,由于经过纹波抑制的直流电压VPl减小了低压差线性稳压器LDO的输入电源波动,获得宽频高电源抑制比的直流输出电压VOUT。 The broadband high power supply according to claim 6 inhibition linear regulator ratio, characterized in that, because after the DC voltage VPl ripple rejection reduces the input power fluctuation LDO low-dropout linear regulator to obtain a broadband high power supply rejection DC output voltage VOUT ratio.
CN201610725193.6A 2016-08-25 2016-08-25 Broadband linear voltage regulator with high power supply rejection ratio CN106094966A (en)

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