CN106067487A - Integrated fan-out packaging part including dielectric medium waveguide - Google Patents
Integrated fan-out packaging part including dielectric medium waveguide Download PDFInfo
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- CN106067487A CN106067487A CN201610250235.5A CN201610250235A CN106067487A CN 106067487 A CN106067487 A CN 106067487A CN 201610250235 A CN201610250235 A CN 201610250235A CN 106067487 A CN106067487 A CN 106067487A
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- 238000004806 packaging method and process Methods 0.000 title description 15
- 230000005540 biological transmission Effects 0.000 claims abstract description 80
- 238000000034 method Methods 0.000 claims abstract description 39
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 239000010410 layer Substances 0.000 claims description 56
- 239000003989 dielectric material Substances 0.000 claims description 38
- 239000002184 metal Substances 0.000 claims description 34
- 229910052751 metal Inorganic materials 0.000 claims description 34
- 239000000206 moulding compound Substances 0.000 claims description 16
- 238000000465 moulding Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims description 3
- 239000013047 polymeric layer Substances 0.000 description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 20
- 239000000463 material Substances 0.000 description 17
- 230000008878 coupling Effects 0.000 description 15
- 238000010168 coupling process Methods 0.000 description 15
- 238000005859 coupling reaction Methods 0.000 description 15
- 229920002120 photoresistant polymer Polymers 0.000 description 13
- 230000008569 process Effects 0.000 description 12
- 239000000377 silicon dioxide Substances 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 10
- 239000004020 conductor Substances 0.000 description 10
- 238000000151 deposition Methods 0.000 description 10
- 238000000059 patterning Methods 0.000 description 9
- 229920002577 polybenzoxazole Polymers 0.000 description 9
- 229920000642 polymer Polymers 0.000 description 9
- 230000005670 electromagnetic radiation Effects 0.000 description 8
- 238000007747 plating Methods 0.000 description 8
- 239000004642 Polyimide Substances 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 7
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 6
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 6
- 230000005611 electricity Effects 0.000 description 6
- 239000007791 liquid phase Substances 0.000 description 6
- 229910002370 SrTiO3 Inorganic materials 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 5
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000000926 separation method Methods 0.000 description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 230000000644 propagated effect Effects 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 229910016341 Al2O3 ZrO2 Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910003070 TaOx Inorganic materials 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 229910052593 corundum Inorganic materials 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 229920002313 fluoropolymer Polymers 0.000 description 3
- 239000004811 fluoropolymer Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 229920000636 poly(norbornene) polymer Polymers 0.000 description 3
- 229920001296 polysiloxane Polymers 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- -1 siloxanes Chemical class 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 description 2
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 2
- 241000209094 Oryza Species 0.000 description 2
- 235000007164 Oryza sativa Nutrition 0.000 description 2
- 229910020286 SiOxNy Inorganic materials 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 238000006116 polymerization reaction Methods 0.000 description 2
- 235000009566 rice Nutrition 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(IV) oxide Inorganic materials O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 239000001117 sulphuric acid Substances 0.000 description 2
- 235000011149 sulphuric acid Nutrition 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 125000005396 acrylic acid ester group Chemical group 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 150000002466 imines Chemical class 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 238000001429 visible spectrum Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
- H01L31/14—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices
- H01L31/147—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the light source or sources being controlled by the semiconductor device sensitive to radiation, e.g. image converters, image amplifiers or image storage devices the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0232—Optical elements or arrangements associated with the device
- H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention discloses a kind of semiconductor structure and method.Semiconductor structure includes: dielectric medium waveguide, is vertically set between ground floor and the second layer；Driver tube core, is configured at the first output node generate drive signal；First transmission electrode, the first side along dielectric medium waveguide is placed and is configured to receive the driving signal from the first output node；First receptor electrode, the first side along dielectric medium waveguide is placed；And receptor tube core, it is configured to receive from the first signal receiving electrode reception.
Description
Cross reference to related applications
The application is JIUYUE in 2014 submission, the part continuation application of the 14/483rd, No. 247 U. S. application on the 11st, and it is complete
Portion's content is hereby expressly incorporated by reference.
Technical field
This patent disclosure relates generally to semiconductor applications, more particularly, to integrated light guide.
Background technology
Integrated light guide is typically used as the assembly in integrated optical circuit, the integrated multiple photonic functions of integrated optical circuit.Integrated light wave
Lead in the case of there is minimal attenuation, by the light first restriction from integrated chip (IC) and guide to IC the
2 points.Generally, integrated light guide provides function for the signal being positioned in the optical wavelength in visible spectrum.
Summary of the invention
According to an aspect of the invention, it is provided a kind of semiconductor structure, including: dielectric medium waveguide, it is vertically set on
Between ground floor and the second layer；Driver tube core, is configured at the first output node generate drive signal；First transmission electricity
Pole, the first side along described dielectric medium waveguide is placed and is configured to receive and drives from described in described first output node
Dynamic signal；First receives electrode, and the first side along described dielectric medium waveguide is placed；And receptor tube core, it is configured to connect
Receive and receive, from described first, the signal received at electrode.
Preferably, this semiconductor structure also includes: moulding layer, around the driver tube core being positioned on protective layer and receptor
Tube core；Wherein, described ground floor is arranged on described moulding layer.
Preferably, this semiconductor structure also includes: the second transmission electrode, and the second side along described dielectric medium waveguide is placed
And it is electrically coupled to transmission ground.
Preferably, described first transmission electrode includes being arranged on the first metal structure above described dielectric medium waveguide, and
And described second transmission electrode includes being arranged on the second metal structure above described dielectric medium waveguide；And wherein, described
One transmission electrode and described second transmission electrode are mirror image.
Preferably, this semiconductor structure also includes: second receives electrode, and the second side along described dielectric medium waveguide is placed
And it is electrically coupled to receive ground.
Preferably, described first receives electrode includes being arranged on the first metal structure above described dielectric medium waveguide, and
And described second receive electrode include being arranged on the second metal structure above described dielectric medium waveguide；And wherein, described
It is mirror image that one reception electrode and described second receives electrode.
Preferably, this described dielectric medium waveguide includes having bigger than the dielectric constant of described ground floor and the described second layer
The dielectric material of dielectric constant.
Preferably, this described dielectric medium waveguide includes polyimides or polybenzoxazoles.
Preferably, this described dielectric medium waveguide includes silicon nitride or silicon dioxide.
Preferably, this described dielectric medium waveguide includes at least one of following material: ZrO2、Al2O3、HfOx、HfSiOx、
ZrTiOx、TiO2And TaOx。
Preferably, this described dielectric medium waveguide includes SrTiO3Dielectric medium or ZrO2-Al2O3-ZrO2Composite dielectric structure.
According to a further aspect in the invention, it is provided that a kind of semiconductor structure, including: dielectric medium waveguide, it is arranged on first
Between dielectric material and the second dielectric material and there is essentially rectangular cross section；The first metal layer, along described dielectric medium
First side of waveguide is arranged；And second metal level, the second side along described dielectric medium waveguide is arranged；Wherein, described second
Dielectric material is arranged on moulding layer, and described moulding layer is around driver tube core and receptor tube core.
Preferably, this first transmission electrode and first receives electrode and is arranged in described the first metal layer, and described first passes
Transmission pole coupled to described driver tube core, and described first reception electrode coupled to described receptor tube core；And second
Transmission electrode and second receives electrode and is arranged in described second metal level, and described second transmission electrode coupled to transmission ground, and
And described second receive electrode coupled to receive ground.
Preferably, from the width of this described dielectric medium waveguide transitional region under being positioned at described first transmission electrode
One width is gradually decrease to the second width, and the first narrow width described in described second width ratio.
Preferably, this described dielectric medium waveguide includes having than described first dielectric material and described second dielectric material
The dielectric material of the dielectric constant that dielectric constant is big.
Preferably, this semiconductor structure also includes: more than first transmission electrode, is arranged in described dielectric medium waveguide
In the described the first metal layer in face and coupled to multiple output nodes of driver tube core；And more than second transmission electrode,
It is arranged in described second metal level below described dielectric medium waveguide Nei and coupled to transmission ground.
According to another aspect of the invention, it is provided that a kind of method, including: driver tube core and receptor tube core are adhered to
In an enclosure；Application moulding compound is with around described driver tube core and described receptor tube core；In described driver tube core, institute
State formation ground floor above receptor tube core and described moulding compound；Form dielectric waveguide on the first layer；And described
The second layer is formed in dielectric medium waveguide.
Preferably, the method also includes: forming the first transmission electrode, described first transmission electrode is along described dielectric medium ripple
The first side led is placed；Forming the second transmission electrode, described second transmission electrode is put along the second side of described dielectric medium waveguide
Put and be electrically coupled to transmission ground；And wherein, described driver tube core includes being configured to provide to described transmission signal
The output node of the first transmission electrode.
Preferably, the method also includes: forming the first reception electrode, described first receives electrode along described dielectric medium ripple
The first side led is placed；Forming the second reception electrode, described second reception electrode is put along the second side of described dielectric medium waveguide
Put and be electrically coupled to receive ground；And wherein, described receptor tube core is configured to reception and connects from described first reception electrode
The signal received.
Preferably, the method also includes: pattern described ground floor to form more than first opening；At described more than first
Form the first metal material in opening and receive electrode to form described second transmission electrode and described second；Patterning is positioned at described
Ducting layer on ground floor is to form dielectric medium waveguide openings；In described dielectric medium waveguide openings formed waveguide dielectric material with
Form described dielectric medium waveguide；The second layer that patterning is positioned on described ducting layer is to form more than second opening；And institute
Form the second metal material in stating more than second opening and receive electrode to form described first transmission electrode and described first.
Accompanying drawing explanation
When reading in conjunction with the accompanying drawings, each side of the present invention can be best understood by according to the following detailed description
Face.It should be noted that, according to the standard practices in industry, various parts are not drawn to scale.It practice, in order to clearly beg for
Opinion, the size of various parts can be arbitrarily increased or reduce.
Figure 1A is the schematic diagram of the semiconductor structure according to some embodiments of the present invention.
Figure 1B is three-dimensional (3D) view of the semiconductor structure shown in the Figure 1A according to some embodiments of the present invention.
Fig. 2 is the side view of the semiconductor structure of some other the embodiment according to the present invention.
Fig. 3 is the top view of the semiconductor structure shown in the Fig. 2 according to some embodiments of the present invention.
Fig. 4 is the integrated fan that the formation according to some embodiments of the present invention includes the semiconductive pieces structure shown in Figure 1A
Go out the flow chart of the method 400 of (InFO) packaging part.
Fig. 5 to Figure 24 be according to some embodiments of the present invention in the different phase of manufacturing process, including in Figure 1A
The sectional view of integrated fan-out (InFO) packaging part of shown semiconductor structure.
Detailed description of the invention
Disclosure below provides many different embodiments or examples, for realizing the different characteristic of provided theme.
The instantiation of assembly explained below and layout is to simplify the present invention.Certainly, these are only examples and are not intended to limit this
Invention.Such as, in the following description, above second component or on form first component and can include first component and second
The embodiment that part directly contacts, it is also possible to include that the optional feature being formed between first component and second component makes first
The embodiment that part and second component are not directly contacted with.And, the present invention in various embodiments can be with repeat reference numerals and/or word
Female.This repetition is merely to concisely with clear, himself be not offered as between each embodiment and/or the configuration discussed
Relation.
The term used in this specification is generally of it and in the art and is using the concrete of each term
Its ordinary meaning in content.The example used in this specification, including the example of any term discussed in this article, is only example
Property, and it is in no way intended to limit the present invention's or any exemplary term scope and meaning.Equally, the invention is not restricted to this theory
Each embodiment be given in bright book.
Although can use herein term " first ", " second " etc. to describe each element, but these elements should be by
These terms limit.These terms are for differentiating an element with another element.Such as, at the model without departing substantially from the present invention
In the case of enclosing, the first element can be called the second element, and it is likewise possible to the second element is called the first element.
As it is used herein, term "and/or" includes any of one or more listed associated item and all of combination.
Additionally, for the ease of describing, can use such as herein " in ... lower section ", " ... below ", " bottom ",
" ... above ", the spatial relationship term on " top " etc., to describe an element or parts and another element as illustrated in the drawing
Or the relation of parts.In addition to the orientation shown in figure, spatial relationship term is intended to include that device is using or in operating process
Different azimuth.Device can otherwise position (90-degree rotation or in other orientation), and sky used herein
Between relationship description symbol can the most correspondingly explain.
In this article, term " couples " and can also be referred to as " electric coupling ", and term " connects " and can be referred to as " being electrically connected
Connect "." couple " and " connection " can be used for indicating two or more element to cooperate or interact.
Figure 1A is the schematic diagram of the semiconductor structure 100 according to some embodiments of the present invention.Figure 1B is according to the present invention
Some embodiments Figure 1A shown in three-dimensional (3D) view of semiconductor structure 100.As Figure 1A and Figure 1B exemplarily shows
Going out, semiconductor structure 100 includes being configured to the dielectric medium waveguide 101 of transmitting signal, drive circuit 102 and acceptor circuit
112.In certain embodiments, the signal propagated by dielectric medium waveguide 101 is single-ended signal.Other embodiments at some
In, the signal propagated by dielectric medium waveguide 101 is differential signal.
In certain embodiments, drive circuit 102 is configured to receive input signal SIN, and at output node
Output transmission signal S1 at 1021.By the way of transmission line 103, transmission signal S1 is provided to transmission coupling element 105.?
In some embodiments, such as, transmission coupling element 105 includes a pair metal being arranged on the opposite side of dielectric medium waveguide 101
Structure, such as, include micro-strip.In order to illustrate, transmission coupling element 105 includes the biography being positioned on the opposite side of dielectric medium waveguide 101
Transmission pole 104 and 106.In certain embodiments, transmission electrode 104 and 106 is symmetrical relative to dielectric medium waveguide 101.At some
In embodiment, the shape of transmission electrode 104 and 106 and/or pattern are mirror image.
For the explanation in Figure 1A, transmission electrode 104 is placed in the first side (such as, upside) along dielectric medium waveguide 101.
In certain embodiments, transmission electrode 104 is set in metal interconnecting layer the end face along dielectric medium waveguide 101, and quilt
It is configured to receive the transmission signal S1 from drive circuit 102.
By the way of transmission line 103, transmission electrode 104 is connected to drive circuit 102, wherein transmission line 103 be from
The transmission signal S1 of drive circuit 102 to transmission electrode 104 provides wide bandwidth transmission.In certain embodiments, transmission electrode
104 are included in transmission line 103.
Transmission electrode 106 is placed in the second side (such as, downside) along dielectric medium waveguide 101.In certain embodiments, pass
Transmission pole 106 is set to the bottom surface in another metal interconnecting layer along dielectric medium waveguide 101, and is connected to earth terminal
107a。
Dielectric medium waveguide 101 is configured to transmit to receptor coupling element 109 transmission signal S1.Dielectric medium waveguide
101 are arranged in interlayer dielectric (ILD) material, and dielectric medium waveguide 101 includes having more normal than the dielectric of the ILD material of surrounding
The dielectric material of the dielectric constant that number (or dielectric constant) is big.
In certain embodiments, receptor coupling element 109 includes be arranged on the opposite side of dielectric medium waveguide 101 one
To metal structure, including micro-strip.In order to illustrate, receptor coupling element 109 includes being positioned on the opposite side of dielectric medium waveguide 101
Reception electrode 108 and 110.In certain embodiments, electrode 108 and 110 is received symmetrical relative to dielectric medium waveguide 101.?
In some embodiments, the shape and/or the pattern that receive electrode 108 and 110 are mirror image.
The first side (such as, upside) along dielectric medium waveguide 101 is placed and is received electrode 108.In certain embodiments, connect
Receive in electrode 108 arranges the metal interconnecting layer of transmission electrode 104 wherein and receive electrode and set along the end face of dielectric medium waveguide 101
Putting, and be configured to receive the signal S1' from dielectric medium waveguide 101, this signal is equivalent to transmit signal S1.Receive electrode
108 are connected to acceptor circuit 112 by the way of transmission line 111.Transmission line 111 is from receiving electrode 108 to receptor electricity
The reception signal S1' on road 112 provides wide bandwidth transmission.
The second side (such as, downside) along dielectric medium waveguide 101 is placed and is received electrode 110.In certain embodiments, connect
Receive electrode 110 and the interior bottom surface setting along dielectric medium waveguide 101 of metal interconnecting layer of transmission electrode 106 is set wherein, and
It is connected to earth terminal 107b.
First pair of metal structure is with interval S and second pair of metal structure lateral separation, so that upper electrode 104 He
108 and lower electrode 106 and 110 be discrete along the length of dielectric medium waveguide 101.In certain embodiments, interval S
At the order of magnitude of several microns to tens of milliseconds.
In certain embodiments, acceptor circuit 112 is configured to receive received signal S1', and at output joint
Output signal output SOUT at point 1121.By the way of transmission line 111, transmit the reception from receptor coupling element 109 believe
Number S1'.
The dielectric medium waveguide 101 with bigger dielectric constant makes the electromagnetic radiation introduced in dielectric medium waveguide 101 pass through
Total internal reflection and be limited in dielectric medium waveguide 101 so that electromagnetic radiation from drive circuit 102 be directed to receive circuit
112.In certain embodiments, dielectric medium waveguide 101 includes silicon nitride (SiN) or carborundum (SiC).In certain embodiments,
Dielectric medium waveguide 101 includes room temperature (e.g., 25 DEG C) liquid phase height K polymer, it may for example comprise polyimides (PI), polybenzoxazoles
(PBO) etc..In other some embodiments, dielectric medium waveguide 101 includes room temperature or low temperature (e.g., less than 250 DEG C) liquid phase
SiO2Or spin-coating glass (SOG), its dielectric constant is more than or equal to about 4.In other some embodiments, dielectric medium waveguide
101 include liquid phase SiNxOr other high-k dielectrics.At some in other embodiment, dielectric medium waveguide 101 includes that low temperature is (e.g.,
180 DEG C) chemical vapor deposition is (such as, including atmospheric pressure CVD (APCVD), sub-atmospheric pressure CVD (SACVD), plasma enhancing
CVD (PECVD), metallorganic CVD (MOCVD) etc.) SiO2(CVD-SiO2)、SiNxOr SiOxNyDeposition.Other
In some embodiments, dielectric medium waveguide 101 includes: low temperature (e.g., 210 DEG C) high-k dielectrics deposits, it may for example comprise ZrO2-
Al2O3-ZrO2(ZAZ)；Or other high-k dielectrics deposition, it may for example comprise ZrO2、Al2O3、HfOx、HfSiOx、ZrTiOx、TiO2、
TaOxDeng.In other some embodiments, dielectric medium waveguide 101 includes the SrO (ALD-SrO) mixing ald and changes
Learn the RuO of gas deposition2(CVD-RuO2).Such as, at some in other embodiment, dielectric medium waveguide 101 includes SrTiO3
(STO) dielectric layer.
Provide previous materials for illustrative purposes.The various materials of dielectric medium waveguide 101 are all considered in the present invention
In the range of.
In certain embodiments, ILD material includes silicon dioxide (SiO2).In other embodiments, ILD material includes low
K dielectric material, it may for example comprise the silicon dioxide of doped with fluorine, the doping silicon dioxide of carbon, porous silica or similar material
Material.
Fig. 2 is the side view of the semiconductor structure 100 according to some embodiments of the present invention.In certain embodiments, it is situated between
Electricity matter waveguide 101 includes one or more tapering points with the width w successively decreased along direction 216.In other words, along transition region
The length in the direction 218 in territory, width is decreased to the second narrower width from the first width.Such as, dielectric medium waveguide 101 includes
One tapering point and the second tapering point, the first tapering point has the width reduced along with transitional region 212, and the second tapering point
There is the width reduced along with transitional region 214.
The tapering point of dielectric medium waveguide 101 is configured to reduce electrode 104 and/or electrode 108 and dielectric medium waveguide
The reflection of the radiation between 101 improves efficiency, and wherein, by the tapering point of dielectric medium waveguide 101, electromagnetic radiation is coupling in electricity
Between pole 104 and/or electrode 108 and dielectric medium waveguide 101.In order to illustrate, tapering transition zone changes electromagnetic radiation and dielectric
The angle that the sidewall of matter waveguide interacts.Accordingly, because total internal reflection is electromagnetic radiation incidence angle from the teeth outwards
Function, so the coupling of the electromagnetic radiation added between electrode 104 and/or electrode 108 with dielectric medium waveguide 101.
Fig. 3 is the top view of the semiconductor structure shown in the Fig. 2 according to some embodiments of the present invention.Fig. 3 is exemplary
The semiconductor structure 100 that illustrates include being configured to the integrated dielectric medium waveguide 101a of propagated in parallel electromagnetic radiation extremely
101c。
In certain embodiments, semiconductor structure 100 include being arranged on drive circuit 102 and acceptor circuit 112 it
Between dielectric medium waveguide 101a to 101c.In certain embodiments, dielectric medium waveguide 101a to 101c cloth the most parallel to each other
Put.In certain embodiments, dielectric medium waveguide 101a to 101c is adjacent to each other.At some in other embodiment, dielectric medium ripple
Lead 101a to 101c to be spatially separated from each other.
Drive circuit 102 includes the driver element 102a to 102c being configured to generate the separation of the signal of telecommunication.
The signal of telecommunication provides parallel to transmission electrode 104a to 104c, and the signal of telecommunication is coupled to propagated in parallel as electromagnetic radiation by transmission electrode
In the dielectric medium waveguide 101a to 101c of signal.Due to signal of telecommunication parallel transmission, so by dielectric medium waveguide 101a to 101c
In each propagate signal more by a small margin, thus further reduce transmission electrode 104a to 104c and dielectric medium waveguide
Loss between 101a to 101c.In other words, by driver element 102a to 102c output and by receiver element 112a extremely
The signal more by a small margin that 112c receives makes to transmit coupling element 105 and receptor coupling element 109 has less loss.
As Fig. 3 is exemplarily illustrated, in certain embodiments, electrode 104a to 104c and/or electrode 108a to 108c is also
Have or there is tapered width alternatively, with further increase transmission coupling element 105 and/or receptor coupling element 109 with
Coupling efficiency between dielectric medium waveguide 101.In such an embodiment, electrode 104a to 104c and electrode 108a to 108c has
The width reduced along with transitional region 312 and 314.In certain embodiments, electrode 104a to 104c and electrode 108a to 108c
The length of tapered width different.In other words, compared with the tapered width of dielectric medium waveguide 101, electrode 104a to 104c and/or
Electrode 108a to 108c has various sizes of transitional region.
Fig. 4 is that the formation according to some embodiments of the present invention includes the integrated of the semiconductor structure 100 shown in Figure 1A
The flow chart of the method 400 of fan-out (InFO) packaging part.In order to be more fully understood that the present invention, referring to figs. 1 to partly leading shown in Fig. 3
Body structure 100 carrys out discussion method 400, but is not limited to this.
In order to illustrate, come together to describe semiconductor structure 100 in Fig. 1 to Fig. 3 by method 400 and Fig. 5 to Figure 24
Manufacturing process.Fig. 5 to Figure 24 be according to some embodiments of the present invention in the different phase of manufacturing process, including in Figure 1A
The sectional view of integrated fan-out (InFO) packaging part 500 of shown semiconductor structure.Although describing Fig. 5 together with method 400 extremely
Figure 24, it will be understood that the structure disclosed in Fig. 5 to Figure 24 is not restricted to method 400.At some in other embodiment, collection
Fan-out (InFO) packaging part 500 is become to include semiconductor structure as shown in Figure 2 to Figure 3.
Although herein disclosed method being shown and described as a series of step or event, but it is to be understood that institute
These steps illustrated or the order of event should not be construed as limited significance.Such as, some steps can occur with different order
And/or occur with other steps in addition to illustrated herein and/or described step or event or event simultaneously.It addition, not
Require all steps illustrated all for implementing one or more aspects described herein or embodiment.Additionally, can be at one
Or the step of multiple separation and/or perform the one or more of step described herein in the stage.
With reference to the method 400 of Fig. 4, in act 410, as shown in Figure 5, it is provided that carrier 601, adhesive layer 602 and polymer
Basic unit 603.
In certain embodiments, carrier 601 includes that glass, pottery or other suitable materials are with shape in device package
Structure is provided to support during becoming all parts.In certain embodiments, it is provided above adhesive layer 602 (such as, bag at carrier 601
Include glue-line, photothermal deformation (LTHC) coating, ultraviolet (UV) film etc.).By adhesive layer 602, polymeric base layer 603 is coated in load
On body 601.In certain embodiments, polymeric base layer 603 is by polybenzoxazoles (PBO), aginomoto laminated film (ABF), polyamides
Imines, benzocyclobutene (BCB), welding resistance (SR) film, tube core coherent film (DAF) etc. are formed, but the invention is not restricted to this.
With reference to the method 400 of Fig. 4, in operation S420, as shown in Figure 6, subsequently, form dorsal part redistributing layer (RDL)
604.In certain embodiments, RDL 604 includes the conductive component 6041 being formed in one or more polymeric layer, such as,
Including wire and/or through hole.In certain embodiments, polymeric layer can use and such as include appointing of spin coating technique, sputtering etc.
What suitably method by any suitable material (such as, including PI, PBO, BCB, epoxy resin, silicones, acrylate, receive
Rice fills phenol resin, siloxanes, fluoropolymer, polynorbornene etc.) formed.
In certain embodiments, conductive component 6041 is formed in polymeric layer.The formation bag of this conductive component 6041
Include patterned polymer layer (such as, use photoetching and the combination of etch process) and being formed in the polymeric layer of patterning to lead
Electricity parts 6041 (such as, deposition crystal seed layer and use mask layer are to limit the shape of conductive component 6041).Design conductive component
6041 to form functional circuit and the input/output component for the tube core with postadhesion.
It follows that in operation S430, as it is shown in fig. 7, above dorsal part RDL 604 and carrier 601, form patterning
Photoresist 605.In certain embodiments, such as, photoresist 605 is deposited as the blanket layer above dorsal part RDL 604.Connect down
Come, use photomask (not shown) to carry out each several part of exposure photo-etching glue 605.Then, according to using negativity or positivity anti-
Exposure or unexposed part in photoresist 605 are removed in erosion agent.The photoresist 605 of obtained patterning includes being arranged on load
Opening 606 at the outer peripheral areas of body 601.In certain embodiments, opening 606 also exposes the conductive part in dorsal part RDL 604
Part 6041.
It follows that in operation S440, as shown in Figure 8, crystal seed layer 607 is deposited on the photoresist 605 of patterning.
It follows that in operation S450, as it is shown in figure 9, fill with conductive material 608 (such as, including copper, silver, gold etc.)
Opening 606, to form conductive through hole.In certain embodiments, shikishima plating process (such as, including electrochemical plating, electroless plating etc.)
Period, opening 606 is plated with conductive material 608.In certain embodiments, filling opening 606 crossed by conductive material 608, and holds
Row grinds and chemically-mechanicapolish polishes (CMP) technique and removes the unnecessary portion being positioned at above photoresist 605 of conductive material 608
Point.
It follows that in operation S460, as shown in figure 11, remove photoresist 605.In certain embodiments, use wait from
Daughter ashing or wet stripping technology remove photoresist 605.In certain embodiments, after plasma ash process be
Sulphuric acid (H2SO4Immersion in) is to clean packaging part 500 and to remove remaining Other substrate materials.
Therefore, above dorsal part RDL 604, conductive through hole 609 is formed.Alternatively, in certain embodiments, such as, utilize
Conductive plugs or include that the conductive lead wire of copper, gold or silver wire is to replace conductive through hole 609.In certain embodiments, conductive through hole
609 are spaced apart from each other by opening 610, and at least one opening 610 between neighbouring conductive through hole 609 sufficiently large with
It is provided with one or more semiconductor element.
It follows that in operation S470, as shown in figure 12, driver tube core 611A and receptor tube core 611B install and
It is attached to packaging part 500.In order to illustrate, as it can be seen, device package 500 includes carrier 601 and has conductive component
The dorsal part redistributing layer 604 of 6041.In certain embodiments, such as, also include other interconnection structures, such as, include being electrically connected to
The conductive through hole 609 of the conductive component 6041 in dorsal part RDL 604.In certain embodiments, adhesive layer is for by actuator tube
Core 611A and receptor tube core 611B is fixed to dorsal part RDL 604.
It follows that in operation S480, as shown in figure 13, by driver tube core 611A and receptor pipe in opening 610
Core 611B installs after dorsal part RDL 604, and moulding compound 612 is formed in packaging part 500.
Distribution moulding compound 612 leads to the gap between filling driver tube core 611A and conductive through hole 609, neighbouring conduction
The gap between gap and receptor tube core 611B and conductive through hole 609 between hole 609.In certain embodiments, molding
Material 612 can include any suitable material of such as epoxy resin, molded bottom implant etc..In certain embodiments, pressure
Contracting molding, transfer molding and liquid sealant molding are the suitable methods for forming moulding compound 612, but the present invention does not limits
In this.Such as, moulding compound 612 distributes in liquid form at driver tube core 611A, receptor tube core 611B and conductive through hole 609
Between.Subsequently, curing process is performed to solidify moulding compound 612.In certain embodiments, the filling of moulding compound 612 is overflowed and is driven
Device tube core 611A, receptor tube core 611B and conductive through hole 609, so that moulding compound 612 covers driver tube core 611A, connects
Receive device tube core 611B and the end face of conductive through hole 609.
It follows that in operation S490, as shown in figure 14, perform to grind and chemically-mechanicapolish polish (CMP) technique to remove
The redundance of moulding compound 612, and return lap plastics 612 to reduce its gross thickness and therefore to expose conductive through hole 609.
Because obtained structure includes the conductive through hole 609 extending through moulding compound 612, so conductive through hole 609 is also
It is referred to as moulding through hole, internal run-through hole (TIV) etc..In packaging part 500, conductive through hole 609 provides to dorsal part RDL's 604
Electrical connection.In certain embodiments, the reduction process being used for exposing conductive through hole 609 is additionally operable to expose conductive pole 6111A and lead
Electricity post 6111B.
It follows that in operation S500, as shown in figure 15, on moulding compound 612, formation has the poly-of the patterning of opening
Compound layer 613.
In certain embodiments, polymeric layer 613 includes PI, PBO, BCB, epoxy resin, silicones, acrylate, receives
Rice fills phenol resin, siloxanes, fluoropolymer, polynorbornene etc..In certain embodiments, polymeric layer 613 selectivity
Ground is exposed to the etchant being configured to etching polymer layer 613 to form opening, it may for example comprise CF4、CHF3、C4F8, HF etc..
Illustrating to example as shown, these openings expose conductive pole 6111A and 6111B and conductive through hole 609.In some embodiments
In, these openings include one or more through hole and metal lead wire groove above.Through hole is from the plane perpendicular of polymeric layer 613
Extending to the bottom surface of metal valley, metal valley extends to the end face of polymeric layer 613.
In certain embodiments, illustrating to example as shown, opening is filled with conductive material.Such as, crystal seed layer (does not shows
Go out) formed in the opening, and use electrochemical plating technique, electroless plating etc. by conductive material plating in the opening.Such as figure
Be exemplarily illustrated, the obtained through hole being positioned in polymeric layer 613 be electrically connected to conductive pole 6111A, conductive pole 6111B or
Conductive through hole 609, and lower transfer electrode 106 and bottom receive electrode 110 and be formed in polymeric layer 613.Real at some
Executing in example, patterned polymer layer 613 is to form opening, and metal material is formed in opening to form lower transfer electrode
106 and bottom receive electrode 110.In certain embodiments, transmission electrode 106 is electric with reception by the way of polymeric layer 613
Pole 110 lateral separation.Lower transfer electrode 106 and bottom receive electrode 110 respectively by conductive through hole 609 and dorsal part RDL
604 are coupled electrically to ground.In certain embodiments, such as, by the way of depositing operation, the conductive material including copper is deposited, as above
Described, carry out shikishima plating process and CMP subsequently, therefore to succinctly omit detailed description.
It follows that in operation s 510, as shown in figure 16, polymeric layer 613 forms waveguide dielectric material 614.?
In some embodiments, waveguide dielectric material 614 include polymeric layer than surrounding (such as, including polymeric layer 613 and 616 (as
Shown in Figure 21)) higher dielectric constant.In certain embodiments, such as, by including the gas deposition of PVD, CVD or PECVD
Waveguide dielectric material 614 is formed the thickness to overlying polymer layer 613 by the mode of technology.In certain embodiments, use is ground
Mill and chemically mechanical polishing (CMP) technique remove the redundance of waveguide dielectric material 614.
In certain embodiments, waveguide dielectric material 614 includes room temperature (e.g., 25 DEG C) liquid phase height K polymer, such as, bag
Include PBO, PI etc..At some in other embodiment, waveguide dielectric material 614 includes room temperature or low temperature (e.g., less than 250 DEG C) liquid
Phase SiO2Or spin-coating glass (SOG), its dielectric constant is more than or equal to about 4.At some in other embodiment, waveguide dielectric
Material 614 includes liquid phase SiNxOr other high-k dielectrics.At some in other embodiment, waveguide dielectric material 614 includes low
Temperature (e.g., 180 DEG C) chemical vapor deposition is (such as, including atmospheric pressure CVD (APCVD), sub-atmospheric pressure CVD (SACVD), plasma
Body strengthen CVD (PECVD), metallorganic CVD (MOCVD) etc.) SiO2(CVD-SiO2)、SiNxOr SiOxNyDeposition.?
In some other embodiment, waveguide dielectric material 614 includes: low temperature (e.g., 210 DEG C) high-k dielectrics deposits, it may for example comprise
ZrO2-Al2O3-ZrO2(ZAZ)；Or other high-k dielectrics deposition, it may for example comprise ZrO2、Al2O3、HfOx、HfSiOx、ZrTiOx、
TiO2、TaOxDeng.At some in other embodiment, waveguide dielectric material 614 includes the SrO (ALD-mixing ald
And chemical vapor deposited RuO SrO)2(CVD-RuO2).Such as, at some in other embodiment, waveguide dielectric material 614 wraps
Include SrTiO3(STO) dielectric layer.
Provide previous materials for illustrative purposes.The various materials of waveguide dielectric material 614 are all considered in the present invention
In the range of.
It follows that after deposition, photoetching and/or etch process is used to pattern waveguide dielectric material 614 to be formed
Dielectric medium waveguide 101.In order to illustrate, in operation S520, above waveguide dielectric material 614, form the photoresist of patterning
605b。
It follows that use photomask (not shown) to carry out each several part of exposure photo-etching glue 605b.Then, negative according to using
Property or positive corrosion-resisting agent remove in photoresist 605b exposure or unexposed part.As shown in figure 17, obtained pattern
The photoresist 605b changed includes the part being arranged on transmission electrode 106 and receiving between electrode 110.
It follows that in operation S530, as shown in figure 18, perform etch process to remove the sudden and violent of waveguide dielectric material 614
Dew part.In certain embodiments, etch process includes that reactive ion etches (RIE), but the invention is not restricted to this.
It follows that in operation S540, as shown in figure 19, remove photoresist 605b.In certain embodiments, use wait from
Daughter ashing or wet stripping technology remove photoresist 605b.In certain embodiments, after plasma ash process it is
At sulphuric acid (H2SO4Immersion in) is to clean packaging part 500 and to remove remaining Other substrate materials.
It follows that in operation s 550, as shown in figure 20, on polymeric layer 613, formation has the patterning of opening
Polymeric layer 615.In certain embodiments, polymeric layer 615 includes PI, PBO, BCB, epoxy resin, silicones, acrylic acid
Ester, nano-filled phenol resin, siloxanes, fluoropolymer, polynorbornene etc..In certain embodiments, polymeric layer 615 selects
Selecting property it is exposed to the etchant being configured to etching polymer layer 615 to form opening, it may for example comprise CF4、CHF3、C4F8、
HF etc..In certain embodiments, opening includes one or more through hole and metal lead wire groove above.Through hole is from polymeric layer
The plane perpendicular of 615 extends to the bottom surface of metal valley, and metal valley extends to the end face of polymeric layer 615.
In certain embodiments, conductive material is utilized to fill opening.In order to illustrate, such as, crystal seed layer (not shown) is formed
In the opening, and use electrochemical plating technique, electroless plating etc. by conductive material plating in the opening.Example ground as shown
Illustrating, the obtained through hole being positioned in polymeric layer 615 is electrically connected to conductive pole 6111A, conductive pole 6111B or conductive through hole
609.In certain embodiments, such as, by the way of depositing operation, the conductive material including copper is deposited, as it has been described above, subsequently
Carry out shikishima plating process and CMP, therefore to succinctly omit detailed description.
In certain embodiments, as shown in figure 21, above polymeric layer 615, formation has of conductive component or many
Individual additional polymeric layer 616.In operation S560, polymeric layer 616 forms the RDL with conductive component.At some
In embodiment, RDL includes the conductive component being arranged between each polymeric layer.Illustrate to example as shown, at polymeric layer
Form top transmission electrode 104 in 616 and top receives electrode 108.In certain embodiments, patterned polymer layer 616 with
Form opening, and metal material is formed at, and opening is interior receives electrode 108 with formation top transmission electrode 104 and top.One
In a little embodiments, transmission electrode 104 is by the way of polymeric layer 616 and receives electrode 108 lateral separation.
Illustrating to example as shown, in certain embodiments, driver tube core 611A and driver tube core 611B leads to respectively
Cross the conductive component in RDL and be electrically connected to top transmission electrode 104 and top reception electrode 108.Driver tube core 611A passes through
Conductive pole 6111A and conductive through hole are electrically connected to top transmission electrode 104.Receptor tube core 611B by conductive pole 6111B and
Conductive through hole is electrically connected to top and receives electrode 108.In certain embodiments, in component and formation process, it is formed at polymerization
RDL in nitride layer is substantially similar with tested RDL 604, therefore to succinctly omit detailed description.
It follows that in operation S570, as shown in figure 22, then form Underbump metallization portion (UBM) 618 with by polymerization
RDL in nitride layer 616 is electrically connected to lower transfer electrode 106 and bottom receives electrode 110, and above polymeric layer 616
Form polymeric layer 617.As shown in figure 23, then formation is configured as input to/exports the joint outer part 619A of (I/O) pad
And 619B, it may for example comprise it is positioned at the solder ball in Underbump metallization portion (UBM) 618.In certain embodiments, connector 619A
BGA (BGA) ball that is provided on UBM 618 with 619B, Control Collapse Chip connector projection etc., wherein UBM 618
It is formed at above RDL.In certain embodiments, connector 619A and 619B is for being electrically connected to such as include by packaging part 500
Other package assemblings of another component pipe core, mediplate, package substrate, printed circuit board (PCB), motherboard etc..In some embodiments
In, connector 619A coupled to transmission ground, and connector 619B coupled to receive ground.Therefore, lower transfer electrode 106 passes through
Conductive through hole, RDL 604 and 616 and connector 619A coupled to transmitter ground.It is logical by conduction that bottom receives electrode 110
Hole, RDL 604 and 616 and connector 619B coupled to receive ground.
It follows that remove carrier 601 and adhesive layer 602 from packaging part 500.Figure 24 shows obtained structure.One
In a little embodiments, polymeric base layer 603 is stayed in obtained packaging part using as insulation and protective layer.
The exemplary operation that includes illustrated above, but it is not necessary that perform this operation with shown order.According to this
The spirit and scope of each bright embodiment, can optionally add, replace, reset and/or eliminate operation.
In certain embodiments, disclosing a kind of semiconductor structure, semiconductor structure includes: dielectric medium waveguide, vertically sets
Put between ground floor and the second layer；Driver tube core, is configured at the first output node generate drive signal；First passes
Transmission pole, the first side along dielectric medium waveguide is placed and is configured to receive the driving signal from the first output node；
First receives electrode, and the first side along dielectric medium waveguide is placed；And receptor tube core, it is configured to receive from the first reception
The signal that electrode receives.
Also disclose a kind of semiconductor structure, including: dielectric medium waveguide, it is arranged on the first dielectric material and the second dielectric material
Between material and there is essentially rectangular interface；The first metal layer, the first side along dielectric medium waveguide is arranged；And second
Metal level, the second side along dielectric medium waveguide is arranged.Second dielectric material is arranged on moulding layer, and moulding layer is around driving
Dynamic device tube core and receptor tube core.
Also disclosing a kind of method, method includes: driver tube core and receptor tube core are adhered in an enclosure；Application
Moulding compound is with around driver tube core and receptor tube core；Formed above driver tube core and receptor tube core and moulding compound
Ground floor；Form dielectric medium waveguide on the first layer；And in dielectric medium waveguide, form the second layer.
The parts of some embodiments discussed above so that those skilled in the art may be better understood the present invention's
Various aspects.It should be appreciated by those skilled in the art that they can design based on using the present invention easily or more
Change other for reaching the purpose identical with embodiment defined herein and/or realizing technique and the structure of same advantage.Ability
Field technique personnel it should also be appreciated that these equivalent structures are without departing from the spirit and scope of the present invention, and without departing substantially from this
In the case of the spirit and scope of invention, multiple change can be carried out, replace and change.
Claims (10)
1. a semiconductor structure, including:
Dielectric medium waveguide, is vertically set between ground floor and the second layer；
Driver tube core, is configured at the first output node generate drive signal；
First transmission electrode, the first side along described dielectric medium waveguide is placed and is configured to receive from described first defeated
The described driving signal of egress；
First receives electrode, and the first side along described dielectric medium waveguide is placed；And
Receptor tube core, is configured to receive the signal received at described first reception electrode.
Semiconductor structure the most according to claim 1, also includes:
Moulding layer, around the driver tube core being positioned on protective layer and receptor tube core；
Wherein, described ground floor is arranged on described moulding layer.
Semiconductor structure the most according to claim 2, also includes:
Second transmission electrode, the second side along described dielectric medium waveguide is placed and is electrically coupled to transmission ground.
Semiconductor structure the most according to claim 3,
Wherein, described first transmission electrode includes being arranged on the first metal structure above described dielectric medium waveguide, and described
Second transmission electrode includes being arranged on the second metal structure above described dielectric medium waveguide；And
Wherein, described first transmission electrode and described second transmission electrode are mirror image.
Semiconductor structure the most according to claim 2, also includes:
Second receives electrode, and the second side along described dielectric medium waveguide is placed and is electrically coupled to receive ground.
Semiconductor structure the most according to claim 5,
Wherein, described first receives electrode includes being arranged on the first metal structure above described dielectric medium waveguide, and described
Second receives electrode includes being arranged on the second metal structure above described dielectric medium waveguide；And
Wherein, described first reception electrode and described second receives electrode is mirror image.
Semiconductor structure the most according to claim 1, wherein, described dielectric medium waveguide include having than described ground floor and
The dielectric material of the dielectric constant that the dielectric constant of the described second layer is big.
8. a semiconductor structure, including:
Dielectric medium waveguide, is arranged between the first dielectric material and the second dielectric material and has essentially rectangular cross section；
The first metal layer, the first side along described dielectric medium waveguide is arranged；And
Second metal level, the second side along described dielectric medium waveguide is arranged；
Wherein, described second dielectric material is arranged on moulding layer, and described moulding layer is around driver tube core and receptor
Tube core.
Semiconductor structure the most according to claim 8, wherein, the first transmission electrode and first receives electrode and is arranged on described
In the first metal layer, described first transmission electrode coupled to described driver tube core, and described first reception electrode coupled to
Described receptor tube core；And
Second transmission electrode and second receives electrode and is arranged in described second metal level, and described second transmission electrode coupled to pass
Defeatedly, and described second receive electrode coupled to receive ground.
10. the method manufacturing semiconductor structure, including:
Driver tube core and receptor tube core are adhered in an enclosure；
Application moulding compound is with around described driver tube core and described receptor tube core；
Ground floor is formed above described driver tube core, described receptor tube core and described moulding compound；
Form dielectric waveguide on the first layer；And
Described dielectric medium waveguide is formed the second layer.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/692,794 | 2015-04-22 | ||
| US14/692,794 US10126512B2 (en) | 2014-09-11 | 2015-04-22 | Differential silicon interface for dielectric slab waveguide |
| US15/010,816 | 2016-01-29 | ||
| US15/010,816 US9715131B2 (en) | 2014-09-11 | 2016-01-29 | Integrated fan-out package including dielectric waveguide |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106067487A true CN106067487A (en) | 2016-11-02 |
Family
ID=57419987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610250235.5A Pending CN106067487A (en) | 2015-04-22 | 2016-04-21 | Integrated fan-out packaging part including dielectric medium waveguide |
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| Country | Link |
|---|---|
| CN (1) | CN106067487A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107026160A (en) * | 2016-01-29 | 2017-08-08 | 台湾积体电路制造股份有限公司 | Integrated chip |
| CN111696931A (en) * | 2019-03-15 | 2020-09-22 | 台湾积体电路制造股份有限公司 | Semiconductor device and method of forming the same |
-
2016
- 2016-04-21 CN CN201610250235.5A patent/CN106067487A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107026160A (en) * | 2016-01-29 | 2017-08-08 | 台湾积体电路制造股份有限公司 | Integrated chip |
| CN107026160B (en) * | 2016-01-29 | 2022-03-15 | 台湾积体电路制造股份有限公司 | Integrated chip, semiconductor structure, method of forming integrated dielectric waveguide and method of forming semiconductor structure |
| CN111696931A (en) * | 2019-03-15 | 2020-09-22 | 台湾积体电路制造股份有限公司 | Semiconductor device and method of forming the same |
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Application publication date: 20161102 |