CN106027172A - Method and device for testing receiver chip - Google Patents
Method and device for testing receiver chip Download PDFInfo
- Publication number
- CN106027172A CN106027172A CN201610251279.XA CN201610251279A CN106027172A CN 106027172 A CN106027172 A CN 106027172A CN 201610251279 A CN201610251279 A CN 201610251279A CN 106027172 A CN106027172 A CN 106027172A
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/29—Performance testing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
- H04L1/203—Details of error rate determination, e.g. BER, FER or WER
Abstract
The invention relates to a method and a device for testing a receiver chip. The method comprises the steps that a standard chip transmits a signal below a test rate to a to-be-tested chip according to a first test item; and the standard chip receives a bit error rate BER fed back by the to-be-tested chip, and determines that the first test item passes the test when the BER is higher than a preset threshold. According to the method and the device for testing the receiver chip provided by the invention, the chip transmits the signal, receives the signal sent by the to-be-tested chip and analyzes the signal, so as to replace instruments in traditional calibration and test modes, and automatic calibration and test are achieved by firmware.
Description
Technical field
The present invention relates to Internet of Things WIFI chip field, particularly relate to the method for testing of a kind of receiver chip
And device.
Background technology
Due in chip manufacturing proces the diversity of device and temperature and external environment condition for chip internal
The impact of device work, even if same series-produced radio frequency chip also has certain difference in performance
The opposite sex.In order to ensure the concordance of product, all can be to the simulation of WIFI radio frequency chip before product is paid
Circuit carries out direct current biasing, the calibration of homophase I/ orthogonal Q two-way phase and amplitude, to correct because manufacturing
During process deviation impact time analog circuit is worked, and also can carry out performance test and ensure
The product conformity energy requirement paid.
Specific instrument typically can be used radio frequency chip being calibrated and tests when to send and connect
The performance of radio frequency chip is measured by the radiofrequency signal of specific format.This method needs to be equipped with extra instrument
Device, adds the cost of test.Simultaneously instrument can only a corresponding radio frequency chip, if do not bought
Multiple stage instrument, it is impossible to accomplish that multi-disc is tested simultaneously, it is also difficult to promote calibration and the efficiency of test.
Summary of the invention
Technical problem
In view of this, the technical problem to be solved in the present invention is, how to provide the survey of a kind of receiver chip
Method for testing and device, enable receiver chip to carry out self testing.
Solution
For solving above technical problem, the present invention provides the test side of a kind of receiver chip in first aspect
Method, including:
Standard chips is according to first test item signal under chip emission test rate to be measured；
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the first test item test is passed through.
In a kind of possible implementation, test by afterwards at described first test item, also include:
Described standard chips is according to second test item signal under described chip emission test rate to be measured；And
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the second test item test is passed through.
In a kind of possible implementation, described fast to chip emission to be measured test according to test firmware
After signal under rate, also include: described chip to be measured receives and preserve the signal under described test rate,
And the signal under described test rate is demodulated.
In a kind of possible implementation, described fast to chip emission to be measured test according to test firmware
Before signal under rate, also include:
Described standard chips receives the instruction of tester table, to enter test mode according to described instruction.
In a kind of possible implementation, when described BER is less than predetermined threshold value, it is judged that for described
First test item test crash；And
Described standard chips is according to described first test item signal under chip emission test rate to be measured；
Described standard chips receives the error rate BER of described chip to be measured feedback.
For solving above technical problem, the present invention provides the test dress of a kind of receiver chip in second aspect
Put, including:
Chip to be measured；
Standard chips, is connected with described chip to be measured, is used for according to the first test item to chip emission to be measured
Signal under test rate；And receive the error rate BER of described chip to be measured feedback, and when described
When BER is higher than predetermined threshold value, it is judged that be that the first test item test is passed through.
In a kind of possible implementation, described standard chips is additionally operable in described first test item test
By afterwards, according to second test item signal under described chip emission test rate to be measured；And
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the second test item test is passed through.
In a kind of possible implementation, described chip to be measured is used for described according to testing firmware to treating
After surveying the signal under chip emission test rate, receive and preserve the signal under described test rate, and
Signal under described test rate is demodulated.
In a kind of possible implementation, described test device, also include:
Tester table, is used for described according to test firmware signal under chip emission test rate to be measured
Before, send instruction to described standard chips, so that described standard chips is according to described instruction, enters and survey
Examination state.
In a kind of possible implementation, described standard chips is additionally operable to when described BER is less than presetting
During threshold value, it is judged that for described first test item test crash；And
Described standard chips is additionally operable to according to described first test item under chip emission test rate to be measured
Signal, and receive described chip to be measured feedback error rate BER.
Beneficial effect
The method of testing of receiver chip provided according to the present invention and device, by standard chips according to the
One test item signal under chip emission test rate to be measured；Described standard chips receives described core to be measured
The error rate BER of sheet feedback, and when described BER is higher than predetermined threshold value, it is judged that it is the first test
Item test is passed through, thus replaces the instrument in conventional calibration and test pattern, and realizes test by firmware
Automatization.
The method of testing of a kind of receiver chip according to present invention offer and device, by increasing standard core
Sheet (golden chip) can realize multi-plate chip rapidly and test simultaneously, improves testing efficiency and saves
Cost.
According to below with reference to the accompanying drawings to detailed description of illustrative embodiments, the further feature of the present invention and side
Face will be clear from.
Accompanying drawing explanation
The accompanying drawing of the part comprising in the description and constituting description together illustrates with description
The exemplary embodiment of the present invention, feature and aspect, and for explaining the principle of the present invention.
Fig. 1 illustrates the structural representation of the test device of the receiver chip that the embodiment of the present invention provides；
Fig. 2 illustrates the flow chart of the method for testing of the receiver chip that the embodiment of the present invention provides；
Fig. 3 illustrates the illustraton of model of transmitter；
Fig. 4 illustrates the illustraton of model of receiver；
Fig. 5 illustrates the schematic diagram of digital baseband receiving path.
Detailed description of the invention
Various exemplary embodiments, feature and the aspect of the present invention is described in detail below with reference to accompanying drawing.Attached
Reference identical in figure represents the same or analogous element of function.Although enforcement shown in the drawings
The various aspects of example, but unless otherwise indicated, it is not necessary to accompanying drawing drawn to scale.
The most special word " exemplary " means " as example, embodiment or illustrative ".Here as
Any embodiment illustrated by " exemplary " should not necessarily be construed as preferred or advantageous over other embodiments.
It addition, in order to better illustrate the present invention, detailed description of the invention below gives numerous
Detail.It will be appreciated by those skilled in the art that do not have some detail, the present invention is equally
Implement.In some instances, method well known to those skilled in the art, means, element are not made in detail
Thin description, in order to highlight the purport of the present invention.
Embodiment 1
Based on communication system for the requirement of cost, area, power consumption and integrated level, zero intermediate frequency transceiver with
It is relative to the simpler structure of super-heterodyne architecture transceiver, higher bandwidth, less area and lower
Power consumption receive in a communications system and use widely.
In 802.11 agreements, define radio circuit under different rates and modulation system should meet
Low index.For receiver, leading indicator is receiving sensitivity, leading indicator for transmitter
It is spectrum mask, error vector magnitude (EVM) and transmitting power.Every piece of WIFI chip pay with
Before be required for passing through performance test.
Fig. 1 illustrates the structural representation of the test device 1 of the receiver chip that the embodiment of the present invention provides,
As it is shown in figure 1, this test device 1 includes: golden chip 11, tester table 12, chip to be measured
13。
Standard chips, such as golden chip 11, it is connected with chip 13 to be measured, tester table 12 points
It is not connected with standard chips (such as golden chip 11) and chip to be measured 13.
In a kind of possible implementation, tester table 12 can be directed into by specific pin
Row is launched signal specific or receives the operation of storage signal.The antenna end of chip 13 to be measured will and golden
The antenna end of chip 11 is connected, and communicates with golden chip 11 with reception signal to send.Tester table
12 can be communicated with synchronous calibration and test process with chip 13 to be measured by specific pin equally.
Fig. 2 illustrates the flow chart of the method for testing of the receiver chip that the embodiment of the present invention provides, such as Fig. 2
Shown in, the method may include that
Step S1, golden chip 11 are launched under test rate to chip 13 to be measured according to the first test item
Signal.
Step S2, chip to be measured 13 receive and store the signal under this test rate.
Signal under described test rate is demodulated by step S3, chip to be measured 13.
Signal under described test rate is demodulated and calculates error rate BER by chip 13 to be measured.
Step S4, golden chip 11 receive the error rate BER of chip 13 to be measured feedback, and work as
When described BER is higher than predetermined threshold value, it is judged that be that the first test item test is passed through.
In a kind of possible implementation, test by afterwards at described first test item, also include:
Step S5, described standard chips according to the second test item under described chip emission test rate to be measured
Signal；And the error rate BER of described standard chips reception described chip to be measured feedback, and when described
When BER is higher than predetermined threshold value, it is judged that be that the second test item test is passed through.
Receiver test flow process is first to test certain speed under certain channel, and transmitter is according to national standard
In the receiving sensitivity of this speed is specified to adjust gain and speed, and launch in advance and be stored in test
The data content of the test program agreement in chip.Receiver solves after receiving the signal of transmitter
It is in harmonious proportion and decodes, the data content then in advance arranged by the signal contrast received, add up error rate BER.
If BER is higher than this speed threshold value under this reception gain in national standard, i.e. predetermined threshold value, then should
Under channel, the test of this speed is passed through.Test program may proceed to test other channels or other speed, this
Time test item be changed to the second test item by the first test item, and transmitter also should be according to the change of test item
More adjusting speed and gain, golden chip 11 also will be launched to chip 13 to be measured according to the second test item
Signal under test rate, repeats above step until all reception test items prefabricated in test program lead to
Cross.
If BER is less than the threshold value in national standard for this this gain of speed, then this test item failure.
Test program according to processing routine set in advance, or can jump out test program, indicates this chip to be measured
Test crash.
In a kind of possible implementation, may proceed to the test of other channels and speed, the most again survey
Try this speed of this channel, in other words, first test the second test item and return again to test the first test item, more
Long time window statistics BER, it is to avoid the happenstance impact on test.
Sum it up, test item by or do not pass through, transmitter all should according to the instruction of test program,
Change and adjustment transmitting gain according to test item and speed.
In a kind of possible implementation, described fast to chip emission to be measured test according to test firmware
Before signal under rate, also include: receive the instruction of tester table 12, to enter according to described instruction
Test mode.
The method of testing of receiver chip provided according to the present invention and device, by standard chips according to the
One test item signal under chip emission test rate to be measured；Described standard chips receives described core to be measured
The error rate BER of sheet feedback, and when described BER is higher than predetermined threshold value, it is judged that it is the first test
Item test is passed through, thus replaces the instrument in conventional calibration and test pattern, and realizes test by firmware
Automatization, thus replace the instrument in conventional calibration and test pattern, and realize test by firmware
Automatization.
The test device 1 of a kind of receiver chip that the embodiment of the present invention provides and the embodiment of the present invention provide
The method of testing of receiver chip, can be rapid by increasing standard chips (golden chip 11)
Realizing multi-plate chip to test, raising testing efficiency is the most cost-effective simultaneously.
Fig. 3 illustrates the illustraton of model of transmitter.The embodiment of the present invention is applicable to the transmitter shown in Fig. 3.As
Shown in Fig. 3, this transmitter 2 includes: first digital baseband the 21, first direct current biasing and IQ mismatch are mended
Repay circuit 22, digital-analog convertor the 23, first low pass filter the 24, first frequency mixer 25, merit
Rate amplifier 26.
Wherein, the first digital baseband 21, the data that will send for modulation so that data fit through
Wireless antenna sends.RF_BIST_MEM: be used for storing the sampling letter required for calibration and test computing
Number.(abbreviation: DC_ADJ) 22, by calibrating and joining for first direct current biasing and I/Q mismatch compensation circuit
Put the direct current biasing compensating in receiving path and IQ mismatch.Digital-analog convertor (English:
Digital-Analog Converter, abbreviation: DAC) 23 convert digital signals into analogue signal.The
One low pass filter (English: Low-Pass Filter, abbreviation: LPF) 24, it is used for suppressing out-of-band interference
Signal.First frequency mixer 25, uses local oscillation signal to be mixed data signal modulation to penetrating with zero intermediate frequency signals
Again and again in section.(English: Power Amplifier, abbreviation: PA) 26, by frequency mixer for power amplifier
Output signal amplifying power and be sent on antenna.
Zero-intermediate-frequency transmitter simple in construction, integrated level is high, but the quickest for direct current biasing and IQ mismatch
Sense.Direct current biasing can cause transmitting terminal local oscillator leakage occur, in carrier signal can with local frequency phase
Same signal, causes serious direct current biasing at receiving terminal, affects the performance of receiver.Therefore school is passed through
The direct current biasing of transmitter is done compensation and can be good at improving the transmission in whole communication system by quasi-circuit
Accuracy.And because signal is to be passed by orthogonal two paths of signals I road and Q road in zero-intermediate-frequency transmitter
Defeated, in two-way transmission circuit, device performance does not mates the width that likely can cause orthogonal two paths of signals
Degree and the mismatch of phase place, cause generating useless lower sideband signal in emission process, and impact receives circuit
Performance.Therefore, at transmitting terminal, I/Q mismatch is done compensation and can improve the performance of transmission channel.Sending out
Penetrating in machine structure, before DAC, DC_ADJ module is used for adjusting direct current biasing (the English DC of transmitter
And I/Q passage mismatch Offset).
Fig. 4 illustrates receiver module figure, and as shown in Figure 4, this receiver 3 includes: low-noise amplifier
31, local oscillator the 32, second frequency mixer the 33, second low pass filter 34, analog-digital converter
35, the second direct current biasing and I/Q mismatch compensation circuit the 36, second digital baseband 37.
Wherein, low-noise amplifier (English: Low-Noise Amplifier, abbreviation: LNA) 31,
Receive and amplify receive on radio-frequency antenna radiofrequency signal.Local oscillator 32 is (English: Local
Oscillator, abbreviation: LO).Local oscillator 32, is used for producing local oscillation signal.Second frequency mixer 33,
The radiofrequency signal using local oscillation signal and RF filter to receive carries out mixing and is transformed into zero intermediate frequency signals.The
Two low pass filters (English: Low-Pass Filter, abbreviation: LPF) 34, it is used for suppressing out-of-band interference
Signal.Analog-digital converter (English: Analog-Digital Converter, abbreviation: ADC) 35,
Analogue signal in zero intermediate frequency is converted into digital signal.Second direct current biasing and I/Q mismatch compensation circuit
(abbreviation: DC_ADJ) 36 compensates the direct current biasing in receiving path by calibration and configuration and IQ loses
Join.Second digital baseband 37, the signal that demodulation will receive on antenna, revert to the original of transmitter transmitting
Data.RF_BIST_MEM: be used for storing the sampled signal required for calibration and test computing.
Due to zero intermediate frequency reciver switching bandwith signal to zero intermediate frequency, too much bias voltage can deteriorate letter
Number, and the circuit after mixing can be caused saturated, such as LPF or ADC etc..Therefore compensating direct current is inclined
Put within circuit is operated in ideal operation region after ensure that mixing, thus improve receiver performance.
And IQ mismatch is also the key factor affecting zero-if architecture receiver performance.In zero intermediate frequency
In structure, as shown in Figure 4, the zero intermediate frequency signals of frequency mixer output can be divided into two-way to transmit, due to I/Q
Two-way delivering path median filter, the device such as amplifier and ADC there may exist the difference in performance,
Make there will be the problem of amplitude or phase mismatch by orthogonal two paths of signals, cause demodulated signal
The deterioration of planisphere.In receiver module, DC_ADJ module is also used to adjust the DC of recipient
Offset and I/Q passage mismatch.The number to I/Q two-way is carried out by calibration flow process configuration DC_ADJ
Word signal carries out the compensation in amplitude and phase place, can effectively improve the demodulation performance of digital baseband.
Fig. 5 illustrates the schematic diagram of digital baseband receiving path, as it is shown in figure 5, radio circuit (English:
Radio-Frequency, abbreviation: RF), receiving radio data from antenna, and be converted to digital signal.
Preamble detecting, detection radio circuit transmission signal, if there is the data defined in wireless transmission protocol/
The frame head of management frame, then notify that follow-up baseband circuit starts demodulating data.Serioparallel exchange, by OFDM
Signal stream is divided into the time-domain signal stream that N road is parallel, and each of which road time-domain signal is orthogonal with N number of
A subcarrier in subcarrier is corresponding.Fast fourier transform is (English: Fast Fourier
Transform, abbreviation: FFT), time-domain signal parallel for N road is converted into frequency-region signal and exports
The frequency-region signal that N road is parallel.Channel estimation/equalization, the transmission being wirelessly transferred according to transmission Signal estimation
Channel parameter, and use the channel parameter of estimation to compensate, the data received with correction signal in nothing
Skew in line transmission channel.The data of reception are mapped on planisphere and according to planisphere by demapping
Decode the data stream of correspondence.The data stream that output N road is parallel.Parallel-serial conversion, exports de-mapping device
N circuit-switched data stream be merged into a circuit-switched data stream.Chnnel coding demodulate, according in wireless transmission protocol in advance
The channel coding method demodulated channel coding of definition, becomes initial data by data stream recovery.
Vector magnitude (English: Error Vector Magnitude, abbreviation: EVM) test-error to
Measure examination, specifically represent the IQ component and ideal signal component produced when signal is demodulated by receiver
Degree of closeness, be a kind of index considering modulated signal quality.Vector magnitude (EVM) is defined as
The ratio of the root-mean-square value of error vector average power signal and the root-mean-square value of ideal signal mean power, and
Represent with the form of percentage ratio.EVM is the least, and signal quality is the best.
Defined by EVM it can be seen that the initial data of EVM test is to enter the number before de-mapping device
According to, i.e. data stream after channel estimation/equalization, the therefore RF_BIST_MEM when testing EVM
The data of record need from channel estimation/equalization module with post-sampling and it needs to the receiving path of receiving terminal is just
Often work.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited to
In this, any those familiar with the art, can be easily in the technical scope that the invention discloses
Expect change or replace, all should contain within protection scope of the present invention.Therefore, the protection of the present invention
Scope should be as the criterion with described scope of the claims.
Claims (10)
1. the method for testing of a receiver chip, it is characterised in that including:
Standard chips is according to first test item signal under chip emission test rate to be measured；
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the first test item test is passed through.
Method of testing the most according to claim 1, it is characterised in that at described first test item
Test by afterwards, also include: described standard chips according to the second test item to described chip emission to be measured
Signal under test rate；And
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the second test item test is passed through.
Method of testing the most according to claim 2, it is characterised in that described solid according to test
After part signal under chip emission test rate to be measured, also include: described chip to be measured receives and protects
Deposit the signal under described test rate, and the signal under described test rate is demodulated.
Method of testing the most according to claim 3, it is characterised in that described solid according to test
Before part signal under chip emission test rate to be measured, also include:
Described standard chips receives the instruction of tester table, to enter test mode according to described instruction.
Method of testing the most according to claim 1, it is characterised in that when described BER is less than pre-
If during threshold value, it is judged that for described first test item test crash；And
Described standard chips is according to described first test item signal under chip emission test rate to be measured；
Described standard chips receives the error rate BER of described chip to be measured feedback.
6. the test device of a receiver chip, it is characterised in that including:
Chip to be measured；
Standard chips, is connected with described chip to be measured, is used for according to the first test item to chip emission to be measured
Signal under test rate；And receive the error rate BER of described chip to be measured feedback, and when described
When BER is higher than predetermined threshold value, it is judged that be that the first test item test is passed through.
Method of testing the most according to claim 6, it is characterised in that described standard chips is also used
In testing by afterwards at described first test item, survey to described chip emission to be measured according to the second test item
Signal under examination speed；And
Described standard chips receives the error rate BER of described chip to be measured feedback, and as described BER
During higher than predetermined threshold value, it is judged that be that the second test item test is passed through.
Test device the most according to claim 7, it is characterised in that described chip to be measured is used for
Described according to test firmware signal under chip emission test rate to be measured after, receive and preserve institute
State the signal under test rate, and the signal under described test rate is demodulated.
Test device the most according to claim 8, it is characterised in that also include:
Tester table, is used for described according to test firmware signal under chip emission test rate to be measured
Before, send instruction to described standard chips, so that described standard chips is according to described instruction, enters and survey
Examination state.
Method of testing the most according to claim 6, it is characterised in that described standard chips is also used
In when described BER is less than predetermined threshold value, it is judged that for described first test item test crash；And
Described standard chips is additionally operable to according to described first test item under chip emission test rate to be measured
Signal, and receive described chip to be measured feedback error rate BER.
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| CN201610251279.XA CN106027172B (en) | 2016-04-22 | 2016-04-22 | Method and device for testing receiver chip |
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| CN201610251279.XA CN106027172B (en) | 2016-04-22 | 2016-04-22 | Method and device for testing receiver chip |
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| CN112805950A (en) * | 2021-01-08 | 2021-05-14 | 华为技术有限公司 | Bit error rate testing method and device |
| CN114295963A (en) * | 2021-12-31 | 2022-04-08 | 龙迅半导体（合肥）股份有限公司 | Chip testing method and system |
| CN115021832A (en) * | 2022-06-02 | 2022-09-06 | 上海磐启微电子有限公司 | Chip communication test system with low cost and high isolation |
| WO2023092408A1 (en) * | 2021-11-25 | 2023-06-01 | 华为技术有限公司 | Communication method, apparatus and system |
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| CN106027172B (en) | 2021-05-04 |
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