CN115021832A - Chip communication test system with low cost and high isolation - Google Patents
Chip communication test system with low cost and high isolation Download PDFInfo
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- CN115021832A CN115021832A CN202210622062.0A CN202210622062A CN115021832A CN 115021832 A CN115021832 A CN 115021832A CN 202210622062 A CN202210622062 A CN 202210622062A CN 115021832 A CN115021832 A CN 115021832A
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- 238000012360 testing method Methods 0.000 title claims abstract description 73
- 238000004891 communication Methods 0.000 title claims abstract description 16
- 238000002955 isolation Methods 0.000 title claims abstract description 15
- 230000035945 sensitivity Effects 0.000 claims abstract description 13
- 238000012545 processing Methods 0.000 claims abstract description 6
- 238000006243 chemical reaction Methods 0.000 claims description 35
- 230000002238 attenuated effect Effects 0.000 claims description 33
- 238000001914 filtration Methods 0.000 claims description 5
- 238000005259 measurement Methods 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 5
- 230000003750 conditioning effect Effects 0.000 abstract 1
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/10—Monitoring; Testing of transmitters
- H04B17/101—Monitoring; Testing of transmitters for measurement of specific parameters of the transmitter or components thereof
- H04B17/102—Power radiated at antenna
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/29—Performance testing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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- Engineering & Computer Science (AREA)
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Abstract
The invention provides a chip communication test system with low cost and high isolation, which comprises: the chip to be tested is used for transmitting a first radio frequency signal; the test chip is matched and used for transmitting a second radio frequency signal; a conditioning module comprising: the first link is used for adjusting the first radio frequency signal to obtain an adjusted first radio frequency signal and transmitting the adjusted first radio frequency signal to the matching test chip for demodulation; the second link is used for adjusting the second radio frequency signal to obtain an adjusted second radio frequency signal and transmitting the adjusted second radio frequency signal to the chip to be tested for demodulation; and processing the chip to be tested according to the adjusted second radio frequency signal to obtain a first attenuation amount, processing the chip to be tested according to the adjusted first radio frequency signal to obtain a second attenuation amount by matching with the test chip, and processing the first transmission power and the first receiving sensitivity of the test chip to obtain a second transmission power and a second receiving sensitivity of the test chip. The system has the advantages that the system is provided with three attenuation circuits and two mixing circuits, so that the attenuation capacity is greatly improved, and the test efficiency is improved.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a chip communication testing system with low cost and high isolation.
Background
The communication test of an unknown radio frequency chip is a basic item in chip test, and the radio frequency index test of the radio frequency chip is mainly completed through a corresponding instrument, for example, the receiving sensitivity is tested through a signal source and the transmitting power is tested through a frequency spectrograph.
However, the scheme has the problems of large early test investment and high test cost, the difficulty of automatic development is high, the production is very inconvenient by adopting a shielding box technology isolation mode, the integration on the same board cannot be realized, a special shielding box is required for isolation, and the environment complexity is high.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a chip communication test system with low cost and high isolation, which comprises:
the chip to be tested is arranged on a test board and used for transmitting a first radio frequency signal;
the matching test chip is arranged on the test board and used for transmitting a second radio frequency signal;
an adjusting module, set up in the chip that awaits measuring with between the cooperation test chip, include:
the first link is used for adjusting the first radio frequency signal to obtain an adjusted first radio frequency signal and transmitting the adjusted first radio frequency signal to the matching test chip for demodulation;
the second link is used for adjusting the second radio frequency signal to obtain an adjusted second radio frequency signal and transmitting the adjusted second radio frequency signal to the chip to be detected for demodulation;
and the testing machine is respectively connected with the adjusting module, the chip to be tested and the matching test chip and is used for obtaining a first attenuation amount according to a demodulation result corresponding to the adjusted second radio-frequency signal, obtaining a second attenuation amount according to a demodulation result corresponding to the adjusted first radio-frequency signal and processing the first attenuation amount, the second attenuation amount and a first transmitting power and a first receiving sensitivity of the matching test chip obtained through pre-measurement to obtain a second transmitting power and a second receiving sensitivity of the chip to be tested.
Preferably, the chip to be tested is connected with the test board through a sorting machine.
Preferably, the device further comprises a first filter circuit, which is respectively connected to the chip to be tested and the adjusting module, and is used for filtering signals other than the first radio frequency signal.
Preferably, the radio frequency testing device further comprises a second filter circuit, which is respectively connected to the matching testing chip and the adjusting module, and is used for filtering signals other than the second radio frequency signal.
Preferably, the first link includes:
the first attenuation circuit is used for attenuating the power of the first radio frequency signal to obtain a first attenuation signal;
the first mixing circuit is connected with the first attenuation circuit and is used for carrying out frequency conversion on the power of the first attenuation signal to obtain a first frequency conversion signal;
the second attenuation circuit is connected with the first mixing circuit and is used for attenuating the first frequency conversion signal to obtain a second attenuation signal;
the second mixing circuit is connected with the second attenuation circuit and is used for carrying out frequency conversion on the second attenuation signal to obtain a second frequency conversion signal;
and the third attenuation circuit is connected with the second mixing circuit and used for attenuating the second frequency conversion signal to obtain the adjusted first radio-frequency signal and transmitting the adjusted first radio-frequency signal to the matching test chip.
Preferably, in the second link, the third attenuation circuit attenuates the second radio frequency signal to obtain a third attenuation signal, the second mixer circuit converts the frequency of the third attenuation signal to obtain a third frequency conversion signal, the second attenuation circuit attenuates the third frequency conversion signal to obtain a fourth attenuation signal, the first mixer circuit converts the frequency of the fourth attenuation signal to obtain a fourth frequency conversion signal, and the first attenuation circuit attenuates the fourth frequency conversion signal to obtain the adjusted second radio frequency signal and transmits the adjusted second radio frequency signal to the chip to be tested.
Preferably, the first mixer circuit is connected to a first clock circuit, and is configured to output a first clock signal to the first mixer circuit to control the first mixer circuit to frequency-convert the first attenuated signal or the fourth attenuated signal according to the first clock signal.
Preferably, the second mixer circuit is connected to a second clock circuit, and is configured to output a second clock signal to the second mixer circuit to control the second mixer circuit to frequency-convert the second attenuated signal or the third attenuated signal according to the second clock signal.
The technical scheme has the following advantages or beneficial effects:
(1) the system is provided with three attenuation circuits and two frequency mixing circuits, so that the adjustment of the transmitting frequency, the receiving frequency and the intermediate frequency is realized, the attenuation of a link can be evenly distributed to 3 frequencies, the attenuation capability is greatly improved, and the accuracy of a test part caused by same-frequency coupling due to insufficient isolation is reduced;
(2) the system is provided with two filter circuits to filter interference signals, reduce the influence of the coupling of the interference signals and the first radio frequency signals or the second radio frequency signals on the receiving performance and improve the test stability;
(3) the system solves the influence of aerial same-frequency coupling through the frequency difference of the first clock circuit and the second clock circuit;
(4) the system solves the cost problem caused by expensive instruments, the difficulty of automated development of the instruments, the problem of high test cost in unit time, the problem of test efficiency and the problem of poor isolation of same-frequency-band communication.
Drawings
FIG. 1 is a schematic diagram of the system in accordance with the preferred embodiment of the present invention;
FIG. 2 is a schematic diagram of the system in accordance with the preferred embodiment of the present invention.
Detailed Description
The invention is described in detail below with reference to the figures and specific embodiments. The present invention is not limited to the embodiment, and other embodiments may be included in the scope of the present invention as long as the gist of the present invention is satisfied.
In the preferred embodiment of the present invention, based on the above problems in the prior art, a low-cost and high-isolation chip communication test system is provided, as shown in fig. 1, including:
the chip to be tested 1 is arranged on a test board 2 and used for transmitting a first radio frequency signal;
a matching test chip 3, arranged on the test board 2, for emitting a second radio frequency signal;
an adjusting module 4 is arranged between the chip 1 to be tested and the matching test chip 3, and comprises:
the first link 41 is used for adjusting the first radio frequency signal to obtain an adjusted first radio frequency signal and transmitting the adjusted first radio frequency signal to the matching test chip 3 for demodulation;
the second link 42 is used for adjusting the second radio frequency signal to obtain an adjusted second radio frequency signal and transmitting the adjusted second radio frequency signal to the chip 1 to be detected for demodulation;
and the tester 5 is respectively connected with the adjusting module 4, the chip 1 to be tested and the matching test chip 3, and is used for obtaining a first attenuation amount according to a demodulation result corresponding to the adjusted second radio-frequency signal, obtaining a second attenuation amount according to a demodulation result corresponding to the adjusted first radio-frequency signal, and processing the first attenuation amount and the second attenuation amount according to a first transmitting power and a first receiving sensitivity of the matching test chip 3 obtained by pre-measurement to obtain a second transmitting power and a second receiving sensitivity of the chip 1 to be tested.
Specifically, in this embodiment, the second transmission power is calculated by the following calculation formula:
W1＝A1+S0
wherein the content of the first and second substances,
w1 denotes a second transmission power;
a1 denotes a first attenuation amount;
s0 denotes the first reception sensitivity.
Specifically, in this embodiment, the second receiving sensitivity is calculated by the following calculation formula:
S1＝W0-A2
wherein the content of the first and second substances,
s1 denotes a second reception sensitivity;
w0 denotes a first transmission power;
a2 represents a second attenuation amount.
Preferably, according to the sensitivity standard, the false alarm rate is calculated as 0.1%, and the frame error rate is inversely derived, wherein the frame error rate can be calculated by the number of actually transmitted data packets, the number of actually received correct data packets, and the number of bits included in the data packets.
In the preferred embodiment of the present invention, the chip 1 to be tested is connected to the testing board 2 through a sorter 6.
Specifically, in this embodiment, the sorter 6 is connected to a plurality of chips 1 to be tested, and batch testing of the plurality of chips 1 to be tested can be realized by the sorter 6.
In a preferred embodiment of the present invention, the apparatus further includes a first filter circuit 7, which is respectively connected to the chip 1 to be tested and the adjusting module 4, and is configured to filter signals other than the first radio frequency signal.
In the preferred embodiment of the present invention, the apparatus further includes a second filter circuit 8, which is respectively connected to the test chip 3 and the adjusting module 4 for filtering signals other than the second rf signal.
Specifically, in the present embodiment, the first filter circuit 7 and the second filter circuit 8 are narrow band filter circuits.
In a preferred embodiment of the present invention, the first link 41 includes:
a first attenuation circuit 411, configured to attenuate the power of the first radio frequency signal to obtain a first attenuated signal;
a first mixing circuit 412, connected to the first attenuating circuit 411, for performing frequency conversion on the power of the first attenuated signal to obtain a first frequency-converted signal;
a second attenuation circuit 413 connected to the first mixing circuit 412 for attenuating the first frequency-converted signal to obtain a second attenuated signal;
a second mixing circuit 414 connected to the second attenuating circuit 413, for performing frequency conversion on the second attenuated signal to obtain a second frequency-converted signal;
and a third attenuation circuit 415, connected to the second mixing circuit 414, for attenuating the second frequency-converted signal to obtain an adjusted first radio frequency signal and transmitting the adjusted first radio frequency signal to the matching test chip 3.
Specifically, in the embodiment, in the first link 41, the test machine 5 controls the chip 1 to be tested to transmit a first radio frequency signal, the frequency of the first radio frequency signal is f0, the power of the first radio frequency signal is p0, the first filter circuit 7 filters interference signals except the first radio frequency signal, the frequency of the first radio frequency signal is still f0, the power of the first radio frequency signal is p1, the first radio frequency signal is attenuated by the first attenuation circuit 411 to obtain a first attenuated signal, the frequency of the first attenuated signal is f0, the power of the first attenuated signal is p2, the first attenuated signal is subjected to first frequency conversion by the first frequency mixing circuit 412 to obtain a first frequency converted signal, the frequency of the first frequency converted signal is f1, the power of the first frequency converted to p3, the first frequency converted signal is attenuated by the second attenuation circuit 413 to obtain a second attenuated signal, the frequency of the second attenuated signal is f1, the power of the second attenuated signal is p4, the second frequency converted by the second frequency mixing circuit 414 to obtain a second frequency converted signal, the frequency of the second frequency conversion signal is f2, the power is p5, the third attenuation circuit 415 attenuates the second frequency conversion signal for the third time to obtain the adjusted first radio frequency signal, the frequency of the adjusted first radio frequency signal is f2, the power is p6, the second filter circuit 8 filters interference signals except the adjusted first radio frequency signal, the frequency of the adjusted first radio frequency signal is f2, the power is p7, and the test chip 3 is matched to receive and demodulate the adjusted first radio frequency signal to obtain a useful signal.
In the preferred embodiment of the present invention, in the second link 42, the third attenuation circuit 415 attenuates the second radio frequency signal to obtain a third attenuated signal, the second mixing circuit 414 performs frequency conversion on the third attenuated signal to obtain a third frequency-converted signal, the second attenuation circuit 413 performs attenuation on the third frequency-converted signal to obtain a fourth attenuated signal, the first mixing circuit 412 performs frequency conversion on the fourth attenuated signal to obtain a fourth frequency-converted signal, the first attenuation circuit 411 attenuates the fourth frequency-converted signal to obtain an adjusted second radio frequency signal, and the adjusted second radio frequency signal is transmitted to the chip 1 to be tested.
Specifically, in the second link, the testing machine 5 controls the testing chip 3 to transmit the second radio frequency signal, the frequency of the second radio frequency signal is f ' 0, the power of the second radio frequency signal is p ' 0, the second filter circuit 8 filters interference signals except the second radio frequency signal, the frequency of the second radio frequency signal is still f ' 0, the power of the second radio frequency signal is p ' 1, the third attenuation circuit 415 performs first attenuation on the second radio frequency signal to obtain a third attenuation signal, the frequency of the third attenuation signal is f ' 0, the power of the third attenuation signal is p ' 2, the second mixer circuit 414 performs first frequency conversion on the third attenuation signal to obtain a third frequency conversion signal, the frequency of the third frequency conversion signal is f ' 1, the power of the third frequency conversion signal is p ' 3, the second attenuation circuit 413 performs second attenuation on the third frequency conversion signal to obtain a fourth attenuation signal, the frequency of the fourth attenuation signal is f ' 1, the power is changed to p ' 4, the fourth attenuation signal is subjected to second frequency conversion through the first mixing circuit 412 to obtain a fourth frequency conversion signal, the frequency of the fourth frequency conversion signal is f ' 2, the power is changed to p ' 5, the fourth frequency conversion signal is subjected to third attenuation through the first attenuation circuit 411 to obtain an adjusted second radio frequency signal, the frequency of the adjusted second radio frequency signal is f ' 2, the power is changed to p ' 6, interference signals except the adjusted second radio frequency signal are filtered through the first filter circuit 7, the frequency of the adjusted second radio frequency signal is f ' 2, the power is changed to p ' 7, and the chip 1 to be tested receives the adjusted second radio frequency signal and demodulates the adjusted second radio frequency signal to obtain a useful signal.
Specifically, in the present embodiment, the tester 5, the chip 1 to be tested, the matching test chip 3, the first mixer circuit 412, and the second mixer circuit 414 adopt a point-splitting control method, in the first link 41, the chip 1 to be tested serves as a transmitting end, the first mixer circuit 412 and the second mixer circuit 414 serve as down-conversion, the matching test chip 3 serves as a receiving end, in the second link 42, the chip 1 to be tested serves as a receiving end, the first mixer circuit 412 and the second mixer circuit 414 serve as up-conversion, and the matching test chip 3 serves as a transmitting end.
In the preferred embodiment of the present invention, the first mixing circuit 412 is connected to a first clock circuit 416 for outputting a first clock signal to the first mixing circuit 412 to control the first mixing circuit 412 to frequency-convert the first attenuated signal or the fourth attenuated signal according to the first clock signal.
In the preferred embodiment of the present invention, the second mixing circuit 414 is connected to a second clock circuit 417, for outputting a second clock signal to the second mixing circuit 414 to control the second mixing circuit 414 to frequency-convert the second attenuated signal or the third attenuated signal according to the second clock signal.
Specifically, in this embodiment, the clock frequencies of the first mixing circuit 412 and the second mixing circuit 414 are different, so as to ensure that the output frequency of the second mixing circuit (in the first link 41, the second mixing circuit 414 is the second mixing circuit, and in the second link 42, the first mixing circuit 412 is the second mixing circuit) cannot be equal to the image signal of the first mixing circuit (in the first link 41, the first mixing circuit 412 is the first mixing circuit, and in the second link 42, the second mixing circuit 414 is the first mixing circuit).
Specifically, in this embodiment, because the isolation of the mixer circuit is not enough, the problem that the frequency conversion signal leaks to the subsequent stage may occur, if the isolation is not enough, the leakage signal may block to the useful signal, the isolation of the two mixer circuits is twice that of one mixer circuit, and meanwhile, the first mixer circuit 412 and the second mixer circuit 414 may be respectively disposed on the two boards, and the connection is established by shielding the better radio frequency cable, so that the blocking problem that may be caused by the insufficient isolation is solved.
Preferably, the two mixer circuits and the three attenuator circuits are provided, so that the attenuation of the entire adjustment module can be about 200 dB.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (8)
1. A low-cost high-isolation chip communication test system is characterized by comprising:
the chip to be tested is arranged on a test board and used for transmitting a first radio frequency signal;
the matching test chip is arranged on the test board and used for transmitting a second radio frequency signal;
an adjusting module, set up in the chip that awaits measuring with between the cooperation test chip, include:
the first link is used for adjusting the first radio frequency signal to obtain an adjusted first radio frequency signal and transmitting the adjusted first radio frequency signal to the matching test chip for demodulation;
the second link is used for adjusting the second radio frequency signal to obtain an adjusted second radio frequency signal and transmitting the adjusted second radio frequency signal to the chip to be detected for demodulation;
and the testing machine is respectively connected with the adjusting module, the chip to be tested and the matching test chip and is used for obtaining a first attenuation amount according to a demodulation result corresponding to the adjusted second radio-frequency signal, obtaining a second attenuation amount according to a demodulation result corresponding to the adjusted first radio-frequency signal and processing the first attenuation amount, the second attenuation amount, a first transmitting power and a first receiving sensitivity of the matching test chip obtained by pre-measurement to obtain a second transmitting power and a second receiving sensitivity of the chip to be tested.
2. The chip communication test system of claim 1, wherein the chip under test is connected to the test board through a handler.
3. The chip communication test system according to claim 1, further comprising a first filter circuit, respectively connected to the chip under test and the adjusting module, for filtering signals other than the first rf signal.
4. The chip communication test system according to claim 1, further comprising a second filter circuit, respectively connected to the match test chip and the adjusting module, for filtering signals other than the second rf signal.
5. The chip communication test system of claim 1, wherein the first link comprises:
the first attenuation circuit is used for attenuating the power of the first radio frequency signal to obtain a first attenuation signal;
the first mixing circuit is connected with the first attenuation circuit and is used for carrying out frequency conversion on the power of the first attenuation signal to obtain a first frequency conversion signal;
the second attenuation circuit is connected with the first mixing circuit and is used for attenuating the first frequency conversion signal to obtain a second attenuation signal;
the second mixing circuit is connected with the second attenuation circuit and is used for carrying out frequency conversion on the second attenuation signal to obtain a second frequency conversion signal;
and the third attenuation circuit is connected with the second mixing circuit and used for attenuating the second frequency conversion signal to obtain the adjusted first radio-frequency signal and transmitting the adjusted first radio-frequency signal to the matching test chip.
6. The chip communication test system according to claim 5, wherein in the second link, the third attenuation circuit attenuates the second radio frequency signal to obtain a third attenuated signal, the second mixer circuit frequency-converts the third attenuated signal to obtain a third frequency-converted signal, the second attenuation circuit attenuates the third frequency-converted signal to obtain a fourth attenuated signal, the first mixer circuit frequency-converts the fourth attenuated signal to obtain a fourth frequency-converted signal, the first attenuation circuit attenuates the fourth frequency-converted signal to obtain the adjusted second radio frequency signal, and the adjusted second radio frequency signal is transmitted to the chip to be tested.
7. The chip communication test system according to claim 6, wherein the first mixer circuit is connected to a first clock circuit for outputting a first clock signal to the first mixer circuit to control the first mixer circuit to frequency-convert the first attenuated signal or the fourth attenuated signal according to the first clock signal.
8. The chip communication test system according to claim 6, wherein the second mixer circuit is connected to a second clock circuit for outputting a second clock signal to the second mixer circuit to control the second mixer circuit to frequency-convert the second attenuated signal or the third attenuated signal according to the second clock signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210622062.0A CN115021832B (en) | 2022-06-02 | 2022-06-02 | Chip communication test system with low cost and high isolation |
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| CN202210622062.0A CN115021832B (en) | 2022-06-02 | 2022-06-02 | Chip communication test system with low cost and high isolation |
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| CN115021832B CN115021832B (en) | 2023-12-05 |
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| CN115021832B (en) | 2023-12-05 |
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