CN106019744A - Array substrate, manufacturing method of array substrate and display device - Google Patents
Array substrate, manufacturing method of array substrate and display device Download PDFInfo
- Publication number
- CN106019744A CN106019744A CN201610453996.0A CN201610453996A CN106019744A CN 106019744 A CN106019744 A CN 106019744A CN 201610453996 A CN201610453996 A CN 201610453996A CN 106019744 A CN106019744 A CN 106019744A
- Authority
- CN
- China
- Prior art keywords
- electrode
- plural number
- transparency electrode
- base palte
- array base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
Abstract
The invention provides an array substrate, a manufacturing method of the array substrate and a display device and relates to the technical field of display. The array substrate comprises a substrate, a plurality of public electrode wires, an active element, a pixel electrode and a transparent electrode, wherein the substrate is provided with a plurality of data lines and a plurality of scanning lines , and the data lines and the scanning lines are arranged in a cross manner; each public electrode wire is arranged between two adjacent data lines; the active element is arranged in a cross region of the plurality of public electrode wires and the plurality of scanning lines; a plurality of pixel electrode units arranged repeatedly are formed with the cross region as the center and electrically connected with the active element through a first contact hole; a plurality of transparent electrode units arranged repeatedly are formed in a region defined by the plurality of public electrode wires and the plurality of scanning lines, and the transparent electrode units are electrically connected with the public electrode wires. The invention also discloses the manufacturing method of the array substrate.
Description
Technical field
The present invention relates to Display Technique field, particularly to a kind of array base palte with high transmission rate and array base palte
Manufacture method, display device.
Background technology
Vertical electric field type liquid crystal display mode is most basic liquid crystal display mode, including TN (Twisted Nematic,
Twisted nematic), the liquid crystal display mode such as VA (Vertical Alignment, vertical orientation).TN panel in the market
It is mostly that the TN+film, film of modified form i.e. compensates film, for making up the deficiency of TN panel visible angle, the TN face of improvement at present
The visible angle of plate all reaches 160 °.VA class panel is the panel type that the application of present advanced liquid crystal is more, belongs to wide viewing angle face
Plate.VA class panel be divided into again MVA (Multi-domain Vertical Alignment, many quadrants vertical orientation technology) panel,
PVA (Patterned Vertical Alignment) panel, PSVA (Polymer Stabilization Vertical
Alignment, polymer stabilizing vertical orientation) panel, UV2A (UV Vertical Alignment, UV light vertical orientation) face
Plate, etc..
The dot structure of vertical electric field type liquid crystal display mode is divided into the dot structure of TFT side and the dot structure two of CF side
Part.The dot structure of TFT side mainly realizes the electrical functions of TFT-LCD, is to determine that pixel capacitance effect, orientation postpone effect
Should, gray scale voltage write diagnostics and the main aspect of retention performance.The dot structure of CF side mainly realizes the optics merit of TFT-LCD
Can, it is to determine TFT-LCD contrast and the main aspect in colourity territory.
The dot structure of TFT side typically uses Cs on COM structure.The feature of Cs on COM structure is that pixel electrode covers
Cover on metal public electrode wire, form storage electric capacity.The position of public electrode wire can be in the both sides up and down of pixel, it is also possible to
Central authorities in pixel.The structure of data wire both sides of extending to public electrode wire plays the effect of shading.Pixel electrode and common electrical
The region of polar curve overlap is exactly the storage capacity area of pixel.
The pixel of CF side generally comprises the structures such as black matrix" BM, RGB color resistance, spacer, public electrode.CF side pixel
Structure is mainly made up of optical filtering and shading two parts: filtering structure is made up of RGB color layer, and light-shielding structure is made up of black matrix".
The design key of CF side dot structure is the shading size holding black matrix", and RGB color layer and black matrix" light shield layer
Lap.The design of black matrix" light-shielding structure, it is therefore an objective to occur that light leak is existing after CF substrate to be prevented and TFT substrate laminating skew
As.If the Anawgy accuracy of CF and TFT substrate is 6um, then the shading line segment of public electrode wire is near the limit of data wire side
And black matrix" distance between the limit of chromatograph side at least to ensure at more than 6um.The existence of this design rule, makes
The actual aperture rate obtaining pixel is the lowest, reduces the light utilization ratio of pixel.
In order to improve the light utilization ratio of pixel, a kind of way is as FFS (Fringe Field Switching, edge
Electric field switchs) like that metal public electrode wire is replaced by transparency electrode.FFS needs in the lower section of scan line layer by together
ITO-PR technique, the bottom in each pixel forms the COM electrode of planar distribution.The scan line of FFS pixel, data wire and TFT
With other, the function of switch shows that patterns are common, be to bottom with scan line with the major function of the fine strip shape metal COM line of layer
Planar COM electrode provides stable COM voltage, and pixel electrode connects in surrounding ring-type, TFT switch is powered.Top layer
The ITO pattern of the ITO pattern and bottom connection COM voltage that connect pixel voltage overlaps to form the storage electric capacity Cs of pixel.
Use for reference the method for designing of the transparent underlayer planar COM electrode of FFS, can be in vertical orientation type liquid crystal such as TN, VA
Show importing transparent underlayer planar COM electrode in pattern, promote the light utilization ratio of pixel.
Summary of the invention
Patent of the present invention technical problem to be solved be to provide the transparent liquid crystal display of a kind of high transmission rate and
The manufacture method of array base palte.
In order to reach above-mentioned or other purpose, one aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator,
Including: a substrate, it is provided with the plural data line in cross arranged crosswise and plural number bar scan line;Plural number bar public electrode
Line, this public electrode wire is arranged between two adjacent data wires;Active member, is arranged on this plural number data line multiple with this
The cross intersection region of several scan lines;Pixel electrode, is formed a plurality of centered by each this cross intersection region
The pixel electrode unit of repeated arrangement, and be electrically connected with this active member by one first contact hole;Transparency electrode, with cross
In the region that this plural number data line of type arranged crosswise and this plural number bar scan line limit, form the saturating of a plurality of repeated arrangement
Prescribed electrode unit, this transparency electrode unit is electrically connected with this public electrode wire.
Further, this transparency electrode has on the direction vertical with this array base palte with this pixel electrode and partly overlaps
Region, this overlapping region forms storage capacitor.
Further, it is provided with spacing distance between the pixel electrode unit of these a plurality of repeated arrangement.
Further, in the region that two adjacent data wires and two adjacent scan lines limit, a transparency electrode list is formed
Unit, the surrounding border of this transparency electrode unit and this two adjacent data wire and this two adjacent scan line spacings certain away from
From.
Further, this transparency electrode is dispensed directly onto the top of public electrode wire or the lower section of public electrode wire.
Further, this transparency electrode is distributed in the top of public electrode wire or public electrode wire across dielectric
Lower section, is electrically connected with this public electrode wire by one second contact hole.
Further, this transparency electrode material use tin dope three Indium sesquioxide., aluminium-doped zinc oxide, nano-silver thread or
Person's Graphene.
In order to reach above-mentioned or other purpose, another aspect of the invention proposes a kind of liquid crystal indicator, including: such as power
Profit requires the array base palte described in 1-7;Counter substrate, is oppositely arranged with this array base palte;Liquid crystal layer, is interposed in this array base palte
And between this counter substrate;Also include public electrode, be distributed in this counter substrate in face electrode pattern;Wherein, this common electrical
Pole layer and this transparency electrode apply same potential voltage simultaneously.
In order to reach above-mentioned or other purpose, another aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator
Manufacture method, including: provide array basal plate, formed first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern bag
Include plural number bar scan line;The pattern of this first metal layer is formed gate insulator, is formed above this gate insulator
Semiconductor pattern;On this semiconductor pattern, forming second layer metal Thinfilm pattern, this second layer metal Thinfilm pattern includes multiple
Several public electrode wires, plural number data line, this public electrode wire is arranged between two adjacent data wires, this plural number bar number
It is cross arranged crosswise according to line and this plural number bar scan line;Also include that thin film transistor (TFT) drains;At this second layer metal thin film
Form transparency electrode on pattern, and this transparency electrode covers in the surface of this public electrode wire;This transparency electrode is divided
Layer of cloth, is distributed pixel electrode on which insulating layer, and this pixel electrode is with each this plural number data line and this plural number bar
Centered by cross intersection region between scan line, form the pixel electrode unit of a plurality of repeated arrangement, this pixel electrode
Unit is electrically connected with drain electrode realization by running through a contact hole of this insulating barrier;Wherein, multiple with this at this plural number data line
In the region that several scan lines limit, form the transparency electrode unit of a plurality of repeated arrangement, this transparency electrode unit and these public affairs
Common-battery polar curve is electrically connected with.
In order to reach above-mentioned or other purpose, further aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator
Manufacture method, including: provide array basal plate, formed first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern bag
Include plural number bar scan line;The pattern of this first metal layer is formed gate insulator, is formed above this gate insulator
Semiconductor pattern, then forms transparency electrode by mode of printing;This transparency electrode is formed second layer metal thin film figure
Case, this second layer metal Thinfilm pattern includes plural number bar public electrode wire, and plural number data line, this public electrode wire is arranged in
Between two adjacent data wires, this plural number data line and this plural number bar scan line are cross arranged crosswise;Also include thin film
Transistor drain, and the covering of this public electrode wire is in the surface of this transparency electrode, at this plural number data line and this plural number
In the region that bar scan line limits, forming the transparency electrode unit of a plurality of repeated arrangement, this transparency electrode unit is public with this
Electrode wires is electrically connected with;This second layer metal Thinfilm pattern is distributed insulating barrier, is distributed pixel electrode on which insulating layer, should
Pixel electrode is centered by the cross intersection region between each this plural number data line and this plural number bar scan line, is formed
The pixel electrode unit of a plurality of repeated arrangement, this pixel electrode unit is real with drain electrode by the contact hole running through this insulating barrier
Now it is electrically connected.
The present invention compared with prior art, has an advantage in that: the area of metal wire is little, the metal wire interference effect to light
Little;The aperture opening ratio of pixel is high, high to the utilization ratio of light.
Accompanying drawing explanation
Fig. 1 is for schematically showing array base palte side of the present invention dot structure floor map;
Fig. 2 is for schematically showing array base palte side plane structure schematic diagram in Fig. 1 of the present invention;
Fig. 3 A is for schematically showing array base palte side of the present invention dot structure floor map;
Fig. 3 B is to schematically show dot structure cross-sectional view along AA ' direction in Fig. 3 A of the present invention;
Fig. 4 is to schematically show the storage capacitor structures schematic diagram shown in Fig. 3 B;
Fig. 5 is for schematically showing liquid crystal indicator cross-sectional view of the present invention;
Fig. 6 is for schematically showing liquid crystal indicator counter substrate planar structure schematic diagram of the present invention;
Fig. 7 descends cross-sectional view in working order for schematically showing liquid crystal indicator of the present invention;
Fig. 8 A~8D is for schematically showing array base palte difference making step planar structure schematic diagram of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawings and specific embodiment, it is further elucidated with the present invention, it should be understood that these embodiments are merely to illustrate
The present invention rather than limit the scope of the present invention, after having read the present invention, each to the present invention of those skilled in the art
The amendment planting the equivalent form of value all falls within the application claims limited range.
Fig. 1 is for schematically showing array base palte side of the present invention dot structure floor map.As it is shown in figure 1, the present invention carries
Supplied the dot structure of a kind of array base palte, including: scan line 101, semiconductor layer 102, data wire 103, source electrode (data wire),
Drain electrode 104, public electrode wire 105, transparency electrode 106, contact hole 107, pixel electrode 108.
As it is shown in figure 1, scan line 101 and data wire 103 are entreated in cross arranged crosswise within the pixel, this public electrode
Line 105 is arranged between two adjacent data wires 103, and the infall at data wire 103 with scan line 101 is provided with film crystal
Pipe.The grid of thin film transistor (TFT) is scan line 101 pattern at this cross intersection region, and the source electrode of thin film transistor (TFT) is data
Line 103 is pattern at this cross intersection region, and the drain electrode 104 of thin film transistor (TFT), the raceway groove 102 of thin film transistor (TFT).Thin
Film transistor drain electrode 104 be arranged over contact hole 107, pixel electrode 108 covers contact hole 107 and makes drain electrode 104 and pixel
Electrode 108 realizes equipotential link.Transparency electrode 106, with this plural number data line 103 and this plural number of cross arranged crosswise
In the region that bar scan line 101 limits, form the transparency electrode unit of a plurality of repeated arrangement, this transparency electrode unit and these public affairs
Common-battery polar curve 105 is electrically connected with.Pixel electrode 108 partly overlaps with square transparency electrode 106, forms storage capacitor.This is saturating
Prescribed electrode 106 is electrically connected with accordingly one this public electrode wire 105, and the current potential of square transparency electrode 106 passes through public electrode
Line 105 imports outside display screen.Preferably, public electrode wire 105 and the same layer of data wire 103.
Fig. 2 is for schematically showing array base palte side plane structure schematic diagram in Fig. 1 of the present invention.As in figure 2 it is shown, the present invention carries
Having supplied a kind of array base palte, including the dot structure described in a plurality of Fig. 3, pixel electrode 108, with each this cross intersection
The pixel electrode unit of a plurality of repeated arrangement it is formed with centered by region, and by one first contact hole and this thin film transistor (TFT)
It is electrically connected with;Transparency electrode 106, in the region that this plural number data line 103 and this plural number bar scan line 101 limit, is formed
The transparency electrode unit of a plurality of repeated arrangement, this transparency electrode unit is electrically connected with this public electrode wire 105.
Gap, left and right S1, upper and lower gap S2 is there is between the pixel electrode of neighbor.Gap S1 and S2 is the least, pixel
Light utilization ratio is the highest.The factor limiting S1 with S2 size includes: the exposure accuracy of exposure machine;Between adjacent pixel electrodes voltage
Interference strength.Typically, gap S1 and S2 is at about 5um.
Transparency electrode 106 is distributed in the region surrounded by scan line and data wire.Square transparency electrode 106 left side with
Data wire keeps interval L1, keeps interval L3 on right side and data wire;Square transparency electrode 106 is between upside and scan line keep
Every L2, keep interval L4 in downside and scan line.The current potential of square transparency electrode 106 passes through public electrode wire 105 from display
Outside input.In fig. 2, pixel electrode 108 partly overlaps with square transparency electrode 106, forms the storage electric capacity Cs of pixel.
The pixel that the present invention provides, square transparency electrode is transparent conductive film, mainly has metal film system, oxidation film
System, other compound film systems, polymeric membrane system, compound film system etc..Specifically have ITO (tin dope three Indium sesquioxide .), AZO (mix by aluminum
Miscellaneous zinc oxide), nano-silver thread, Graphene etc..
In the dot structure shown in Fig. 1, square transparent electrode layer can be distributed in the top of data line layer, i.e. common electrical
The top of polar curve 105;The lower section of data line layer, the i.e. lower section of public electrode wire 105 can also be distributed in.
Fig. 3 A is for schematically showing array base palte side of the present invention dot structure floor map;Fig. 3 B is for schematically showing this
Dot structure cross-sectional view along AA ' direction in invention Fig. 3 A.In conjunction with Fig. 3 A, 3B, in pixel A A ' cross section in direction
Figure, corresponding hierarchical relationship is: be distributed scan line 101 above the underlay substrate such as glass, plastics 111, in scan line 101
Side's distribution gate insulator 112, is distributed semiconductor layer 102 above gate insulator 112, divides above semiconductor layer 102
Cloth data wire (source electrode) 103 and drain electrode 104, be distributed square transparency electrode 106, in square transparency electrode above data wire 103
Distribution protection insulating barrier 113 above in the of 106, is distributed insulating thick film layer 114, at insulating thick film layer above protection insulating barrier 113
The top distribution pixel electrode 108 of 114, pixel electrode 108 is by running through insulating thick film layer 114 and protecting connecing of insulating barrier 113
Contact hole 107 is electrically connected with drain electrode 106 realization.According to actual needs, it is convenient to omit protection insulating barrier 113.
In conjunction with Fig. 1 and Fig. 3 A, 3B, Fig. 4, the storage electric capacity that pixel electrode and square transparency electrode are formed in overlapping region
Cs.Because pixel electrode and square transparency electrode are all transparent conductive films, the region of lap is still that transmission region, this
The structure design of sample can improve the light utilization ratio of pixel.
The above embodiment of the present invention uses square transparency electrode and is positioned at the distribution mode above public electrode wire, this
Bright another embodiment proposes again a kind of array base palte, roughly the same with the structure of above-described embodiment, differs only in transparency electrode
It is positioned at below public electrode wire.
Fig. 5 is for schematically showing liquid crystal indicator cross-sectional view of the present invention.As it is shown in figure 5, the present invention also carries
Supply a kind of liquid crystal indicator, including: the respective embodiments described above and the array base palte 100 of corresponding each embodiment, opposed base
Plate 200, and it is located in the liquid crystal functional layer 300 between this array base palte 100 and this counter substrate 200.
Fig. 6 is for schematically showing liquid crystal indicator counter substrate planar structure schematic diagram of the present invention.As shown in Figure 6, should
The counter substrate 200 that liquid crystal display device uses, including underlay substrate 211 (not shown), public electrode 201, light-shielding pattern
202, spacer 203.As required, it is convenient to omit light-shielding pattern 202.In the figure 7, at counter substrate 200 and array base palte
It is liquid crystal functional layer 300 between 100, including counter substrate side alignment film 303, liquid crystal 301, array base palte side alignment film 302.
This liquid crystal display device use counter substrate 200 structure as shown in Figure 6, including underlay substrate 211 (in figure not
Show), public electrode 201, light-shielding pattern 202, spacer 203.As required, it is convenient to omit light-shielding pattern 202.As required,
Redness, green, blue isochrome resistance layer can be used.
As it is shown in figure 5, transparency electrode 103 and the public electrode 201 in counter substrate, current potential is fixed, not with pixel voltage
Change and change.Preferably, transparency electrode 103 is equal with the current potential of the public electrode 201 in counter substrate.At gap S1 and
S2 region, owing to the potential difference between transparency electrode 103 and public electrode 201 is 0, is positioned at the Liquid Crystal Molecules Alignment shape in this region
State is fixed, and does not changes with the change of pixel voltage, and the state of liquid crystal molecule is controlled.Even if as it is shown in fig. 7, at pixel electrode
Applying various different current potential between 108 from public electrode 201, at gap S1 and the liquid crystal molecule in S2 region, ordered state is all
It is fixing.
For using UV2The liquid crystal display mode of A technology, in order to block gap S1 and the transmitted light in S2 region, often
Under black pattern, the potential difference between the square transparency electrode on array base palte and the public electrode in counter substrate is set to 0, often
One high voltage is set between the square transparency electrode on array base palte and the public electrode in counter substrate under white mode, typically
More than 5V.
The invention provides the manufacture method of array base palte, as a example by the section structure shown in Fig. 3, be given shown in Fig. 2
The Making programme of the different layers of dot structure:
First, as shown in Figure 8 A, scan line 101, gate insulator, and quasiconductor ditch are sequentially formed on the transparent substrate
Road 102 pattern.
Then, as shown in Figure 8 B, above semiconductor channel 102, public electrode wire 105, data wire (source electrode) are formed
103 patterns and drain electrode 104 patterns.
Then, as shown in Figure 8 C, the most square one-tenth square transparency electrode 106.Square transparency electrode 106 and left side
Data wire keep interval L1, and right side data wire keep interval L2, and upside scan line keep interval L2, with downside
Scan line keeps interval L4.
Then, as in fig. 8d, priority covering protection insulating barrier and insulating thick film above square transparency electrode 106
Layer, forms contact hole 107 pattern by etching above drain electrode 104, forms pixel electrode 108 pattern, last shape the most again
The basic structure of pixel, as shown in Figure 2.
In order to reach above-mentioned or other purpose, further aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator
Manufacture method, including: provide array basal plate, formed first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern bag
Include plural number bar scan line;The pattern of this first metal layer is formed gate insulator, is formed above this gate insulator
Semiconductor pattern, then forms transparency electrode by typography, and typography directly forms the transparent electrical with conducting function
Pole pattern, it is not necessary to carry out photoetching process, it is unfavorable not result in the semiconductor pattern being similarly formed above gate insulator
Impact;Forming second layer metal Thinfilm pattern in this transparency electrode, this second layer metal Thinfilm pattern includes that plural number bar is public
Common-battery polar curve, plural number data line, this public electrode wire is arranged between two adjacent data wires, this plural number data line and
This plural number bar scan line is cross arranged crosswise;Also include that thin film transistor (TFT) drains, and this public electrode wire covers saturating at this
The surface of prescribed electrode, in the region that this plural number data line and this plural number bar scan line limit, forms a plurality of repetition
The transparency electrode unit of arrangement, this transparency electrode unit is electrically connected with this public electrode wire;At this second layer metal thin film figure
Being distributed insulating barrier in case, be distributed pixel electrode on which insulating layer, this pixel electrode is with each this plural number data line and to be somebody's turn to do
Centered by cross intersection region between plural number bar scan line, form the pixel electrode unit of a plurality of repeated arrangement, this picture
Element electrode unit is electrically connected with drain electrode realization by running through a contact hole of this insulating barrier.
The dot structure that patent of the present invention proposes, has a following features:
(1) metal wire is less but also carefully: only scan line, public electrode wire and data wire three metal line.Metal wire is few, gold
Belong to shading the least with reflective impact.Across protective layer with thick between scan line, public electrode wire, data wire and pixel electrode
Film layer, the coupling electric capacity between pixel is little, and it is the thinnest that metal wire can do.Metal wire is thin, and metal shading is with reflective impact just
Little.
(2) LCDs is in order to reduce flicker, and the voltage using some reversion drive pattern, i.e. neighbor is positive and negative
Opposite polarity.The planar public electrode of patent of the present invention is distributed in the lower section of adjacent four pixels, serves shielding neighbor
Power line interference between electrode, it is ensured that the liquid crystal between pixel electrode is interference-free.
(3) for using UV2The liquid crystal display mode of A technology, scan line is exactly that liquid crystal display farmland is with adjacent with data wire
Demarcation line between liquid crystal display farmland, the black stricture of vagina between display farmland is dispensed directly onto above metal wire, the most additionally takies light tight
Region, the light utilization ratio of pixel is high.
(4) for using in the VA Display Technique of normally black mode, the transparency electrode on array base palte and counter substrate
Potential difference between public electrode is set to 0, in gap S1 and S2 region, and the black state that liquid crystal display is stable, such that it is able between Sheng Lveing
The black matrix" in counter substrate directly over gap S1 and S2.Use technical scheme, transparency electrode and pixel electrode
Between overlapping area abundant, the electric lines of force of pixel electrode focuses primarily upon between pixel electrode and transparency electrode, is dispersed into picture
Electric lines of force outside element electrode is few, and the disturbance to gap S1 and the liquid crystal in S2 region is faint, can solve pixel electrode voltage (electricity
The line of force) leakage problem of gap S1 and S2 that causes of disturbance.
(5) for using in the VA Display Technique of normal white mode, the transparency electrode on array base palte and counter substrate
Potential difference between public electrode is set to 6V, in gap S1 and S2 region, and the black state that liquid crystal display is stable, such that it is able between Sheng Lveing
The black matrix" in counter substrate directly over gap S1 and S2.Use technical scheme, transparency electrode and pixel electrode
Between overlapping area abundant, the electric lines of force of pixel electrode focuses primarily upon between pixel electrode and transparency electrode, is dispersed into picture
Electric lines of force outside element electrode is few, and the disturbance to gap S1 and the liquid crystal in S2 region is faint, can solve pixel electrode voltage (electricity
The line of force) leakage problem of gap S1 and S2 that causes of disturbance.
The preferred embodiment of the present invention described in detail above, but, the present invention is not limited in above-mentioned embodiment
Detail, in the technology concept of the present invention, technical scheme can be carried out multiple equivalents, this
A little equivalents belong to protection scope of the present invention.
It is further to note that each the concrete technical characteristic described in above-mentioned detailed description of the invention, at not lance
In the case of shield, can be combined by any suitable means.In order to avoid unnecessary repetition, the present invention to various can
The compound mode of energy illustrates the most separately.
Claims (10)
1. an array base palte for liquid crystal indicator, including:
One substrate, is provided with the plural data line in cross arranged crosswise and plural number bar scan line;
Plural number bar public electrode wire, this public electrode wire is arranged between two adjacent data wires;
Active member, is arranged on the cross intersection region of this plural number data line and this plural number bar scan line;
Pixel electrode, is formed with the pixel electrode unit of a plurality of repeated arrangement centered by each this cross intersection region,
And be electrically connected with this active member by one first contact hole;
Transparency electrode, in the region with this plural number data line of cross arranged crosswise and the restriction of this plural number bar scan line, shape
The transparency electrode unit of a repeated arrangement that pluralizes, this transparency electrode unit is electrically connected with this public electrode wire.
Array base palte the most according to claim 1, it is characterised in that also include: this transparency electrode and this pixel electrode exist
Having, on the direction vertical with this array base palte, the region that partly overlaps, this overlapping region forms storage capacitor.
Array base palte the most according to claim 2, it is characterised in that also include: the pixel electricity of these a plurality of repeated arrangement
Spacing distance it is provided with between pole unit.
Array base palte the most according to claim 2, it is characterised in that also include: two adjacent data wires and two adjacent
In the region that scan line limits, forming a transparency electrode unit, the surrounding border of this transparency electrode unit is two adjacent with this
Data wire and this two adjacent scan line spacings a certain distance.
Array base palte the most according to claim 1 and 2, it is characterised in that this transparency electrode is dispensed directly onto public electrode
The top of line or the lower section of public electrode wire.
Array base palte the most according to claim 1 and 2, it is characterised in that this transparency electrode is distributed in across dielectric
The top of public electrode wire or the lower section of public electrode wire, electrically connected with this public electrode wire by one second contact hole.
7. according to the array base palte one of claim 1-6 Suo Shu, it is characterised in that the material of this transparency electrode uses tin dope
Three Indium sesquioxide .s, aluminium-doped zinc oxide, nano-silver thread or Graphene.
8. a liquid crystal indicator, including:
Array base palte as described in claim 1-7;
Counter substrate, is oppositely arranged with this array base palte;
Liquid crystal layer, is interposed between this array base palte and this counter substrate;
Also include public electrode, be distributed in this counter substrate in face electrode pattern;
Wherein, this common electrode layer and this transparency electrode apply same potential voltage simultaneously.
9. a manufacture method for the array base palte of liquid crystal indicator, including:
Thering is provided array basal plate, form first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern includes plural number bar scanning
Line;
The pattern of this first metal layer is formed gate insulator, above this gate insulator, forms semiconductor pattern;
On this semiconductor pattern, forming second layer metal Thinfilm pattern, this second layer metal Thinfilm pattern includes that plural number bar is public
Common-battery polar curve, plural number data line, this public electrode wire is arranged between two adjacent data wires, this plural number data line and
This plural number bar scan line is cross arranged crosswise;Also include that thin film transistor (TFT) drains;
This second layer metal Thinfilm pattern is formed transparency electrode, and this transparency electrode directly overlays this public electrode wire
Surface;
Being distributed insulating barrier in this transparency electrode, be distributed pixel electrode on which insulating layer, this pixel electrode is to answer with each this
Centered by cross intersection region between several data wires and this plural number bar scan line, form the pixel of a plurality of repeated arrangement
Electrode unit, this pixel electrode unit is electrically connected with drain electrode realization by running through a contact hole of this insulating barrier;
Wherein, in the region that this plural number data line and this plural number bar scan line limit, the saturating of a plurality of repeated arrangement is formed
Prescribed electrode unit, this transparency electrode unit is electrically connected with this public electrode wire.
10. a manufacture method for the array base palte of liquid crystal indicator, including:
Thering is provided array basal plate, form first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern includes plural number bar scanning
Line;
The pattern of this first metal layer is formed gate insulator, above this gate insulator, forms semiconductor pattern,
Then transparency electrode is formed by mode of printing;
Forming second layer metal Thinfilm pattern in this transparency electrode, this second layer metal Thinfilm pattern includes plural number bar common electrical
Polar curve, plural number data line, this public electrode wire is arranged between two adjacent data wires, and this plural number data line is multiple with this
Several scan lines are cross arranged crosswise;Also include that thin film transistor (TFT) drains, and this public electrode wire covers at this transparent electrical
The surface of pole, in the region that this plural number data line and this plural number bar scan line limit, forms a plurality of repeated arrangement
Transparency electrode unit, this transparency electrode unit and this public electrode wire are electrically connected with;
Being distributed insulating barrier on this second layer metal Thinfilm pattern, be distributed pixel electrode on which insulating layer, this pixel electrode is
Centered by the cross intersection region between each this plural number data line and this plural number bar scan line, form a plurality of repetition
The pixel electrode unit of arrangement, this pixel electrode unit realizes electricity even by running through a contact hole of this insulating barrier with drain electrode
Connect.
Wherein, this semiconductor pattern and this transparency electrode are the same Rotating fields of different materials.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610453996.0A CN106019744A (en) | 2016-06-21 | 2016-06-21 | Array substrate, manufacturing method of array substrate and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610453996.0A CN106019744A (en) | 2016-06-21 | 2016-06-21 | Array substrate, manufacturing method of array substrate and display device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN106019744A true CN106019744A (en) | 2016-10-12 |
Family
ID=57085710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610453996.0A Pending CN106019744A (en) | 2016-06-21 | 2016-06-21 | Array substrate, manufacturing method of array substrate and display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106019744A (en) |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102651371A (en) * | 2012-04-06 | 2012-08-29 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method and display device thereof |
US20120307172A1 (en) * | 2010-02-04 | 2012-12-06 | Sharp Kabushiki Kaisha | Liquid-crystal display device |
CN103235456A (en) * | 2013-04-23 | 2013-08-07 | 合肥京东方光电科技有限公司 | Array substrate, manufacturing method thereof and display device |
CN104049430A (en) * | 2014-06-18 | 2014-09-17 | 南京中电熊猫液晶显示科技有限公司 | Array substrate, display device and manufacturing method of array substrate |
US20150185578A1 (en) * | 2013-12-26 | 2015-07-02 | Japan Display Inc. | Liquid crystal display device |
CN104865766A (en) * | 2015-06-17 | 2015-08-26 | 南京中电熊猫液晶显示科技有限公司 | Pixel structure of multi-domain vertical alignment type liquid crystal |
CN105223749A (en) * | 2015-10-10 | 2016-01-06 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
CN105487300A (en) * | 2016-01-27 | 2016-04-13 | 京东方科技集团股份有限公司 | Pixel unit, array substrate and manufacturing method of array substrate |
CN205787505U (en) * | 2016-06-21 | 2016-12-07 | 上海纪显电子科技有限公司 | Array base palte and display device |
-
2016
- 2016-06-21 CN CN201610453996.0A patent/CN106019744A/en active Pending
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120307172A1 (en) * | 2010-02-04 | 2012-12-06 | Sharp Kabushiki Kaisha | Liquid-crystal display device |
CN102651371A (en) * | 2012-04-06 | 2012-08-29 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method and display device thereof |
CN103235456A (en) * | 2013-04-23 | 2013-08-07 | 合肥京东方光电科技有限公司 | Array substrate, manufacturing method thereof and display device |
US20150185578A1 (en) * | 2013-12-26 | 2015-07-02 | Japan Display Inc. | Liquid crystal display device |
CN104049430A (en) * | 2014-06-18 | 2014-09-17 | 南京中电熊猫液晶显示科技有限公司 | Array substrate, display device and manufacturing method of array substrate |
CN104865766A (en) * | 2015-06-17 | 2015-08-26 | 南京中电熊猫液晶显示科技有限公司 | Pixel structure of multi-domain vertical alignment type liquid crystal |
CN105223749A (en) * | 2015-10-10 | 2016-01-06 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
CN105487300A (en) * | 2016-01-27 | 2016-04-13 | 京东方科技集团股份有限公司 | Pixel unit, array substrate and manufacturing method of array substrate |
CN205787505U (en) * | 2016-06-21 | 2016-12-07 | 上海纪显电子科技有限公司 | Array base palte and display device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101668380B1 (en) | Liquid crsytal display | |
US9595543B2 (en) | Array substrate for liquid crystal display devices and method of manufacturing the same | |
US8564745B2 (en) | Liquid crystal display having more than one color portion within a pixel | |
JP5013554B2 (en) | Liquid crystal display | |
US6839114B2 (en) | Substrate for in-plane switching mode liquid crystal display device with capacitors connected by extending lines and method for fabricating the same | |
US8098358B2 (en) | Liquid crystal display | |
US20110157504A1 (en) | Liquid crystal display device | |
CN100362414C (en) | Plane switching mode liquid crystal display device and fabrication method thereof | |
US8736781B2 (en) | Liquid crystal display device and method of driving the same | |
US20090279010A1 (en) | Liquid crystal display | |
CN102841466A (en) | Liquid crystal display device | |
CN102253544A (en) | Liquid crystal display device | |
US6924864B2 (en) | Array substrate for in-plane switching mode liquid crystal display device and method of fabricating the same | |
CN106501982A (en) | Compound liquid crystal indicator | |
KR20120089965A (en) | Liquid crystal display | |
US10627680B2 (en) | Display panel and display device | |
CN108490705B (en) | Array substrate, liquid crystal display panel and display device | |
CN205787506U (en) | Array base palte and liquid crystal indicator | |
CN106200158A (en) | Display floater and preparation method thereof, display device | |
CN205787505U (en) | Array base palte and display device | |
CN205787507U (en) | Display device and array base palte | |
JP2012185513A (en) | Liquid crystal display device | |
KR101201706B1 (en) | Liquid crystal display device and method of fabricating thereof | |
KR20040001324A (en) | Position sensitive liquid crystal display device | |
CN106019745A (en) | Display device, array substrate and production method of array substrate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20161012 |
|
WD01 | Invention patent application deemed withdrawn after publication |