CN102253544A - Liquid crystal display device - Google Patents
Liquid crystal display device Download PDFInfo
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- CN102253544A CN102253544A CN 201110215490 CN201110215490A CN102253544A CN 102253544 A CN102253544 A CN 102253544A CN 201110215490 CN201110215490 CN 201110215490 CN 201110215490 A CN201110215490 A CN 201110215490A CN 102253544 A CN102253544 A CN 102253544A
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Abstract
The invention discloses a liquid crystal display device. The liquid crystal display device comprises a first substrate and a second substrate which are oppositely arranged, and a liquid crystal layer which is clamped between the first substrate and the second substrate. A shading metal layer is arranged on the first substrate; a first insulation layer is positioned on the metal layer; an active layer is positioned on the first insulation layer; a second insulation layer is positioned on the active layer; a scan line and a grid of a thin-film transistor formed by the scan line are positioned on the second insulation layer; a third insulation layer is positioned on the scan line; a data line is positioned on a third insulation layer; the metal of the data line forms a source and a drain of the thin-film transistor; a fourth insulation layer is positioned on the data line; a pixel electrode is positioned on the fourth insulation layer; a contact hole is formed near the grid; and the pixel electrode is connected with the drain through the contact hole. In the invention, the alignment limit between a color film substrate and an array substrate is cancelled; and the aperture opening ratio of a pixel is improved.
Description
Technical field
The present invention relates to a kind of display device, particularly a kind of liquid crystal indicator.
Background technology
Usually, liquid crystal display (LCD) device has upper substrate and infrabasal plate, have each other certain intervals and mutually over against.Be formed on two substrates a plurality of electrodes mutually over against.Liquid crystal is clipped between upper substrate and the infrabasal plate.Voltage is applied on the liquid crystal by the electrode on the substrate, thus then according to the voltage that acted on change the arrangement display image of liquid crystal molecule, because liquid crystal indicator is not launched light as mentioned above, it needs light source to come display image.Therefore, liquid crystal indicator has the backlight that is positioned at the liquid crystal panel back.Thereby the arrangement according to liquid crystal molecule is controlled from backlight quantity of incident light display image.As shown in Figure 1, accompany color membrane substrates 104, common electrode 105, liquid crystal layer 106 and array base palte 107 between upper strata polaroid 101 and the lower floor's polaroid 109, liquid crystal molecule is the material with refractive index and dielectric constant anisotropy.On array base palte 107, form pixel electrode 108, thin film transistor (TFT) (TFT) 114, array sub-pixel 111, sweep trace 110, data line 112 etc.Data line 112 is connected to the drain electrode of TFT, and pixel electrode 108 is connected to source class, and sweep trace 110 is connected to grid.The light process that backlight 113 sends is polaroid 109 down, becomes the polarized light with certain polarization direction.Institute's making alive between the thin film transistor (TFT) 114 control pixel electrodes 108, and this voltage acts on the polarization direction that liquid crystal is controlled polarized light, polarized light sees through corresponding color film 102 backs and forms monochromatic polarized light, if polarized light can penetrate upper strata polaroid 101, then demonstrates corresponding color; Electric field intensity difference, the deflection angle of liquid crystal molecule are also different, and the light intensity that sees through is different, and the brightness of demonstration is also different.The combination of the different light intensity by three kinds of colors of RGB shows motley image.
Liquid crystal indicator shown in Figure 1 need carry out the contraposition of array base palte and color membrane substrates, in order to guarantee light leakage phenomena not occur after the contraposition, need accomplish certain width to the live width of the black matrix" on the color membrane substrates 103, causes pixel aperture ratio to descend.In order to cancel the aperture opening ratio decline that color membrane substrates and array base palte contraposition bring, companies such as Toshiba have proposed the COA technology skill of (Color filter on array prepares chromatic photoresist on array base palte).The COA technology is because of the contraposition problem of no color membrane substrates and array base palte, so can reduce the processing procedure difficulty of liquid crystal indicator.But the COA technology can cause the overall acceptability rate of substrate to descend.In addition, in order not influence the normal operation of TFT, the specific inductive capacity that also requires chromatic photoresist is less than 3.5.With the COA technology type seemingly, also have the technology of AOC (Array on Color filter is made in array on the color film), do not need to carry out the contraposition of color membrane substrates and array base palte yet.There is the low problem of device overall acceptability rate equally in the AOC technology.
Summary of the invention
Goal of the invention:, the purpose of this invention is to provide a kind of liquid crystal indicator that promotes pixel aperture ratio at the problem and shortage of above-mentioned existing existence.
Technical scheme: for achieving the above object, the technical solution used in the present invention is a kind of liquid crystal indicator, comprise first substrate and second substrate that are oppositely arranged, and the liquid crystal layer of clamping between described first substrate and second substrate, described first substrate is provided with the shading metal level, first insulation course is positioned at the upper strata of this shading metal level, active layer is positioned at the first insulation course upper strata, second insulation course is positioned at the active layer upper strata, the grid of the thin film transistor (TFT) that sweep trace and sweep trace form is positioned at the second insulation course upper strata, the 3rd insulation course is positioned at the sweep trace upper strata, data line bit is in the 3rd insulation course upper strata, the metal of data line forms the source class and the drain electrode of thin film transistor (TFT), the 4th insulation course is positioned at the data line upper strata, and pixel electrode is positioned at the 4th insulation course upper strata, the other contact hole that is provided with of grid, pixel electrode connects drain electrode by this contact hole, does not have black matrix" on second substrate.On second substrate, can design the pattern of chromatograph and other organic resin layers, also can be on first substrate the design of chromatograph and other organic resin layers.
Described shading metal level can connect the current potential of public electrode or the electronegative potential on the sweep trace.
Described thin film transistor (TFT) can be top gate structure, and the grid of thin film transistor (TFT) is positioned at the top of raceway groove.
But described shading metal level can whole distribution at non-display area in the viewing area array distribution.
The sweep trace of described viewing area and data line all can roughly be positioned at the top center position of shading metal level.Below the sweep trace or data line of size broad, the pattern of shading metal level can hollow out, but the hollow out zone must guarantee to be covered fully by the sweep trace of top or data line.
May have the zone of light leak at described pixel electrode periphery, the pattern of pixel electrode and shading metal level can have overlapping.The light shield layer of non-display area can carry out hollow out or omission as required near glass edge one side, need adopt black adhesive tape to carry out shading treatment on the corresponding position when liquid crystal indicator is assembled.
Beneficial effect: the contraposition restriction of cancellation color membrane substrates and array base palte, improve pixel aperture ratio; Black matrix" on the cancellation color membrane substrates, color membrane structure promptly can be formed at separately on the color membrane substrates, also can be formed on the array base palte; Improve the qualification rate decline problem that the use of chromatic photoresist material in AOC technology or the COA technology brings; Improve resin black matrix and be made in the high section difference phenomenon of bringing on the array base palte, and the demonstration that the high section difference of elimination causes is bad; Thin film transistor (TFT) on the array base palte is made on the shading metal level, and adopts top gate structure, the effectively channel length of oxide-semiconductor control transistors: the width by reduction of gate dwindles transistorized channel length, thereby improves transistorized charging and discharging capabilities; By the positioning action of grid, accurately control on the face of viewing area characteristics of transistor everywhere.
Description of drawings
Fig. 1 is the structural representation of traditional active matrix liquid crystal display apparatus;
Fig. 2 is TN (Twisted Nematic, a twisted-nematic) panel pixels structural representation;
Fig. 3 is that the a-a ' of Fig. 2 is to cut-open view;
Fig. 4 is IPS (In-Plane Switching, an in-plane switching) panel pixels structural representation;
Fig. 5 is VA (Vertical Alignment, a vertical orientation) panel pixels structural representation;
Fig. 6 is the structure distribution synoptic diagram of the pattern of shading metal level at viewing area and non-display area;
When Fig. 7 assembles for liquid crystal indicator around the non-display area position view of rubberizing bar.
Embodiment
Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiment only is used to the present invention is described and is not used in and limit the scope of the invention, after having read the present invention, those skilled in the art all fall within the application's claims institute restricted portion to the modification of the various equivalent form of values of the present invention.
Embodiment 1:
As shown in Figure 2, on first substrate (array base palte, not shown), at first form one deck shading metal layer pattern 1, form active layer (not shown), sweep trace 110, data line 112, contact hole 5 and pixel electrode 108 then successively.Sweep trace 110 and data line 112 are positioned at the top center of shading metal layer pattern 1, and pixel electrode 108 carries out overlapping design with light-shielding pattern around the pixel openings zone.As shown in Figure 3, in array base palte 107 1 sides, form the thin film transistor (TFT) (referring to that the grid 3 of thin film transistor (TFT) is positioned at the top of raceway groove 6) of top gate structure, shading metal layer pattern 1 near the thickness of the part of array base palte 107 and the insulation course between the active layer 7 can do as required very thick, such as
Or the like.The formation technology of active layer is as follows: used CVD (chemical vapor deposition, chemical vapor deposition) to generate one deck intrinsic amorphous silicon layer (a-Si) 8 before this, and etching forms block silicon island shape.On the silicon island, generate a layer insulating then with CVD.After forming sweep trace 110 and grid 3 patterns on this layer insulating, generate a layer insulating with CVD again.Then, form contact hole 5, and draw the source electrode 2 that forms thin film transistor (TFT) with the metal of 112 layers of data lines and drain 4 in a side of grid 3.
Embodiment 2:
As shown in Figure 4, shading metal layer pattern 1 connects public electrode 9, forms memory capacitance when forming lightproof area.Form sweep trace 110, data line 112, pixel electrode 108 and thin film transistor (TFT) (not shown) subsequently.According to the different structure of IPS panel pixel, the embodiment difference, but the shading essence of shading metal layer pattern is constant.
Embodiment 3:
As shown in Figure 5, VA panel pixels similar is in the TN panel, and difference is that pixel electrode 108 is provided with slit (Slit) 10.According to the different structure of VA pixel, the embodiment difference, but the shading essence of shading metal layer pattern is constant.
Above embodiment has only illustrated the scheme of array base palte one side, also can chromatograph or other organic resin layers on the former color membrane substrates (second substrate) be formed on first substrate.Concrete scheme both can generate array structure after finishing chromatograph, also can form chromatograph or other organic resin layers after array structure is finished.
The shading metal layer pattern is in the structure of viewing area and non-display area as shown in Figure 6: shading metal layer pattern 1 is array distribution in the viewing area 12, and non-display area (outside the viewing area 12, in the glass profile 13) is whole distribution.White portion 11 in the viewing area is the pixel openings part.If the metal wiring of shading metal layer pattern top has certain width, the light-shielding pattern of these distribution belows can carry out hollow out to be handled.But, must guarantee that distribution can cover the hollow out zone fully.
As shown in Figure 7, the shading metal level of non-display area can carry out hollow out or omission as required near glass edge one side, need adopt black adhesive tape 14 to carry out shading treatment on the corresponding position when liquid crystal indicator is assembled.
Claims (7)
1. liquid crystal indicator, comprise first substrate and second substrate that are oppositely arranged, and the liquid crystal layer of clamping between described first substrate and second substrate, it is characterized in that: described first substrate is provided with the shading metal level, first insulation course is positioned at the upper strata of this shading metal level, active layer is positioned at the first insulation course upper strata, second insulation course is positioned at the active layer upper strata, the grid of the thin film transistor (TFT) that sweep trace and sweep trace form is positioned at the second insulation course upper strata, the 3rd insulation course is positioned at the sweep trace upper strata, data line bit is in the 3rd insulation course upper strata, the metal of data line forms the source class and the drain electrode of thin film transistor (TFT), and the 4th insulation course is positioned at the data line upper strata, and pixel electrode is positioned at the 4th insulation course upper strata, the other contact hole that is provided with of grid, pixel electrode connects drain electrode by this contact hole.
2. according to the described liquid crystal indicator of claim 1, it is characterized in that: described shading metal level connects the current potential of public electrode or connects electronegative potential on the sweep trace.
3. according to the described liquid crystal indicator of claim 1, it is characterized in that: also comprise the chromatograph pattern that is located on described first substrate or second substrate.
4. according to the described liquid crystal indicator of claim 1, it is characterized in that: the pattern of described pixel electrode and shading metal level has overlapping.
5. according to the described liquid crystal indicator of claim 1, it is characterized in that: described shading metal level is in the viewing area array distribution, in whole distribution of non-display area.
6. according to the described liquid crystal indicator of claim 5, it is characterized in that: the sweep trace of described viewing area and data line all roughly are positioned at the top center position of shading metal level, and the sweep trace of non-display area and data line all are positioned at the top of shading metal level.
7. according to the described liquid crystal indicator of claim 1, it is characterized in that: described thin film transistor (TFT) is a top gate structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN 201110215490 CN102253544A (en) | 2011-07-29 | 2011-07-29 | Liquid crystal display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201110215490 CN102253544A (en) | 2011-07-29 | 2011-07-29 | Liquid crystal display device |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103543565A (en) * | 2012-07-13 | 2014-01-29 | 群康科技(深圳)有限公司 | Displayer |
| CN104657024A (en) * | 2015-03-13 | 2015-05-27 | 京东方科技集团股份有限公司 | Built-in touch screen and display device |
| CN105652530A (en) * | 2016-02-19 | 2016-06-08 | 友达光电股份有限公司 | Liquid crystal display panel |
| US9423644B2 (en) | 2012-07-13 | 2016-08-23 | Innolux Corporation | Display |
| CN106605169A (en) * | 2014-09-05 | 2017-04-26 | 凸版印刷株式会社 | Liquid crystal display device and display device substrate |
| CN108646488A (en) * | 2018-05-18 | 2018-10-12 | 信利半导体有限公司 | A kind of liquid crystal display device |
| CN108761887A (en) * | 2018-04-28 | 2018-11-06 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN109449164A (en) * | 2018-10-12 | 2019-03-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of TFT substrate, display panel and display device |
| CN110426904A (en) * | 2019-06-27 | 2019-11-08 | 惠科股份有限公司 | Array substrate and display equipment |
| CN111240115A (en) * | 2020-03-17 | 2020-06-05 | 昆山龙腾光电股份有限公司 | Thin film transistor array substrate, manufacturing method thereof and liquid crystal display panel |
| CN114613817A (en) * | 2022-03-02 | 2022-06-10 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, preparation method thereof and display panel |
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Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103543565A (en) * | 2012-07-13 | 2014-01-29 | 群康科技(深圳)有限公司 | Displayer |
| US9423644B2 (en) | 2012-07-13 | 2016-08-23 | Innolux Corporation | Display |
| US9897845B2 (en) | 2012-07-13 | 2018-02-20 | Innolux Corporation | Display |
| CN106605169A (en) * | 2014-09-05 | 2017-04-26 | 凸版印刷株式会社 | Liquid crystal display device and display device substrate |
| CN104657024A (en) * | 2015-03-13 | 2015-05-27 | 京东方科技集团股份有限公司 | Built-in touch screen and display device |
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| WO2019205341A1 (en) * | 2018-04-28 | 2019-10-31 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN108761887B (en) * | 2018-04-28 | 2020-03-27 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| US11205666B2 (en) | 2018-04-28 | 2021-12-21 | Wuhan China Star Optoelectronics Technology Co., Ltd | Array substrate and display panel |
| CN108646488A (en) * | 2018-05-18 | 2018-10-12 | 信利半导体有限公司 | A kind of liquid crystal display device |
| CN109449164A (en) * | 2018-10-12 | 2019-03-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of TFT substrate, display panel and display device |
| CN110426904A (en) * | 2019-06-27 | 2019-11-08 | 惠科股份有限公司 | Array substrate and display equipment |
| CN111240115A (en) * | 2020-03-17 | 2020-06-05 | 昆山龙腾光电股份有限公司 | Thin film transistor array substrate, manufacturing method thereof and liquid crystal display panel |
| CN111240115B (en) * | 2020-03-17 | 2022-09-20 | 昆山龙腾光电股份有限公司 | Thin film transistor array substrate, manufacturing method thereof and liquid crystal display panel |
| CN114613817A (en) * | 2022-03-02 | 2022-06-10 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, preparation method thereof and display panel |
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Application publication date: 20111123 |