CN105957865A - MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated with trench Schottky - Google Patents
MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated with trench Schottky Download PDFInfo
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- CN105957865A CN105957865A CN201610490386.8A CN201610490386A CN105957865A CN 105957865 A CN105957865 A CN 105957865A CN 201610490386 A CN201610490386 A CN 201610490386A CN 105957865 A CN105957865 A CN 105957865A
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- 239000004065 semiconductor Substances 0.000 title abstract description 5
- 230000005669 field effect Effects 0.000 title abstract 2
- 229910044991 metal oxide Inorganic materials 0.000 title abstract 2
- 150000004706 metal oxides Chemical class 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 23
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 230000000694 effects Effects 0.000 abstract description 10
- 238000000034 method Methods 0.000 abstract description 5
- 238000005516 engineering process Methods 0.000 abstract description 2
- 239000000969 carrier Substances 0.000 abstract 1
- 238000002360 preparation method Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000007943 implant Substances 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
Abstract
The invention belongs to a semiconductor technology, and particularly relates to an MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated with trench Schottky. The MOSFET integrated with the trench Schottky is characterized in that a Schottky diode formed by Schottky contact and a substrate is integrated in the MOSFET; a Schottky junction is provided with a planar Schottky junction positioned on a surface and a trench Schottky junction positioned in a body; and the area of the Schottky junction is increased under the condition of occupying the same chip area, so that higher current can be carried. A plurality of P-type heavily-doped rings are further arranged below the trench Schottky junction, and a Schottky diode is switched on at a relatively low voltage to form a conductive path when a body diode is switched on; and when the voltage is boosted to be over 0.5V, the P-type heavily-doped rings below the trench Schottky junction inject minority carriers into an N-type drift region, so that forward break-over voltage drop of the Schottky junction is reduced, and a conductivity modulation effect is achieved. Through adoption of the method, body diode break-over loss of the MOSFET can be reduced, and reverse electric leakage of the Schottky diode is reduced through the P-type heavily-doped rings at the same time.
Description
Technical field
The invention belongs to power semiconductor field, particularly to the MOSFET of a kind of integrated trench schottky.
Background technology
Synchronous rectification in high performance converters design is most important for low-voltage, the application of high electric current, this is because by by Xiao Te
Base rectification replaces with synchronous rectification MOSFET can significantly improve efficiency and power density.In actual applications, synchronous rectification
The power attenuation of MOSFET is mainly made up of conduction loss, switching loss and body diode conduction loss etc..Such as, at DC-DC
In change-over circuit, in the power attenuation of the power switch on low limit, the conduction loss of body diode still affects the overall damage of MOSFET
Consumption.Along with power switch application medium-high frequency and the raising of the requirement of big electric current, the demand reducing power attenuation receives more and more
Attention.
In order to reduce the power attenuation of power MOSFET body diode, use mode in parallel with Schottky diode for MOSFET,
Owing to the forward cut-in voltage (about 0.35V) of Schottky diode is less than the Built-in potential of PN junction diode (about 0.7V),
Therefore reduce body diode forward cut-in voltage, reduce the loss of body diode dead band.
The problem that when although integrated MOSFET and Schottky diode solve body diode conducting, cut-in voltage is too high, but traditional
Integration mode result in needs bigger chip area, especially bearing high current when.Meanwhile, Schottky diode
During conducting, its conduction loss is the biggest, and time reverse-biased, schottky junction leakage current is big compared to common PN junction, therefore reverse blocking electricity
Press the highest.
U.S.'s 6987305B2 patent " Intergrated FET and schottky device " is disclosed several different Xiao
Structure that Te Ji with MOSFET is integrated and manufacture method, it is proposed that the Schottky of tight type and MOSFET aggregate device, reduce
Loss, but these device usefulness still cannot meet in existing application about reducing the loss of body diode forward conduction and high driving electricity
The demand of stream.
Summary of the invention
The purpose of the present invention, it is simply that bigger in order to need when loss is relatively big when solving schottky junction forward conduction and bears big electric current
The problem of chip area, it is proposed that the MOSFET of a kind of integrated trench schottky with conductance modulation effect.
Technical scheme: the MOSFET of a kind of integrated trench schottky, including MOSFET region 11 and schottky area
12, described schottky area 12 is between the MOSFET region 11 of two symmetrically structures；Described MOSFET region 11 He
Drain electrode 15 that schottky area 12 includes being cascading from bottom to up, N-type heavy doping substrate 1, N-type drift region 2 and
Source metal 10；N-type drift region 2 upper strata of described MOSFET region 11 has p-type doped region 3, described upper surface and source
Pole metal 10 contacts, and has N-type heavily doped region 5, p-type heavily doped region 4 and the first groove 9 in described p-type doped region 3,
Described N-type heavily doped region 5 is between p-type heavily doped region 4, and the junction depth of N-type heavily doped region 5 is more than p-type heavily doped region
The junction depth of 4, described first groove 9 sequentially passes through downwards N-type heavily doped region 5 and p-type doping along p-type doped region 3 upper surface
District 3 also extends in N-type drift region 2, is filled with medium 6, is provided with polysilicon 7 in medium 6 in described first groove 9,
Described p-type heavily doped region 4, N-type heavily doped region 5 contact with source metal 10 with medium 6；The N of described schottky area 12
Type drift region 2 has multiple second groove 14 and p-type heavy doping protection ring 8, described second groove 14 is filled with metal,
The upper surface of described second groove 14 contacts with source metal 10, and the bottom of the second groove 14 is positioned at p-type heavy doping protection ring 8
In；The N-type drift region 2 of described schottky area 12 contacts formation planar Schottky contact 16, the second ditch with source metal 10
Metal in groove 14 contacts formation trench schottky contact with p-type heavy doping protection ring 8；Described polysilicon 7 is gate electrode；Institute
State doping content two orders of magnitude of doping content more than N-type drift region 2 of p-type doped region 3；Described N-type heavily doped region 5
Doping content more than two to three orders of magnitude of doping content of p-type doped region 3；The doping of described p-type heavily doped region 4 is dense
Degree is more than two to three orders of magnitude of doping content of p-type doped region 3；The doping content of described p-type heavy doping protection ring 8 is more than
Doping content an order of magnitude of N-type drift region 2.
Further, the quantity of described second groove 14 and p-type heavy doping protection ring 8 is 3
The invention have the benefit that the schottky junction of the present invention includes being positioned at the planar Schottky knot 16 on surface and internal grooved
Schottky junction, under conditions of taking identical chip area, adds the area of schottky junction, is beneficial to undertake higher electric current.
During body diode conducting, during low voltage, Schottky diode is opened, when voltage increases, more than 0.5V, then and grooved Schottky
Inject few son in the p-type heavy doping hoop N-type drift region forged, reduce schottky junction forward conduction voltage drop, there is conductance modulation
Effect.
Accompanying drawing explanation
Fig. 1 is the section knot of the MOSFET structure of a kind of integrated trench schottky with conductance modulation effect provided by the present invention
Structure schematic diagram；
Fig. 2 be a kind of integrated trench schottky with conductance modulation effect provided by the present invention MOSFET structure in Schottky
Time reverse-biased, the line that exhausts in drift region is distributed；
Fig. 3 is the MOSFET structure preparation process of a kind of integrated trench schottky with conductance modulation effect provided by the present invention
Generalized section after middle etching groove；
Fig. 4 is the MOSFET structure preparation process of a kind of integrated trench schottky with conductance modulation effect provided by the present invention
Generalized section during middle formation p-type heavily doped region protection ring 8；
Fig. 5 is that the domain of the MOSFET structure of a kind of integrated trench schottky with conductance modulation effect provided by the present invention shows
It is intended to.
Detailed description of the invention
Below in conjunction with the accompanying drawings the present invention is described in detail:
As it is shown in figure 1, the MOSFET of a kind of integrated trench schottky of the present invention, including MOSFET region 11 and schottky region
Territory 12, described schottky area 12 is between the MOSFET region 11 of two symmetrically structures；Described MOSFET region 11
The drain electrode 15 that includes being cascading from bottom to up with schottky area 12, N-type heavy doping substrate 1, N-type drift region 2
With source metal 10；N-type drift region 2 upper strata of described MOSFET region 11 has a p-type doped region 3, described upper surface with
Source metal 10 contacts, and has N-type heavily doped region 5, p-type heavily doped region 4 and the first groove 9 in described p-type doped region 3,
Described N-type heavily doped region 5 is between p-type heavily doped region 4, and the junction depth of N-type heavily doped region 5 is more than p-type heavily doped region
The junction depth of 4, described first groove 9 sequentially passes through downwards N-type heavily doped region 5 and p-type doping along p-type doped region 3 upper surface
District 3 also extends in N-type drift region 2, is filled with medium 6, is provided with polysilicon 7 in medium 6 in described first groove 9,
Described p-type heavily doped region 4, N-type heavily doped region 5 contact with source metal 10 with medium 6；The N of described schottky area 12
Type drift region 2 has multiple second groove 14 and p-type heavy doping protection ring 8, described second groove 14 is filled with metal,
The upper surface of described second groove 14 contacts with source metal 10, and the bottom of the second groove 14 is positioned at p-type heavy doping protection ring 8
In；The N-type drift region 2 of described schottky area 12 contacts formation planar Schottky contact 16, the second ditch with source metal 10
Metal in groove 14 contacts formation trench schottky contact with p-type heavy doping protection ring 8；Described polysilicon 7 is gate electrode；Institute
State doping content two orders of magnitude of doping content more than N-type drift region 2 of p-type doped region 3；Described N-type heavily doped region 5
Doping content more than two to three orders of magnitude of doping content of p-type doped region 3；The doping of described p-type heavily doped region 4 is dense
Degree is more than two to three orders of magnitude of doping content of p-type doped region 3；The doping content of described p-type heavy doping protection ring 8 is more than
Doping content an order of magnitude of N-type drift region 2.
The operation principle of the present invention is:
The MOSFET of a kind of integrated trench schottky with conductance modulation effect provided by the present invention, for the most also
Connection Schottky diode.The anode of described Schottky diode is arranged between the individual district of source two of MOSFET cell region
Surface, drift region and internal, is formed Schottky contacts by anode and drift region, and this anode is connected with the source of MOSFET；Xiao Te
The negative electrode of based diode shares the source electrode of MOSFET described in the drain electrode being positioned at substrate back as the anode of Schottky diode,
The drain electrode at the described MOSFET back side is as the negative electrode of Schottky diode.
When grid voltage reaches threshold voltage, MOSFET forward conduction.Now, the anode of Schottky diode connects relative to negative electrode
Electronegative potential, Schottky diode is reverse-biased.When between drain-source, voltage is less, schottky junction undertakes reverse pressure drop；Voltage between drain-source
During increase, p-type heavy doping protection ring 8 is reverse-biased with N-type drift region, and depletion layer extends to N-type drift region, until p-type is heavily doped
N-type drift region between miscellaneous protection ring is completely depleted, as in figure 2 it is shown, now, PN junction forms reverse blocking state, protects Xiao
Special base junction prevents from puncturing, and reduces reverse leakage current.
When grid voltage is less than threshold voltage, Schottky diode relatively MOSFET body diode first turns on.During small area analysis, plane and
Grooved schottky junction turns on, and source electrode has electric current to be formed between drain electrode.When the electric current flowed through between source electrode and drain electrode increases, weight
When pressure drop between doped p-type ring and N drift region is more than 0.5V, PN junction turns on, in heavily doped P-type hoop N-type drift region
Injection electronics, and then reduce the forward conduction voltage drop of Schottky diode, thus damage when body diode turns on when reducing big electric current
Consumption.
The domain schematic diagram of the MOSFET structure of a kind of integrated trench schottky with conductance modulation effect provided by the present invention
As it is shown in figure 5, MOSFET region 11 and schottky area 12 cross arrangement.The gate electrode 7 of MOSFET region is by domain cloth
Office is drawn out to grid PAD, and the metal 10 of source electrode covers MOSFET region 11 and schottky area 12.
Present configuration can prepare using the following method, and processing step is:
1, monocrystal silicon prepares.Using N-type heavy doping monocrystalline substrate 1, crystal orientation is<100>.
2, epitaxial growth.Use method growth certain thickness and the N-type epitaxy layer of doping content such as vapour phase epitaxy VPE.
3, groove 9 and groove 14 etch.The methods such as ion etching are used to etch the groove of certain depth and width in N-type epitaxy layer.
As it is shown on figure 3, etch the groove needed for MOSFET and schottky junction in N-type drift region 2 simultaneously.
4, the preparation of gate electrode.First in whole silicon chip surface deposited oxide layer, transfer domain is to silicon chip surface the most with photoresist,
Etch away the oxide layer of exposure, the oxide layer in reserved slit 9；Then depositing polysilicon, photoetching, etching formation gate electrode 7,
Finally, continue deposited oxide layer on surface and carry out machinery and polish.
5, p-type doped region 3 injects.Making the figure then high-energy boron ion implanting of p-type doped region 3 by lithography, implant angle can root
According to requiring change, by adjusting Implantation Energy and DM doping content and junction depth.
6, the preparation of N+ source region.Arsenic injects preparation N-type heavily doped region 5.
7, p-type heavily-doped implant, forms p-type heavily doped region 6.
8, p-type heavily-doped implant, forms p-type weight protection ring 8, as shown in Figure 4, makes the position of Schottky groove by lithography, Xiao
Implanting p-type heavy doping protection ring 8 below the groove of special base region.
8, front-side metallization anode.Sputter layer of metal aluminum at whole device surface, form metallization anode 9, simultaneously filling slot
14 form schottky junction.
9, thinning back side, metallization, forms drain electrode 15.
During making devices, can also be used with the semi-conducting materials such as carborundum, GaAs or germanium silicon and substitute body silicon.
Claims (2)
1. a MOSFET for integrated trench schottky, including MOSFET region (11) and schottky area (12), described
Schottky area (12) is positioned between the MOSFET region (11) of two symmetrically structures；Described MOSFET region (11)
The drain electrode (15) that includes being cascading from bottom to up with schottky area (12), N-type heavy doping substrate (1), N-type
Drift region (2) and source metal (10)；N-type drift region (2) upper strata of described MOSFET region (11) has p-type and mixes
Miscellaneous district (3), described upper surface contacts with source metal (10), described p-type doped region (3) has N-type heavily doped region (5),
P-type heavily doped region (4) and the first groove (9), described N-type heavily doped region (5) is positioned between p-type heavily doped region (4),
And the junction depth of N-type heavily doped region (5) adulterates along p-type more than the junction depth of p-type heavily doped region (4), described first groove (9)
District (3) upper surface sequentially passes through downwards N-type heavily doped region (5) and p-type doped region (3) and extends to N-type drift region (2)
In, described first groove (9) is filled with medium (6), medium (6) is provided with polysilicon (7), described p-type weight
Doped region (4), N-type heavily doped region (5) contact with source metal (10) with medium (6)；Described schottky area (12)
N-type drift region (2) in there is multiple second groove (14) and p-type heavy doping protection ring (8), described second groove (14)
In be filled with metal, the upper surface of described second groove (14) contacts with source metal (10), the end of the second groove (14)
Portion is positioned in p-type heavy doping protection ring (8)；The N-type drift region (2) of described schottky area (12) and source metal (10)
Contact forms planar Schottky contact, and the metal in the second groove (14) contacts formation groove with p-type heavy doping protection ring (8)
Schottky contacts；Described polysilicon (7) is gate electrode；The doping content of described p-type doped region (3) is more than N-type drift region
(2) two orders of magnitude of doping content；The doping content of described N-type heavily doped region (5) is mixed more than p-type doped region (3)
Two to three orders of magnitude of miscellaneous concentration；The doping content of described p-type heavily doped region (4) is more than the doping of p-type doped region (3)
Two to three orders of magnitude of concentration；The doping content of described p-type heavy doping protection ring (8) is more than the doping of N-type drift region (2)
Concentration an order of magnitude.
The MOSFET of a kind of integrated trench schottky the most according to claim 1, it is characterised in that described second groove
And the quantity of p-type heavy doping protection ring (8) is 3 (14).
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610490386.8A CN105957865A (en) | 2016-06-27 | 2016-06-27 | MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated with trench Schottky |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106887427A (en) * | 2017-01-11 | 2017-06-23 | 东莞市联洲知识产权运营管理有限公司 | A kind of MOSFET of integrated schottky |
| CN111755519A (en) * | 2020-06-02 | 2020-10-09 | 西安电子科技大学 | Silicon carbide UMOSFET device integrated with SBD |
| CN111755520A (en) * | 2020-06-02 | 2020-10-09 | 西安电子科技大学 | JBS (junction-junction |
| CN113193053A (en) * | 2021-05-20 | 2021-07-30 | 电子科技大学 | Trench Schottky diode with high forward current density |
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| CN106887427A (en) * | 2017-01-11 | 2017-06-23 | 东莞市联洲知识产权运营管理有限公司 | A kind of MOSFET of integrated schottky |
| CN111755519A (en) * | 2020-06-02 | 2020-10-09 | 西安电子科技大学 | Silicon carbide UMOSFET device integrated with SBD |
| CN111755520A (en) * | 2020-06-02 | 2020-10-09 | 西安电子科技大学 | JBS (junction-junction |
| CN111755520B (en) * | 2020-06-02 | 2021-10-08 | 西安电子科技大学 | JBS (junction-junction |
| CN113193053A (en) * | 2021-05-20 | 2021-07-30 | 电子科技大学 | Trench Schottky diode with high forward current density |
| CN113193053B (en) * | 2021-05-20 | 2023-11-07 | 电子科技大学 | Trench schottky diode with high forward current density |
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