CN105932041A - N面GaN基鳍式高电子迁移率晶体管及制作方法 - Google Patents
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Abstract
本发明公开了一种N面GaN基鳍式高电子迁移率晶体管。主要解决现有小尺寸高电子迁移率晶体管栅控能力差及源、漏电阻大的问题。其自下而上包括衬底、GaN缓冲层、AlGaN势垒层、GaN沟道层、栅介质层、钝化层和源、漏、栅电极。其中缓冲层和沟道层采用N面GaN材料;AlGaN势垒层包括两层AlGaN,并且第一层AlGaN材料的Al组分逐渐变化;GaN沟道层和AlGaN势垒层组成GaN/AlGaN异质结;源、漏电极分别位于势垒层和沟道层的左、右两端;栅电极覆盖在鳍型GaN/AlGaN异质结的两侧和上方。本发明器件具有源、漏电阻小、栅泄漏电流小和栅控能力好的优点,可用作小尺寸高速低功耗器件。
Description
技术领域
本发明属于微电子器件技术领域,具体的说是一种N面GaN基鳍式高电子迁移率晶体管Fin-HEMT高速器件结构及制作方法,可用于小尺寸的高速低功耗集成电路。
背景技术
GaN材料作为第三代半导体材料,由于禁带宽度大、二维电子气2DEG浓度高、电子饱和速度高等优点,被认为是制作微波功率器件和高速器件的优良材料。特别是AlGaN/GaN异质结高电子迁移率晶体管HEMT,在军事与商业方面有广泛的应用价值。
随着晶体管尺寸的缩小,栅长越来越短,传统高电子迁移率晶体管HEMT的短沟道效应越来越明显。用鳍式场效应晶体管FinFET结构制作的AlGaN/GaN高电子迁移率晶体管HEMT器件,采用三维立体结构,使栅极将沟道从三个方向包裹起来,提高了栅控能力,改善了短沟道效应。2014年,南洋理工大学的S.Arulkumaran等人首次在硅衬底上制备出了InAlN/GaN Fin-HEMT,这种结构有更低的漏致势垒降低,更高的开关电流比,参见In0.17Al0.83N/AlN/GaN Triple T-shape Fin-HEMTs with gm=646mS/mm,ION=1.03A/mm,IOFF=1.13μA/mm,SS=82mV/dec and DIBL=28mV/V at VD=0.5V,IEEE,International Electron Device Meeting(IEDM),2014:25.6.1-25.6.4。该器件采用的是Ga面GaN基结构,相比于N面GaN基器件,Ga面GaN基器件有较高的欧姆接触电阻,较差的二维电子气限域性,对短沟道效应的抑制能力也较弱。
发明内容
本发明的目的在于针对上述高电子迁移率晶体管HEMT的不足,提出一种N面GaN基鳍式高电子迁移率晶体管Fin-HEMT高速器件及制作方法,以抑制短沟道效应,减小欧姆接触电阻,提高跨导并灵活缩小栅极与沟道的距离。
为实现上述目的,本发明的技术思路如下:采用N面GaN缓冲层,使用AlGaN势垒层和N面GaN沟道层形成GaN/AlGaN异质结,这种N面GaN基结构可以减小欧姆接触电阻,有很好的二维电子气限域性,可以灵活缩小栅与沟道的距离。源、漏电极制作在鳍型GaN/AlGaN异质结两端,直接与GaN/AlGaN异质结生成的二维电子气2DEG沟道接触,使源、漏电阻变小,器件功耗降低。将栅电极包裹在GaN/AlGaN异质结的两侧与上方,形成鳍型Fin三维栅结构,这样可以很好的抑制短沟道效应,加强栅控能力。
依据上述技术思路,本发明的N面GaN基鳍式高电子迁移率晶体管,自下而上包括衬底1、GaN缓冲层2、AlGaN势垒层3、GaN沟道层4、栅介质层5、钝化层6和栅、源、漏电极,GaN沟道层和AlGaN势垒层形成GaN/AlGaN异质结,GaN/AlGaN异质结生成二维电子气,其特征在于:
GaN缓冲层和沟道层采用N面GaN材料;
源、漏电极设在GaN/AlGaN异质结的两端,以实现与二维电子气的直接接触,减小源、漏电阻。
AlGaN势垒层包括两层AlGaN,从下到上的第一层是厚度为20nm,Al组分从5%渐变到30%的AlGaN,第二层是厚度为5~10nm,Al组分为30%的AlGaN。
依据上述技术思路,本发明制作N面GaN基鳍式高电子迁移率晶体管的方法,包括如下步骤:
1)在C面SiC、a面蓝宝石或N面GaN单晶衬底上,利用分子束外延MBE或金属有机化合物化学气相淀积MOCVD生长1~3μm的N面GaN缓冲层;
2)在GaN缓冲层上先生长20nm厚的AlGaN,其Al组分从5%渐变到30%;再生长厚度为5~10nm的AlGaN,其Al组分为30%;
3)在AlGaN势垒层上生长厚度为20~30nm的N面GaN沟道层;
4)通过刻蚀GaN沟道层、AlGaN势垒层和GaN缓冲层的边缘部分,形成鳍型GaN/AlGaN异质结;
5)在GaN沟道层和AlGaN势垒层两端制作源、漏电极;
6)利用原子层淀积ALD或等离子体增强化学气相淀积PECVD技术在AlGaN势垒层和GaN沟道层表面生长SiN作为栅介质层;
7)在栅介质层上光刻栅形状,并用电子束蒸发制备栅电极;
8)在SiN和电极表面利用等离子体增强化学气相淀积PECVD淀积钝化层,刻蚀掉电极键合点上多余的钝化层,并进行金属互连蒸发,完成器件的制备。
本发明具有如下优点:
1.本发明器件由于采用N面GaN材料,所以有很好的二维电子气限域性,而且因为势垒层在沟道层下方,所以可以灵活缩小栅与沟道的距离。
2.本发明器件由于采用鳍型Fin三维栅结构,可以很好的抑制短沟道效应,加强栅控能力,提高开关电流比。
3.本发明器件由于源、漏电极与二维电子气沟道直接接触,源、漏电阻很小,可以用做低功耗器件。
4.本发明器件由于势垒层采用两层AlGaN材料,并且第一层AlGaN材料的Al组分逐渐变化,所以可以减小电流崩塌。
附图说明
图1是本发明器件的结构示意图;
图2是图1中水平方向a的剖视图;
图3是图1中垂直方向b的剖视图;
图4是本发明器件的制作工艺流程示意图。
具体实施方式
以下结合附图对本发明作进一步详细描述。
参照图1、图2和图3,本发明器件包括衬底1、GaN缓冲层2、AlGaN势垒层3、GaN沟道层4、栅介质层5、SiN钝化层6和栅、源、漏电极。其中最下层是SiC或GaN或蓝宝石衬底1;衬底1上为1~3μm的N面GaN缓冲层2;GaN缓冲层2上依次为厚度为20nm,Al组分从5%渐变到30%的AlGaN和厚度为5~10nm,Al组分为30%的AlGaN组成AlGaN势垒层3;势垒层3上是厚度为20~30nm的N面GaN沟道层4;AlGaN势垒层3和GaN沟道层4的宽度均为200~500nm;GaN沟道层4和AlGaN势垒层3组成GaN/AlGaN异质结;沟道层4的周围和势垒层3的两侧是栅介质层5,该栅介质层5采用SiN或Al2O3,其厚度是3~5nm;栅电极位于栅介质层5的两侧和上方;源、漏电极分别位于GaN/AlGaN异质结的两端,即源电极在势垒层3和沟道层4的左端,漏电极在势垒层3和沟道层4的右端;钝化层6覆盖在源、漏电极和栅介质层5的表面,该钝化层6采用厚度为30~100nm的SiN。
参照图4,本发明给出制备N面GaN基鳍式高电子迁移率晶体管的如下三种实施例。
实施例1:制作衬底为蓝宝石,GaN缓冲层厚度是1μm,鳍型GaN/AlGaN异质结宽度为200nm的N面GaN基鳍式高电子迁移率晶体管。
步骤一:生长缓冲层。
在图4(a)所示的蓝宝石衬底上利用分子束外延MBE生长一层厚度为1μm的N面GaN缓冲层,其生长的工艺条件是:生长温度为680℃,压强为5×10-3Pa。
步骤二:生长势垒层。
在GaN层上利用分子束外延MBE先生长一层厚度为20nm的AlGaN,Al组分从下到上由5%渐变到30%;再生长一层厚度为10nm,Al组分为30%的AlGaN层,其生长的工艺条件是:生长温度为680℃,压强为5×10-3Pa。
步骤三:生长沟道层。
在AlGaN层上利用分子束外延MBE生长一层厚度为20nm的N面GaN沟道层,GaN沟道层与AlGaN势垒层形成GaN/AlGaN异质结,GaN/AlGaN异质结界面处形成二维电子气,其工艺条件是:生长温度为680℃,压强为5×10-3Pa。
上述步骤一、步骤二和步骤三的生长结果如图4(b)。
步骤四:刻蚀鳍型GaN/AlGaN异质结。
在GaN层上涂光刻胶,利用电子束光刻机进行曝光,得到鳍型Fin图案,再利用Cl2进行刻蚀,形成宽度为200nm的鳍型GaN/AlGaN异质结,结果如图4(c)。
步骤五:制作源、漏电极。
在鳍型GaN/AlGaN异质结上涂胶得到光刻胶掩模,利用电子束光刻机曝光形成源、漏区域,利用Cl2依次刻蚀掉GaN层和AlGaN层,得到源、漏凹槽;在凹槽位置光刻源、漏图形,并进行金属蒸发,选用Ti/Au做源漏电极,其中Ti为25nm,Au为50nm,蒸发完成后进行金属剥离;再利用快速热退火炉在N2氛围中进行退火处理,得到源、漏电极,结果如图4(d)。
步骤六:制作栅介质层。
在GaN沟道层上利用等离子体增强化学气相淀积PECVD生长一层25nm厚的SiN,结果如图4(e)所示,然后涂胶,光刻得到栅图形;用SF6刻蚀掉栅区域20nm厚的SiN形成栅槽,剩余5nm厚的SiN作为栅介质层,制作结果如图4(f)。
步骤七:制作栅极。
在栅槽位置采用电子束光刻机光刻栅形状,然后进行金属蒸发,选用Ti/Au做栅电极,其中Ti为25nm,然后进行金属剥离,最终形成栅金属电极。
步骤八:制作钝化层。
在SiN和源、漏电极表面利用等离子体增强化学气相淀积PECVD淀积厚度为50nm的SiN钝化层;然后在键合点光刻露出互连窗口,使用Cl2刻蚀掉互连窗口处多余的SiN钝化层,并进行金属互连蒸发,完成器件的制备。
上述步骤七和步骤八的制作结果如图4(g)。
实施例2:制作衬底为SiC,GaN缓冲层厚度是2μm,鳍型GaN/AlGaN异质结宽度为400nm的N面GaN基鳍式高电子迁移率晶体管。
步骤1:生长缓冲层。
在SiC衬底上利用分子束外延MBE生长一层厚度为2μm的N面GaN缓冲层,其生长的工艺条件是:
生长温度为680℃,压强为5×10-3Pa。
步骤2:生长势垒层。
在GaN层上利用分子束外延MBE先生长一层厚度为20nm的AlGaN,Al组分从下到上由5%渐变到30%;再生长一层厚度为8nm,Al组分为30%的AlGaN层,其生长的工艺条件是:
生长温度为680℃,压强为5×10-3Pa。
步骤3:生长沟道层。
在AlGaN层上利用分子束外延MBE生长一层厚度为25nm的N面GaN沟道层,形成GaN/AlGaN异质结,GaN沟道层与AlGaN势垒层的界面处形成二维电子气,其生长的工艺条件是:
生长温度为680℃,压强为5×10-3Pa。
步骤4:刻蚀鳍型GaN/AlGaN异质结。
在GaN层上涂光刻胶,利用电子束光刻机进行曝光,得到鳍型Fin图案,再利用Cl2进行刻蚀,形成宽度为400nm的鳍型GaN/AlGaN异质结。
步骤5:制作源、漏电极。
本步骤的实现与实施例1的步骤五相同。
步骤6:制作栅介质层。
在GaN沟道层上利用等离子体增强化学气相淀积PECVD生长一层25nm厚的SiN,然后涂胶,光刻得到栅图形;用SF6刻蚀掉栅区域22nm的SiN形成栅槽,剩余3nm厚的SiN作为栅介质层。
步骤7:制作栅电极。
本步骤的实现与实施例1的步骤七相同。
步骤8:制作钝化层。
本步骤的实现与实施例1的步骤八相同。
实施例3:制作衬底为SiC,GaN缓冲层厚度是2.5μm,鳍型GaN/AlGaN异质结宽度为500nm的N面GaN基鳍式高电子迁移率晶体管。
步骤A:在衬底上生长缓冲层。
利用分子束外延MBE设备在温度为680℃,压强为5×10-3Pa的工艺条件下,在SiC衬底上生长一层厚度为2.5μm的N面GaN缓冲层。
步骤B:在缓冲层上生长势垒层。
利用分子束外延MBE设备在温度为680℃,压强为5×10-3Pa的工艺条件下,在GaN缓冲层上先生长一层厚度为20nm的AlGaN,Al组分从下到上由5%渐变到30%,再生长一层厚度为5nm,Al组分为30%的AlGaN层。
步骤C:在势垒层上生长沟道层。
利用分子束外延MBE设备在温度为680℃,压强为5×10-3Pa的工艺条件下,在AlGaN层上生长一层厚度为22nm的N面GaN沟道层,形成GaN/AlGaN异质结,GaN沟道层与AlGaN势垒层的界面处形成二维电子气。
步骤D:刻蚀鳍型GaN/AlGaN异质结。
在GaN层上涂光刻胶,利用电子束光刻机进行曝光,得到鳍型Fin图案,再利用Cl2进行刻蚀,形成宽度为500nm的鳍型GaN/AlGaN异质结。
步骤E:制作源、漏电极。
本步骤的实现与实施例1的步骤五相同。
步骤F:制作栅介质层。
本步骤的实现与实施例1的步骤六相同。
步骤G:制作栅电极。
本步骤的实现与实施例1的步骤七相同。
步骤H:制作钝化层。
本步骤的实现与实施例1的步骤八相同。
Claims (9)
1.一种N面GaN基鳍式高电子迁移率晶体管,自下而上包括衬底(1)、GaN缓冲层(2)、AlGaN势垒层(3)、GaN沟道层(4)、栅介质层(5)、钝化层(6)和栅、源、漏电极,GaN沟道层和AlGaN势垒层形成GaN/AlGaN异质结,GaN/AlGaN异质结生成二维电子气,其特征在于:
GaN缓冲层和沟道层采用N面GaN材料;
源、漏电极设在GaN/AlGaN异质结的两端,以实现与二维电子气的直接接触,减小源、漏电阻。
AlGaN势垒层包括两层AlGaN,从下到上的第一层是厚度为20nm,Al组分从5%渐变到30%的AlGaN,第二层是厚度为5~10nm,Al组分为30%的AlGaN。
2.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中衬底(1)采用a面蓝宝石或C面SiC或N面GaN。
3.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中缓冲层(2)采用N面GaN,厚度为1~3μm。
4.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中沟道层(4)采用N面GaN,厚度为20~30nm。
5.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中栅介质层(5)采用SiN或Al2O3,厚度为3~5nm。
6.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中钝化层(6)采用SiN,厚度为30~100nm。
7.根据权利要求1所述的N面GaN基鳍式高电子迁移率晶体管,其中鳍型GaN/AlGaN异质结的宽度是200~500nm。
8.一种N面GaN基鳍式高电子迁移率晶体管的制作方法,包括如下步骤:
1)在C面SiC、a面蓝宝石或N面GaN单晶衬底上,利用分子束外延MBE或金属有机化合物化学气相淀积MOCVD生长1~3μm的N面GaN缓冲层;
2)在GaN缓冲层上先生长20nm厚的AlGaN,其Al组分从5%渐变到30%;再生长厚度为5~10nm的AlGaN,其Al组分为30%;
3)在AlGaN势垒层上生长厚度为20~30nm的N面GaN沟道层;
4)通过刻蚀GaN沟道层、AlGaN势垒层和GaN缓冲层的边缘部分,形成鳍型GaN/AlGaN异质结;
5)在GaN沟道层和AlGaN势垒层两端制作源、漏电极;
6)利用原子层淀积ALD或等离子体增强化学气相淀积PECVD技术在AlGaN势垒层和GaN沟道层表面生长SiN作为栅介质层;
7)在栅介质层上光刻栅形状,并用电子束蒸发制备栅电极;
8)在SiN和电极表面利用等离子体增强化学气相淀积PECVD淀积钝化层,刻蚀掉电极键合点上多余的钝化层,并进行金属互连蒸发,完成器件的制备。
9.根据权利要求8所述的N面GaN基鳍式高电子迁移率晶体管的制作方法,其中步骤4)中的刻蚀采用Cl2进行。
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Publication number | Priority date | Publication date | Assignee | Title |
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CN108519174A (zh) * | 2018-03-27 | 2018-09-11 | 中国电子科技集团公司第十三研究所 | GaN电桥式绝压压力传感器及制作方法 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030102482A1 (en) * | 2001-12-03 | 2003-06-05 | Saxler Adam William | Strain balanced nitride heterojunction transistors and methods of fabricating strain balanced nitride heterojunction transistors |
CN101916773A (zh) * | 2010-07-23 | 2010-12-15 | 中国科学院上海技术物理研究所 | 一种双沟道mos-hemt器件及制作方法 |
CN103996707A (zh) * | 2014-01-20 | 2014-08-20 | 西安电子科技大学 | 加栅场板增强型AlGaN/GaN HEMT器件结构及其制作方法 |
CN105448962A (zh) * | 2015-11-27 | 2016-03-30 | 西安电子科技大学 | 多沟道侧栅结构的AlGaN/GaN高电子迁移率晶体管 |
-
2016
- 2016-05-06 CN CN201610297803.7A patent/CN105932041B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030102482A1 (en) * | 2001-12-03 | 2003-06-05 | Saxler Adam William | Strain balanced nitride heterojunction transistors and methods of fabricating strain balanced nitride heterojunction transistors |
CN101916773A (zh) * | 2010-07-23 | 2010-12-15 | 中国科学院上海技术物理研究所 | 一种双沟道mos-hemt器件及制作方法 |
CN103996707A (zh) * | 2014-01-20 | 2014-08-20 | 西安电子科技大学 | 加栅场板增强型AlGaN/GaN HEMT器件结构及其制作方法 |
CN105448962A (zh) * | 2015-11-27 | 2016-03-30 | 西安电子科技大学 | 多沟道侧栅结构的AlGaN/GaN高电子迁移率晶体管 |
Cited By (17)
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---|---|---|---|---|
US11444046B2 (en) | 2017-07-14 | 2022-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Passivation scheme for pad openings and trenches |
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US12002774B2 (en) | 2017-07-14 | 2024-06-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Passivation scheme for pad openings and trenches |
US10804231B2 (en) | 2017-07-14 | 2020-10-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Passivation scheme for pad openings and trenches |
CN109256375B (zh) * | 2017-07-14 | 2020-10-16 | 台湾积体电路制造股份有限公司 | 用于焊盘开口和沟槽的钝化结构 |
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CN108519174B (zh) * | 2018-03-27 | 2020-09-08 | 中国电子科技集团公司第十三研究所 | GaN电桥式绝压压力传感器及制作方法 |
CN109273527A (zh) * | 2018-11-21 | 2019-01-25 | 芜湖启迪半导体有限公司 | 一种半导体结构及其形成方法 |
CN109346522A (zh) * | 2018-11-21 | 2019-02-15 | 芜湖启迪半导体有限公司 | 一种半导体结构及其形成方法 |
CN109346522B (zh) * | 2018-11-21 | 2024-02-09 | 芜湖启迪半导体有限公司 | 一种半导体结构及其形成方法 |
CN109273527B (zh) * | 2018-11-21 | 2023-11-28 | 芜湖启迪半导体有限公司 | 一种半导体结构及其形成方法 |
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