CN105895579B - A kind of processing method of the TSV disks based on SOI substrate - Google Patents
A kind of processing method of the TSV disks based on SOI substrate Download PDFInfo
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- CN105895579B CN105895579B CN201610404060.9A CN201610404060A CN105895579B CN 105895579 B CN105895579 B CN 105895579B CN 201610404060 A CN201610404060 A CN 201610404060A CN 105895579 B CN105895579 B CN 105895579B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
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Abstract
The invention discloses a kind of processing method of the TSV disks based on SOI substrate, this method comprises the following steps：Select bottom silicon layer thickness to be more than or equal to the SOI disks of TSV wafer thickness, and the bottom silicon layer thickness of SOI disks is reduced into TSV wafer thickness；At SOI disks bottom, silicon surface makes required TSV blind hole figures by lithography；And go out TSV blind holes to the oxygen buried regions of SOI disks along the TSV blind hole pattern etchings made by lithography and stop；At SOI disks bottom, deposition insulating layer, barrier layer and Seed Layer, surface and the inwall plating layer of metal copper of TSV blind holes, formation TSV after deposition interconnect silicon surface successively；Remove SOI disks top silicon layer；Remaining oxygen buried regions photomask surface goes out TSV through hole figure after top silicon layer is eliminated, and goes out TSV through hole along TSV through hole pattern etching；In oxygen buried regions surface deposition or plating layer of conductive material, graphical and etching forms electrical wiring.The inventive method solves the problems, such as that the height of the copper pillar that blind hole etching depth inhomogeneities is brought is uneven, ensure that TSV copper column in one plane.
Description
Technical field
The present invention relates to a kind of processing method of the TSV disks based on SOI substrate, belong to field of micro electromechanical technology.
Background technology
The method of existing processing TSV disks is to use common silicon chip erosion blind hole, so blind hole generally existing depth is uneven
The problem of even property, need to do planarization process to the copper post of different height during so as to cause thinning back side.Such as patent document：One
Kind of TSV appears at the back side technique（201310159364.X）.
For another example, the TSV processes based on SOI substrate high reliability（201310541039.X）, it is that a kind of SOI that is based on is served as a contrast
The processing method of the TSV disks at bottom, the process solve the technical problem of lateral wall insulation using oxygen buried regions as stop-layer
（See specification [0023] eighth row）, but the problem of equally exist blind hole etching depth inhomogeneities, see specification [0031]
（5）" diametrically W2 windows continue to etch bottom silicon step, until via depth stops after reaching requirement, then remove photomask surface
Glue, TSV through holes are cleaned ".
The content of the invention
The technical problems to be solved by the invention are：A kind of processing method of the TSV disks based on SOI substrate is provided, profit
TSV disks are processed by the use of the oxygen buried regions of SOI pieces as self-stopping technology layer, solve the copper post that blind hole etching depth inhomogeneities is brought
The problem of highly non-uniform, it ensure that TSV copper column in one plane.
The present invention uses following technical scheme to solve above-mentioned technical problem：
A kind of processing method of the TSV disks based on SOI substrate, comprises the following steps：
Step 1, bottom silicon layer thickness is selected to be more than or equal to the SOI disks of TSV wafer thickness, and by the bottom silicon layer of SOI disks
Thickness reduces to TSV wafer thickness；
Step 2, required TSV blind hole figures are made by lithography in the bottom silicon surface of SOI disks；
Step 3, the TSV blind hole pattern etchings made by lithography in the bottom silicon surface of SOI disks along step 2 go out TSV blind holes extremely
The oxygen buried regions of SOI disks stops；
Step 4, in bottom silicon surface deposition insulating layer, barrier layer and the Seed Layer successively of SOI disks, table after deposition
The inwall of face and TSV blind holes electroplates layer of metal copper, forms TSV interconnection；
Step 5, the top silicon layer of SOI disks is removed；
Step 6, remaining oxygen buried regions photomask surface goes out TSV through hole figure after top silicon layer is eliminated, and along TSV through hole figure
Shape etches TSV through hole to step 4 metal copper layer and stopped, and the aperture of TSV through hole is less than the aperture of TSV blind holes；
Step 7, electrical wiring is formed in oxygen buried regions surface deposition or plating layer of conductive material, graphical and etching, so as to
Complete the processing of TSV disks.
As a preferred embodiment of the present invention, the bottom silicon layer thickness of SOI disks is reduced into TSV disks thickness described in step 1
The method of degree is thinned and polishing method.
As a preferred embodiment of the present invention, the technique that TSV blind holes are etched described in step 3 is etch of deep silicon trenches work
Skill.
As a preferred embodiment of the present invention, the method that the top silicon layer of SOI disks is removed described in step 5 is to pass through wet method
TMAH or KOH silicon etch solutions remove.
As a preferred embodiment of the present invention, the method that the top silicon layer of SOI disks is removed described in step 5 is dry method
DRIE。
As a preferred embodiment of the present invention, the mode that TSV through hole is etched described in step 6 is wet method BOE or dry
Method ICP modes.
As a preferred embodiment of the present invention, conductive material described in step 7 is metallic copper, aluminium, titanium or gold.
The present invention compared with prior art, has following technique effect using above technical scheme：
The processing method of the TSV disks based on SOI substrate of the invention, by the use of the oxygen buried regions of SOI pieces as self-stopping technology layer come
The method for processing TSV disks, solves the problems, such as that the height of the copper pillar that blind hole etching depth inhomogeneities is brought is uneven, ensure that
TSV copper column is in one plane.
Brief description of the drawings
Fig. 1 is the product structure figure of SOI disks in process steps 1 of the present invention.
Fig. 2 is that TSV blind hole surfacial pattern figures are lithographically formed in process steps 2 of the present invention.
Fig. 3 is that TSV blind hole shape appearance figures are etched in process steps 3 of the present invention.
Fig. 4 is that shape appearance figure after TSV interconnection is completed in process steps 4 of the present invention.
Fig. 5 is that shape appearance figure after the silicon layer of top is removed in process steps 5 of the present invention.
Fig. 6 is that oxygen buried regions processes TSV through hole shape appearance figure in process steps 6 of the present invention.
Fig. 7 is that shape appearance figure after TSV electrical wirings is completed in process steps 7 of the present invention.
Wherein, 3 be TSV blind holes, and 1-1 is the bottom silicon layer of SOI disks, and 1-2 is the oxygen buried regions of SOI disks, and 1-3 justifies for SOI
The top silicon layer of piece, 2-1 interconnect for TSV, and 2-2 is TSV through hole, and 2-3 is TSV electrical wirings.
Embodiment
Embodiments of the present invention are described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning
Same or similar element is represented to same or similar label eventually or there is the element of same or like function.Below by ginseng
The embodiment for examining accompanying drawing description is exemplary, is only used for explaining the present invention, and is not construed as limiting the claims.
The processing method of TSV disks of the invention based on SOI substrate, including following steps：
1st, because the top silicon thickness of SOI disks is typically small, do not reach TSV thickness, therefore select bottom silicon layer 1-1 thickness not small
In the SOI disks of TSV thickness, as shown in Figure 1.
2nd, using thinned and polishing method, the bottom silicon layer thickness of SOI disks is reduced to TSV thickness.
3rd, the figure of TSV blind holes 3 is made by lithography in the bottom silicon surface of SOI disks, as shown in Figure 2.
4th, by etch of deep silicon trenches techniques, TSV blind holes 3 are etched and are stopped to oxygen buried regions 1-2, and remove surface photoresistance or
Hardmask, as shown in Figure 3.
5th, deposition insulating layer, barrier layer and Seed Layer are distinguished in SOI disks back side 1-1.
6th, to the SOI disks back side, by plating mode, by the inwall of TSV blind holes 3 and electroplating surface last layer metallic copper, shape
2-1 is interconnected into TSV, as shown in Figure 4.
7th, one layer of wiring layer again can at least be processed for structure shown in Fig. 3, surface copper（RDL）.
8th, by silicon etch solutions such as wet method TMAH or KOH, SOI disks top silicon layer 1-3 is removed, as shown in Figure 5.
9th, above-mentioned top silicon layer 1-3 removal steps, the modes such as dry method DRIE can also be used to remove.
10th, go out TSV through hole figure in oxygen buried regions 1-2 photomask surfaces, and pass through wet method BOE or dry method ICP modes, etching
Go out TSV through hole 2-2, its TSV through hole 2-2 apertures are less than TSV blind holes 3, as shown in Figure 6.
11st, on oxygen buried regions 1-2 surfaces by building or evaporation mode, layer of metal copper is deposited, it is graphical and etch shape
Into electrical wiring 2-3, so as to complete the processing of TSV disks, as shown in Figure 7.
12nd, above-mentioned depositing step can also be completed using plating mode.
13rd, above-mentioned steps deposit metal can also be other metals, such as aluminium Ai, titanium Ti, golden Au.
14th, one layer of wiring layer again can at least be processed for structure shown in Fig. 6, oxygen buried regions 1-2 surfaces copper（RDL）.
The technological thought of above example only to illustrate the invention, it is impossible to protection scope of the present invention is limited with this, it is every
According to technological thought proposed by the present invention, any change done on the basis of technical scheme, the scope of the present invention is each fallen within
Within.
Claims (7)
1. a kind of processing method of the TSV disks based on SOI substrate, it is characterised in that comprise the following steps：
Step 1, bottom silicon layer thickness is selected to be more than or equal to the SOI disks of TSV wafer thickness, and by the bottom silicon layer thickness of SOI disks
Reduce to TSV wafer thickness；
Step 2, required TSV blind hole figures are made by lithography in the bottom silicon surface of SOI disks；
Step 3, the TSV blind hole pattern etchings made by lithography in the bottom silicon surface of SOI disks along step 2 go out TSV blind holes to SOI circles
The oxygen buried regions of piece stops；
Step 4, in bottom silicon surface deposition insulating layer, barrier layer and the Seed Layer successively of SOI disks, surface after deposition and
The inwall plating layer of metal copper of TSV blind holes, forms TSV interconnection；
Step 5, the top silicon layer of SOI disks is removed；
Step 6, remaining oxygen buried regions photomask surface goes out TSV through hole figure after top silicon layer is eliminated, and is carved along TSV through hole figure
Lose TSV through hole to step 4 metal copper layer to stop, and the aperture of TSV through hole is less than the aperture of TSV blind holes；
Step 7, in oxygen buried regions surface deposition or plating layer of conductive material, graphical and etching forms electrical wiring, so as to complete
The processing of TSV disks.
2. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that will described in step 1
The method that the bottom silicon layer thickness of SOI disks reduces to TSV wafer thickness is thinned and polishing method.
3. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that quarter described in step 3
The technique for losing TSV blind holes is etch of deep silicon trenches technique.
4. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that gone described in step 5
Except the method for the top silicon layer of SOI disks is to be removed by wet method TMAH or KOH silicon etch solution.
5. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that gone described in step 5
Except the method for the top silicon layer of SOI disks is dry method DRIE.
6. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that quarter described in step 6
The mode for losing TSV through hole is wet method BOE or dry method ICP modes.
7. the processing method of the TSV disks based on SOI substrate according to claim 1, it is characterised in that led described in step 7
Electric material is metallic copper, aluminium, titanium or gold.
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| CN106335871A (en) * | 2016-08-30 | 2017-01-18 | 北京遥测技术研究所 | Manufacturing method of silicon-based MEMS micro nano through hole structure |
| CN109686707B (en) * | 2019-01-28 | 2024-06-14 | 苏州锐杰微科技集团有限公司 | Manufacturing method of high-heat-dissipation silicon-based packaging substrate and high-heat-dissipation packaging structure |
| CN110767604B (en) * | 2019-10-31 | 2022-03-18 | 厦门市三安集成电路有限公司 | Compound semiconductor device and back copper processing method of compound semiconductor device |
| CN111341668A (en) * | 2020-02-29 | 2020-06-26 | 浙江集迈科微电子有限公司 | Method for embedding radio frequency chip in silicon cavity |
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| CN101540295A (en) * | 2009-04-21 | 2009-09-23 | 北京大学 | Preparation method of insulation layer of TSV through hole |
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| US8587131B1 (en) * | 2012-06-07 | 2013-11-19 | Nanya Technology Corp. | Through-silicon via and fabrication method thereof |
| CN102723306B (en) * | 2012-06-28 | 2014-10-08 | 中国科学院上海微系统与信息技术研究所 | Microwave multi-chip packaging structure using silicon through hole and manufacture method thereof |
| KR20140011137A (en) * | 2012-07-17 | 2014-01-28 | 삼성전자주식회사 | Integrated circuit device having through silicon via structure and method of manufacturing the same |
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| US9324613B2 (en) * | 2014-09-29 | 2016-04-26 | Innovative Micro Technology | Method for forming through substrate vias with tethers |
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Effective date of registration: 20221216 Address after: B2-305, No. 200, Linghu Avenue, Xinwu District, Wuxi City, Jiangsu Province, 214000 Patentee after: Wuxi Weiwen Semiconductor Technology Co.,Ltd. Address before: 214035 3rd Floor, Building C2, China Sensor Network International Innovation Park, No. 200, Linghu Avenue, New District, Wuxi City, Jiangsu Province Patentee before: WUXI WIO TECHNOLOGY Co.,Ltd. |
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