CN105866659B - A kind of more transient pulse distribution measurement methods of universal single-particle - Google Patents
A kind of more transient pulse distribution measurement methods of universal single-particle Download PDFInfo
- Publication number
- CN105866659B CN105866659B CN201610194323.8A CN201610194323A CN105866659B CN 105866659 B CN105866659 B CN 105866659B CN 201610194323 A CN201610194323 A CN 201610194323A CN 105866659 B CN105866659 B CN 105866659B
- Authority
- CN
- China
- Prior art keywords
- semt
- circuit
- chain
- capture
- particle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2881—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to environmental aspects other than temperature, e.g. humidity or vibrations
Landscapes
- Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a kind of universal more transient pulse distribution measurement methods of single-particle, comprise the following steps：The first step, structure generates the objective circuit of SEMT, for generating the single-ion transient state SET or more transient state SEMT of single-particle；Second step, structure SEMT capture circuits；Objective circuit and SEMT capture circuits are connected into test circuit by the 3rd step；4th step constructs test chip and produces test chip；5th step carries out radiation experiments, the on-line measurement SEMT distribution of pulses in radiation environment.SEMT captures circuit for existing SET capture circuits in the present invention, not only chain of flip-flops therein is reinforced, inverter module SEMT distribution of pulses information can be obtained exactly, and other cell Ss EMT distribution of pulses information in standard cell lib can be obtained exactly, measurement error caused by avoiding single-particle inversion/single event multiple bit upset, and the mode that N number of capture circuit is carried out at the same time capture is employed for the first time, improve measurement efficiency.
Description
Technical field
The present invention relates to the measuring method of the more transient states of single-particle in Nanometer integrated circuit, espespecially each crystalline substance in Nanometer integrated circuit
The measuring method of the generated more transient pulse distributions of single-particle on body pipe, each circuit unit.
Background technology
In cosmic space, there are a large amount of high energy particles (proton, electronics, heavy ion and neutron etc.) and high-energy rays.Collection
After being subject to the bombardment of these high energy particles and ray into circuit, can generate single-ion transient state (Single Event Transient,
Abbreviation SET).The presence of single-ion transient state greatly affected the normal work of integrated circuit, for example, working as single event transient pulse
When propagating to storage circuit, single-particle inversion (Single Event can be converted into if corresponding temporal constraint is met
Upset, abbreviation SEU).With the continual reductions of process, the critical charge that each transistor state changes in integrated circuit is held
Continuous to reduce, transistor density continues to increase, and multiple transistors are subject to the probability of particle bombardment to greatly promote simultaneously, multiple transistors
It is bombarded simultaneously and multinode charge-trapping (Multi-node Charge Collection, abbreviation MCC) occurs, Jin Eryin
The more transient states of bill particle (Single Event Multiple Transient, abbreviation SEMT).The meeting of the more transient states of single-particle
So that logic shielding fails or even traditional redundancy reinforcement technique can be made to fail in integrated circuit, structure is worked normally to integrated circuit
Into even more serious threat.It is more to grasping single-particle under advanced technologies because of the more instantaneous measurement technologies of the advanced single-particle of the invention
Transient state is to the harm of integrated circuit, exploitation single-ion transient state reinforcement technique and realizes that the analysis of high-precision soft error and assessment are aobvious
It obtains particularly important.
The standard blocks such as phase inverter, NAND gate, nor gate are the elementary cells for forming integrated circuit, therefore understand standard list
The more transient state productions of single-particle between member, are conducive to more efficiently reinforce domain, integrated so as to effectively improve
The anti-single particle transient state ability of circuit.O.A.Amusan et al. is in IEEE Transaction on Nuclear Science
" the Laser verification of charge sharing in a 90nm delivered on (IEEE atomic energy sciences journal)
Bulk CMOS process " (the laser verification that charge is shared under 90 nanometers of bulk silicon technologicals) (the 6th phase of December in 2009 volume 56,
The 3065-3070 pages) a kind of laser measuring technique of large-size crystals pipe multinode charge-trapping is proposed, and with NMOS crystal
The working mechanism of the measuring circuit is illustrated exemplified by pipe.Two large-sized NMOS tubes are pressed certain spacing side by side by this technology
It places, with laser bombardment one of those (referred to herein as main device), while measures the charge-trapping amount on two devices, so as to
Can obtain relation between the charge-trapping amount for not bombarded transistor (referred to herein as from device) directly and laser energy and
From the relation of distance between device charge-trapping amount and two transistor.This technology makes people have MCC and SEMT more to manage
The understanding of property；However, the defects of technology, is also apparent, because the charge-trapping amount data of the MCC obtained in measurement are very
Difficulty is converted into pulse shape (such as width, amplitude) information of each transient pulse in SEMT.Later, W.G.Bennett et al. existed
" the Experimental delivered on IEEE Transaction on Nuclear Science (IEEE atomic energy sciences journal)
Characterization of radia-tion-induced charge the sharing " (realities that the charge of radiation-actuate is shared
Test characterization) (volume 60, the 4159-4166 pages of the 6th phase of December in 2013), based on diode to propose another single-particle more
Transient measurement method.Four diodes are placed on square four angle by this method, the positional symmetry of four diodes,
Laser Experiments are not only carried out, but also have carried out heavy ion experiment, and obtain more transient current pulses of single-particle induction.Though
For the right experiment is compared with former approach, heavy ion wide beam can not only be suitable for and tested, and generation can also be directly observed
The more transient current pulses of single-particle；But the measurement of more current transient pulses tends to rely on high-precision oscillograph in this method,
Thus measured current transient pulse often serious distortion；Therefore this method still can not be weighed in integrated circuit exactly
The more transient responses of single-particle.
The content of the invention
The technical problem to be solved by the present invention is to：Process is tapered in 65nm and its following technique, in integrated circuit
The more transient states of single-particle that charge shares induction become a kind of universal phenomenon, and the more transient measurement methods of current single-particle cannot be accurate
Really reflect the more transient responses of single-particle in integrated circuit, thus present invention proposition is a kind of to the more transient states of single-particle in integrated circuit
The universal method measured, measuring circuit include objective circuit and SEMT capture circuits.
The technical scheme is that：
The first step, structure generates the objective circuit of SEMT, for generating single-ion transient state SET or the more transient states of single-particle
SEMT comprises the following steps：
1.1 according to measurement target, M1 similar standard blocks of selection from standard cell lib, such as phase inverter, NAND gate,
M1 >=1, M1 are integer.For example, when measuring the SEMT between phase inverter, the inverter module in M1 standard cell lib is selected,
When measuring the SEMT between NAND gate, the NAND gate unit in M1 standard paragraphs member storehouse is selected.
1.2 conspire to create M1 selected standard blocks M1 grades of cellular chain, and will be in the cellular chain in layout design
Each unit longitudinally puts into longitudinal elongate in shape.
1.3 on domain, which is replicated N-1 parts, and equidistantly longitudinal direction is put side by side in domain by N number of cellular chain
It puts, N >=2, N is integer.
1.4 by the permanent Unit 0 (Tie-Low) of logic that the input of N number of cellular chain is connected respectively in standard cell lib or patrol
Collect the output terminal of permanent 1 (Tie-High) unit.
Second step, structure SEMT capture circuits
SEMT capture circuits in the present invention propose that SET arresting structures (were sent out in 2006 based on B.Narasimham
Table is in IEEE Transaction on Device＆Material Reliability<IEEE devices and reliability of material journal>
On 4 phases of volume 6, topic is " On-chip characterization of single event transient pulse
widths”<The online characterization of single event transient pulse width>) improve.The technology that B.Narasimham is proposed is to capture
The SET propagated in chain of inverters is changed into number by the chain of flip-flops formed in circuit with dozens of or the trigger of a hundred or so
Value and latch automatically.If being generated in objective circuit without SET, the numerical value in the capture circuit in chain of flip-flops is 01 ...
0101 ... 01 (or 10 ... 1010 ... 10)；If there is SET generations in objective circuit, in the capture circuit in chain of flip-flops
Numerical value will become 01 ... 1010 ... 01 (or 10 ... 0101 ... 10).At this moment connect in the capture circuit in chain of flip-flops
The trigger number of supervention life numerical value overturning is multiplied by the pulse width that phase inverter delay is SET to be measured.SEMT in the present invention
It is as follows to capture circuit structure process：
The chain of inverters and N M3 grades of d type flip flop chain of 2.1 N M2 grades of constructions, the designed measurement of selection gist of M2
The range of SEMT determines that M3 is positive integer, M2 is the integral multiple of M3.
Reinforcement technique ripe on each trigger application engineering in 2.2 pairs of N chain of flip-flops (such as triplication redundancy is reinforced)
Single-particle inversion reinforcing is carried out, single-particle inversion or the single event multiple bit upset interference triggered to avoid particle bombardment chain of flip-flops
Measurement result.
2.3 are set as the arbitrary inverter output close to midpoint (M2/2) in N chain of inverters from trigger node,
And construct it is N number of it is corresponding as B.Naramsimham it is described in text from flip-flop circuit (543 paragraph 1 2nd section reciprocal, reciprocal and
The paragraph 1 of page 544).
2.4 are directly linked together N number of from the reset signal of flip-flop circuit, so that energy is same after the completion of SEMT is captured
When by it is N number of capture circuit resetted and be ready for next time SEMT capture.
Objective circuit and SEMT capture circuits are connected into test circuit by the 3rd step, and flow is as follows：
By the way that the output terminal of N M1 grades of cellular chain is connected the defeated of corresponding M2 grades of chain of inverters in N number of capture circuit
Enter on end, objective circuit and SEMT capture circuits are connected into measuring circuit.
4th step constructs test chip and produces test chip：
It is designed according to chip and produces related procedure, produce several test chips, test chip quantity is needed according to actual
Depending on wanting.
5th step carries out radiation experiments, and on-line measurement SEMT distribution of pulses, flow are as follows in radiation environment：
5.1 are placed in the test chip containing objective circuit and SEMT capture circuits in radiation environment, and radiation environment can be
Real radiation environment or laboratory radiation environment；
5.2 judge to radiate whether injection volume reaches setting value, if radiating the value that injection rate reaches set in experimentation
(injection rate is radiated under such as heavy ion radiation environment and reaches 1e7ions/cm2When), stop on-line measurement, and to being gathered
SET or SEMT information is preserved, and radiation experiments terminate；Otherwise, 5.3 are entered step；
5.3 when particle bombardment is to objective circuit, if just through the sensitizing range of some or certain several transistors, this
Or there may be SET or SEMT for these transistors；
5.4 SET generated or SEMT are propagated forward along cellular chain, start to capture electricity in SEMT when passing to unit chain end
It is propagated in road in corresponding chain of inverters；
5.5, when SET or SEMT is passed to from trigger node, trigger the SET that will be propagated from flip-flop circuit on phase inverter
Or SEMT is latched into corresponding capture circuit in chain of flip-flops, chain of flip-flops keeps its data constant in SEMT capture circuits,
And it sends capture to external test platform (such as FPGA platform can be by programming the platform to communicate with test chip) and completes
Signal and wait external testing platform reset；
Test platform outside 5.6 completes signal according to capture and reads by each SEMT pulses, and passes through serial ports and be sent to meter
Calculation machine carries out graphical display, and then the SEMT capture circuits into test chip send reset signal；
5.7SEMT captures circuit after external testing platform receives reset signal, is restored to the shape that can capture SEMT
State goes to step 5.3.
Following technique effect can be reached using the present invention：
SEMT captures circuit for the SET capture circuits that Narasimham is proposed in the present invention, not only will wherein
Chain of flip-flops reinforced, inverter module SEMT distribution of pulses information can be obtained exactly, and can be marked exactly
Other cell Ss EMT distribution of pulses information in quasi- cell library avoids measurement caused by single-particle inversion/single event multiple bit upset
Error, and the mode that N number of capture circuit is carried out at the same time capture is employed for the first time, improve measurement efficiency.
Description of the drawings
Fig. 1 is the overview flow chart of the universal more transient pulse distribution measurement methods of single-particle of the present invention；
Fig. 2 be using standard block be inverter module as embodiment, the objective circuit schematic diagram of the first step of the present invention structure；
Fig. 3 is the measuring circuit building-block of logic of the first step of the present invention and second step structure；
Fig. 4 is, the SEMT capture circuit diagram of of the present invention second step structure equal with M2 for embodiment with M3.
Specific embodiment
Fig. 1 is the overview flow chart of the universal more transient pulse distribution measurement methods of single-particle of the present invention, including with dirty
Journey：
The first step, structure generates the objective circuit of SEMT, for generating single-ion transient state SET or the more transient states of single-particle
SEMT comprises the following steps：
1.5 according to measurement target, M1 similar standard blocks of selection from standard cell lib, such as phase inverter, NAND gate,
M1 >=1, M1 are integer.For example, when measuring the SEMT between phase inverter, the inverter module in M1 standard cell lib is selected,
When measuring the SEMT between NAND gate, the NAND gate unit in M1 standard paragraphs member storehouse is selected.
1.6 conspire to create M1 selected standard blocks M1 grades of cellular chain, and will be in the cellular chain in layout design
Each unit longitudinally puts into longitudinal elongate in shape.
1.7 on domain, which is replicated N-1 parts, and equidistantly longitudinal direction is put side by side in domain by N number of cellular chain
It puts, N >=2, N is integer.
1.8 by the permanent Unit 0 (Tie-Low) of logic that the input of N number of cellular chain is connected respectively in standard cell lib or patrol
Collect the output terminal of permanent 1 (Tie-High) unit.
Second step, structure SEMT capture circuits, flow are as follows：
The chain of inverters and N M3 grades of d type flip flop chain of 2.1 N M2 grades of constructions, the designed measurement of selection gist of M2
The range of SEMT determines that M3 is positive integer, M2 is the integral multiple of M3.
Reinforcement technique ripe on each trigger application engineering in 2.2 pairs of N chain of flip-flops (such as triplication redundancy is reinforced)
Single-particle inversion reinforcing is carried out, single-particle inversion or the single event multiple bit upset interference triggered to avoid particle bombardment chain of flip-flops
Measurement result.
2.3 are set as the arbitrary inverter output close to midpoint (M2/2) in N chain of inverters from trigger node,
And construct it is N number of it is corresponding as B.Naramsimham it is described in text from flip-flop circuit (543 paragraph 1 2nd section reciprocal, reciprocal and
The paragraph 1 of page 544).
2.4 are directly linked together N number of from the reset signal of flip-flop circuit, so that energy is same after the completion of SEMT is captured
When by it is N number of capture circuit resetted and be ready for next time SEMT capture.
3rd step, the measuring circuit that SEMT distributions are measured in of the invention are made of two parts, and first portion is for generating
The objective circuit of SEMT, second portion are the SEMT capture circuits for capturing SET or SEMT, and objective circuit and SEMT are captured circuit
Measuring circuit as shown in Figure 3 is connected into, flow is as follows：
By the way that the output terminal of N M1 grades of cellular chain is connected the defeated of corresponding M2 grades of chain of inverters in N number of capture circuit
Enter on end, objective circuit and SEMT capture circuits are connected into measuring circuit.
4th step constructs test chip and produces test chip：
It is designed according to chip with producing related procedure, produces several test chips.
5th step carries out radiation experiments, and on-line measurement SEMT distribution of pulses, flow are as follows in radiation environment：
5.1 are placed in the test chip containing objective circuit and SEMT capture circuits in radiation environment, and radiation environment can be
Real radiation environment or laboratory radiation environment；
5.2 judge to radiate whether injection volume reaches setting value, if radiating the value that injection rate reaches set in experimentation
(injection rate is radiated under such as heavy ion radiation environment and reaches 1e7ions/cm2When), stop on-line measurement, and to being gathered
SET or SEMT information is preserved, and radiation experiments terminate；Otherwise, 5.3 are entered step；
5.3 when particle bombardment is to objective circuit, if just through the sensitizing range of some or certain several transistors, this
Or there may be SET or SEMT for these transistors；
5.4 SET generated or SEMT are propagated forward along cellular chain, start to capture electricity in SEMT when passing to unit chain end
It is propagated in road in corresponding chain of inverters；
5.5, when SET or SEMT is passed to from trigger node, trigger the SET that will be propagated from flip-flop circuit on phase inverter
Or SEMT is latched into corresponding capture circuit in chain of flip-flops, chain of flip-flops keeps its data constant in SEMT capture circuits,
And it sends capture to external test platform (such as FPGA platform can be by programming the platform to communicate with test chip) and completes
Signal and wait external testing platform reset；
Test platform outside 5.6 completes signal according to capture and walks and pass through serial ports to be sent to calculating by each SEMT pulses reading
Machine carries out graphical display, and then the SEMT capture circuits into test chip send reset signal；
5.7SEMT captures circuit after external testing platform receives reset signal, is restored to the shape that can capture SEMT
State goes to step 5.3.
Fig. 2 be using standard block be inverter module as embodiment, the first step of the invention structure objective circuit principle
Figure.In the present embodiment, M1 selected inverter modules conspire to create M1 grades of cellular chain, and by the cellular chain in layout design
Middle each unit longitudinally puts into longitudinal elongate in shape.Then, on domain, which is replicated N-1 parts, and by N number of unit
Chain in domain equidistantly place side by side by longitudinal direction, and N >=2, N are integer.Then the input of N number of cellular chain is connected respectively to standard
The output terminal of the permanent Unit 0 of logic in cell library forms the objective circuit of the present invention.
Fig. 4 is, the SEMT capture circuit diagram of of the present invention second step structure equal with M2 for embodiment with M3.It is by M2
Grade chain of inverters and M3 (M2 divides exactly M3) grade chain of flip-flops form, trigger for d type flip flop (Data Flip-Flop,
DFF) trigger.In the present embodiment, M3 is equal with M2, and every grade of phase inverter output node for capturing chain of inverters in circuit is connected to
It is corresponded in capture circuit trigger device chain in the data input of trigger.Dotted line therein represents triggering certainly from flip-flop circuit
Signal, for control each trigger by each inverter output signal latch in chain of inverters be numerical value.
Claims (3)
1. a kind of more transient pulse distribution measurement methods of universal single-particle, which is characterized in that comprise the following steps：
The first step, structure generates the objective circuit of SEMT, for generating the single-ion transient state SET or more transient state SEMT of single-particle, bag
Include following steps：
1.1, according to measurement target, select M1 similar standard blocks, M1 >=1, M1 are integer from standard cell lib；
1.2 conspire to create M1 selected standard blocks M1 grades of cellular chain, and by each list in the cellular chain in layout design
Put into longitudinal elongate in shape in first longitudinal direction；
1.3 on domain, which is replicated N-1 parts, and equidistantly longitudinal direction is placed side by side in domain by N number of cellular chain, N
>=2, N are integer；
The input of N number of cellular chain is connected respectively to the defeated of the permanent Unit 0 of logics in standard cell lib or the permanent Unit 1 of logic by 1.4
Outlet；
Second step, structure SEMT capture circuits, comprises the following steps：
The chain of inverters and N M3 grades of d type flip flop chain of 2.1 N M2 grades of constructions, the designed measurement SEMT's of selection gist of M2
Range determines that M3 is positive integer, M2 is the integral multiple of M3；
Each trigger carries out single-particle inversion reinforcing with triplication redundancy reinforcement technique in 2.2 pairs of N chain of flip-flops；
2.3 are set as the arbitrary inverter output close to midpoint in N chain of inverters from trigger node, and construct N number of
From flip-flop circuit；
2.4 are directly linked together N number of from the reset signal of flip-flop circuit；
Objective circuit and SEMT capture circuits are connected into test circuit by the 3rd step, and flow is as follows：
By the input terminal that the output terminal of N M1 grades of cellular chain is connected to corresponding M2 grades of chain of inverters in N number of capture circuit
On, objective circuit and SEMT capture circuits are connected into measuring circuit；
4th step constructs test chip and produces test chip；
5th step carries out radiation experiments, and on-line measurement SEMT distribution of pulses, flow are as follows in radiation environment：
5.1 are placed in the test chip containing objective circuit and SEMT capture circuits in radiation environment, and radiation environment can be true
Radiation environment or laboratory radiation environment；
5.2 judge to radiate whether injection volume reaches setting value, if the value that injection rate reaches set is radiated in experimentation, stop
Only on-line measurement, and SET the or SEMT information to being gathered preserves, radiation experiments terminate；Otherwise, 5.3 are entered step；
5.3 when particle bombardment is to objective circuit, if just through the sensitizing range of some or certain several transistors, this or this
There may be SET or SEMT for a little transistors；
The SET or SEMT that 5.4 objective circuits generate are propagated forward along cellular chain, start to catch in SEMT when passing to unit chain end
It obtains in circuit and is propagated in corresponding chain of inverters；
5.5 when SET or SEMT is passed to from trigger node, trigger the SET propagated on phase inverter from flip-flop circuit or
SEMT is latched into corresponding capture circuit in chain of flip-flops, and chain of flip-flops keeps its data constant in SEMT capture circuits, and
To capture completion signal can be sent by programming the external testing platform to communicate with test chip, external testing platform is waited
It resets；
Test platform outside 5.6 completes signal according to capture and reads by each SEMT pulses, and is sent to computer, then to survey
The SEMT capture circuits tried in chip send reset signal；
5.7SEMT captures circuit after external testing platform receives reset signal, is restored to the state that can capture SEMT, turns
Step 5.3.
2. the universal more transient pulse distribution measurement methods of single-particle as described in claim 1, which is characterized in that the step
M2/2 inverter outputs are set as from trigger node in 2.3.
3. the universal more transient pulse distribution measurement methods of single-particle as described in claim 1, which is characterized in that the step
External test platform uses FPGA platform in 5.5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610194323.8A CN105866659B (en) | 2016-03-31 | 2016-03-31 | A kind of more transient pulse distribution measurement methods of universal single-particle |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610194323.8A CN105866659B (en) | 2016-03-31 | 2016-03-31 | A kind of more transient pulse distribution measurement methods of universal single-particle |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105866659A CN105866659A (en) | 2016-08-17 |
| CN105866659B true CN105866659B (en) | 2018-05-25 |
Family
ID=56627293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610194323.8A Active CN105866659B (en) | 2016-03-31 | 2016-03-31 | A kind of more transient pulse distribution measurement methods of universal single-particle |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105866659B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106405385B (en) * | 2016-08-31 | 2019-03-05 | 西北核技术研究所 | Logic circuit single particle effect test method based on chain of flip-flops |
| CN110988496B (en) * | 2019-12-13 | 2021-05-11 | 西安电子科技大学 | Three-way-test single-particle transient pulse width measuring circuit |
| CN111766438A (en) * | 2020-07-28 | 2020-10-13 | 哈尔滨工业大学 | Transient current test system and test method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101551421B (en) * | 2009-02-27 | 2010-11-10 | 北京时代民芯科技有限公司 | A structure of SET collecting and detecting circuit |
| US8447548B2 (en) * | 2009-04-07 | 2013-05-21 | The Boeing Company | Method using time to digital converter for direct measurement of set pulse widths |
-
2016
- 2016-03-31 CN CN201610194323.8A patent/CN105866659B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN105866659A (en) | 2016-08-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Gill et al. | Comparison of alpha-particle and neutron-induced combinational and sequential logic error rates at the 32nm technology node | |
| Weller et al. | General framework for single event effects rate prediction in microelectronics | |
| WO2018000495A1 (en) | Chip single-event effect detection method and device | |
| CN105866659B (en) | A kind of more transient pulse distribution measurement methods of universal single-particle | |
| US20080281572A1 (en) | Integrated circuit (ic) design method and method of analyzing radiation-induced single-event upsets in cmos logic designs | |
| Wang et al. | Single-event transient sensitivity evaluation of clock networks at 28-nm CMOS technology | |
| Bosser | Single-event effects from space and atmospheric radiation in memory components | |
| CN104678188A (en) | Single-particle transient pulse width measuring circuit | |
| Campitelli et al. | F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments | |
| Lo Presti et al. | Neutron radiation effects on an electronic system on module | |
| Hiemstra et al. | Single event upset characterization of the Kintex UltraScale field programmable gate array using proton irradiation | |
| Tosaka et al. | Cosmic ray neutron-induced soft errors in sub-half micron CMOS circuits | |
| Cai et al. | Heavy-ion and pulsed-laser single event effects in 130-nm CMOS-based thin/thick gate oxide anti-fuse PROMs | |
| Helbing et al. | Experimental verification of the GDH sum rule at ELSA and MAMI | |
| Liang et al. | Comparison of single-event upset generated by heavy ion and pulsed laser | |
| He et al. | Comparison of heavy-ion induced SEU for D-and TMR-flip-flop designs in 65-nm bulk CMOS technology | |
| Cao et al. | Heavy ion-induced single event upset sensitivity evaluation of 3D integrated static random access memory | |
| Kumar et al. | An ultra-dense irradiation test structure with a NAND/NOR readout chain for characterizing soft error rates of 14nm combinational logic circuits | |
| Liu | Study of radiation effects on 28nm UTBB FDSOI technology | |
| Yao et al. | A SEU test and simulation method for Zynq BRAM and flip-flops | |
| Pei et al. | Direct measurement of an energy-dependent single-event-upset cross-section with time-of-flight method at CSNS | |
| Huang et al. | Characterization of charge sharing induced by high LET heavy ions using inverter chains in a commercial bulk FinFET process | |
| Andjelkovic et al. | 2D TCAD simulations of single event transients in 250 nm bulk CMOS technology | |
| Ünlü et al. | Neutron-induced soft error rate measurements in semiconductor memories | |
| Wang | Research on single event effect based on micro-nano SRAM semiconductor devices |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |