CN105847206B - 用于极性调制的电路和方法 - Google Patents
用于极性调制的电路和方法 Download PDFInfo
- Publication number
- CN105847206B CN105847206B CN201610198639.4A CN201610198639A CN105847206B CN 105847206 B CN105847206 B CN 105847206B CN 201610198639 A CN201610198639 A CN 201610198639A CN 105847206 B CN105847206 B CN 105847206B
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- CN
- China
- Prior art keywords
- signal
- frequency
- output signal
- phase
- delayed
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/361—Modulation using a single or unspecified number of carriers, e.g. with separate stages of phase and amplitude modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/82—Digital/analogue converters with intermediate conversion to time interval
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Amplitude Modulation (AREA)
Abstract
Description
Claims (5)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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DE102011089422.5 | 2011-12-21 | ||
DE102011089422 | 2011-12-21 | ||
DE102012212397.0 | 2012-07-16 | ||
DE102012212397.0A DE102012212397B4 (de) | 2011-12-21 | 2012-07-16 | Schaltung und Verfahren |
CN201280063335.7A CN103999423B (zh) | 2011-12-21 | 2012-12-20 | 电路和方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280063335.7A Division CN103999423B (zh) | 2011-12-21 | 2012-12-20 | 电路和方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105847206A CN105847206A (zh) | 2016-08-10 |
CN105847206B true CN105847206B (zh) | 2019-10-25 |
Family
ID=48575810
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280063335.7A Active CN103999423B (zh) | 2011-12-21 | 2012-12-20 | 电路和方法 |
CN201610198639.4A Active CN105847206B (zh) | 2011-12-21 | 2012-12-20 | 用于极性调制的电路和方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280063335.7A Active CN103999423B (zh) | 2011-12-21 | 2012-12-20 | 电路和方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US9041576B2 (zh) |
CN (2) | CN103999423B (zh) |
DE (1) | DE102012212397B4 (zh) |
WO (1) | WO2013092876A1 (zh) |
Families Citing this family (15)
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DE102012212397B4 (de) * | 2011-12-21 | 2024-02-29 | Apple Inc. | Schaltung und Verfahren |
US8848831B2 (en) * | 2012-09-20 | 2014-09-30 | Lsi Corporation | Direct digital synthesis of quadrature modulated signals |
US9847676B2 (en) * | 2013-09-27 | 2017-12-19 | Intel IP Corporation | Power saving technique for digital to time converters |
DE102013113495A1 (de) * | 2013-12-04 | 2015-06-11 | Intel IP Corporation | Vorrichtung und Verfahren zum Bereitstellen von Oszillatorsignalen |
US9288841B2 (en) | 2013-12-23 | 2016-03-15 | Intel IP Corporation | Direct digital frequency generation using time and amplitude |
US9331722B2 (en) * | 2013-12-26 | 2016-05-03 | Intel IP Corporation | Feedback calibration of digital to time converter |
US9397689B2 (en) * | 2014-11-24 | 2016-07-19 | Intel Corporation | Interpolator systems and methods |
DE102014119480B4 (de) * | 2014-12-23 | 2018-02-08 | Intel Ip Corp. | Rauschformungsschaltung, Digital-Zeit-Wandler, Analog-Digital-Wandler, Digital-Analog-Wandler, Frequenzsynthesizer, Sender, Empfänger, Sendeempfänger, Verfahren zum Formen von Rauschen in einem Eingangssignal |
US9577684B1 (en) * | 2015-11-25 | 2017-02-21 | Intel IP Corporation | High frequency time interleaved digital to time converter (DTC) |
EP3182604A1 (en) * | 2015-12-14 | 2017-06-21 | Intel IP Corporation | Apparatus for reducing an amplitude imbalance and a phase imbalance between an in-phase signal and a quadrature signal |
US9565043B1 (en) * | 2016-03-16 | 2017-02-07 | Intel IP Corporation | Hybrid I-Q polar transmitter with quadrature local oscillator (LO) phase correction |
CN107317592B (zh) * | 2016-04-26 | 2020-12-11 | 中兴通讯股份有限公司 | 一种发射机及其实现信号处理的方法 |
US10103761B2 (en) | 2016-09-26 | 2018-10-16 | Intel Corporation | Local oscillator signal generation using opportunistic synthesizer to clock digital synthesis |
US10581418B2 (en) | 2018-01-05 | 2020-03-03 | Samsung Electronics Co., Ltd | System and method for fast converging reference clock duty cycle correction for digital to time converter (DTC)-based analog fractional-N phase-locked loop (PLL) |
FR3100404B1 (fr) | 2019-09-03 | 2021-09-17 | Commissariat Energie Atomique | Circuit et procédé de modulation polaire de phase ou de fréquence |
Citations (2)
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CN1478204A (zh) * | 2000-11-30 | 2004-02-25 | ���ء����߸� | 在测距设备中实现频率合成的方法和装置及测距设备 |
CN102523763A (zh) * | 2010-09-08 | 2012-06-27 | 松下电器产业株式会社 | Pll频率合成器 |
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US6100736A (en) | 1997-06-05 | 2000-08-08 | Cirrus Logic, Inc | Frequency doubler using digital delay lock loop |
KR100295812B1 (ko) | 1999-06-18 | 2001-07-12 | 서평원 | 고속 위상검출기를 이용한 디지털 위상동기루프 |
CN1465029A (zh) | 2001-06-15 | 2003-12-31 | 阿纳洛格装置公司 | 一个可变模分数计算器,以及一个结合了该可变模分数计算器的可变频率合成器 |
US6720959B2 (en) | 2002-03-28 | 2004-04-13 | Texas Instruments Incorporated | Area efficient, low power and flexible time digitizer |
US7813462B2 (en) | 2005-10-19 | 2010-10-12 | Texas Instruments Incorporated | Method of defining semiconductor fabrication process utilizing transistor inverter delay period |
US20070189431A1 (en) | 2006-02-15 | 2007-08-16 | Texas Instruments Incorporated | Delay alignment in a closed loop two-point modulation all digital phase locked loop |
US7409416B2 (en) | 2006-05-30 | 2008-08-05 | Motorola, Inc. | Digital-to-time converter using cycle selection windowing |
CN101257302B (zh) * | 2007-02-27 | 2011-10-05 | 北京朗波芯微技术有限公司 | 振荡器的频率调节方法及小数分频锁相环频率合成器 |
US8045670B2 (en) | 2007-06-22 | 2011-10-25 | Texas Instruments Incorporated | Interpolative all-digital phase locked loop |
US8339295B2 (en) | 2007-07-31 | 2012-12-25 | Motorola Solutions, Inc. | Method and system for managing digital to time conversion |
JP4729054B2 (ja) | 2008-01-28 | 2011-07-20 | 株式会社東芝 | 通信用半導体集積回路 |
US20100323643A1 (en) | 2008-02-28 | 2010-12-23 | Nxp B.V. | Frequency synthesis |
US20100260242A1 (en) | 2008-03-04 | 2010-10-14 | Katsuaki Abe | Time digital converter, digital pll frequency synthesizer, transceiver, and receiver |
US7859344B2 (en) | 2008-04-29 | 2010-12-28 | Renesas Electronics Corporation | PLL circuit with improved phase difference detection |
TWI404073B (zh) | 2009-01-22 | 2013-08-01 | Univ Nat Taiwan Science Tech | 數位至時間轉換器與數位至時間轉換方法 |
CN101640533B (zh) * | 2009-08-14 | 2011-10-05 | 东南大学 | 一种全数字锁相环的快速锁定方法 |
US8344772B2 (en) | 2009-12-18 | 2013-01-01 | Electronics And Telecommunications Research Institute | Time-to-digital converter and all digital phase-locked loop including the same |
EP2339753B1 (en) * | 2009-12-24 | 2012-07-04 | Nxp B.V. | A digital phase locked loop |
US8228106B2 (en) | 2010-01-29 | 2012-07-24 | Intel Mobile Communications GmbH | On-chip self calibrating delay monitoring circuitry |
US8736384B2 (en) | 2010-04-29 | 2014-05-27 | Intel Corporation | Delay line calibration |
US8228219B2 (en) | 2010-06-15 | 2012-07-24 | Infineon Technologies Ag | Time-to-digital converter with calibration |
US8855215B2 (en) * | 2011-05-09 | 2014-10-07 | The Royal Institution For The Advancement Of Learning/Mcgill University | Phase/frequency synthesis using periodic sigma-delta modulated bit-stream techniques |
DE102012212397B4 (de) * | 2011-12-21 | 2024-02-29 | Apple Inc. | Schaltung und Verfahren |
US9077375B2 (en) | 2011-12-21 | 2015-07-07 | Intel Mobile Communications GmbH | DTC system with high resolution phase alignment |
-
2012
- 2012-07-16 DE DE102012212397.0A patent/DE102012212397B4/de active Active
- 2012-12-20 CN CN201280063335.7A patent/CN103999423B/zh active Active
- 2012-12-20 US US13/976,649 patent/US9041576B2/en active Active
- 2012-12-20 CN CN201610198639.4A patent/CN105847206B/zh active Active
- 2012-12-20 WO PCT/EP2012/076405 patent/WO2013092876A1/en active Application Filing
-
2015
- 2015-05-22 US US14/720,155 patent/US9692443B2/en active Active
Patent Citations (2)
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CN1478204A (zh) * | 2000-11-30 | 2004-02-25 | ���ء����߸� | 在测距设备中实现频率合成的方法和装置及测距设备 |
CN102523763A (zh) * | 2010-09-08 | 2012-06-27 | 松下电器产业株式会社 | Pll频率合成器 |
Non-Patent Citations (1)
Title |
---|
"A Fully Digital Polar Transmitter Using a Digital-to-Time Converter for High Data Rate System";Yong-Chang Choi;《2009 IEEE International Symposium on Radio-Frequency Integration Technology》;20090109;第56-59页 * |
Also Published As
Publication number | Publication date |
---|---|
US9692443B2 (en) | 2017-06-27 |
CN105847206A (zh) | 2016-08-10 |
US20140002287A1 (en) | 2014-01-02 |
WO2013092876A1 (en) | 2013-06-27 |
DE102012212397B4 (de) | 2024-02-29 |
DE102012212397A1 (de) | 2013-06-27 |
CN103999423A (zh) | 2014-08-20 |
US9041576B2 (en) | 2015-05-26 |
CN103999423B (zh) | 2018-02-02 |
US20160380645A1 (en) | 2016-12-29 |
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Address after: Neubiberg, Germany Patentee after: Intel Mobile Communications GmbH Address before: Neubiberg, Germany Patentee before: Intel Mobile Communications GmbH |
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Effective date of registration: 20200707 Address after: California, USA Patentee after: Apple Inc. Address before: California, USA Patentee before: INTEL Corp. Effective date of registration: 20200707 Address after: California, USA Patentee after: INTEL Corp. Address before: Neubiberg, Germany Patentee before: Intel Mobile Communications GmbH |
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