CN105845674A - Wafer level LED array packaging method - Google Patents
Wafer level LED array packaging method Download PDFInfo
- Publication number
- CN105845674A CN105845674A CN201610357392.6A CN201610357392A CN105845674A CN 105845674 A CN105845674 A CN 105845674A CN 201610357392 A CN201610357392 A CN 201610357392A CN 105845674 A CN105845674 A CN 105845674A
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- Prior art keywords
- led
- led chip
- array
- encapsulation
- stopper slot
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
Abstract
The invention discloses a wafer level LED array packaging method. The method comprises following steps of S1, providing an LED preformed element, wherein the LED preformed element comprises a wafer substrate and LED chips, and a plurality of array units are arranged on the wafer substrate; S2, setting a plurality of array set LED chip regions on the array units; installing the LED chips on the LED chip regions by flip chip; S3, cutting the wafer substrate into a plurality of array units; S4, packaging the array units; dispensing on the LED chips, thus forming packaging lens layers; and S5, cutting the LED chips on the array units into a plurality of LED chip packaging bodies. According to the method, the wafer substrate is arranged into the plurality of array units; after the LED chips are installed by flip chip, the array units are cut; dispensing is carried out; and the packaging lens layers are formed. Therefore, after the lens layers are prepared, the heat generated by a partial heating loop is relatively low, the heat dissipation is rapid, and the difficult heat dissipation problem in the preparation process is solved well.
Description
Technical field
The present invention relates to wafer scale LED encapsulation technology field, the method particularly relating to the encapsulation of wafer scale LED array.
Background technology
LED owing to having that volume is little, the feature such as power saving and life-span length be applied to illumination, backlight etc. the most more and more
Field.But, owing to LED is relatively costly, hinder it further to promote.The encapsulation of wafer scale LED is to reduce cost
Effective ways.Wafer stage chip encapsulation technology is by carrying out cutting again and obtain single finished product after full wafer wafer being packaged test
The technology of chip.Crystal wafer chip dimension encapsulation technology changes conventional package such as ceramic leadless chip carrier, organic nothing lead-in wire core
Sheet carrier and the pattern of digital camera modular, complied with market the lightest to microelectronic product, thin, short, little and low priceization
Requirement, is focus and the trend of future development in current encapsulation field.
But the packaging technology of traditional LED component is difficult to high-density packages, it is not suitable for wafer-level packaging yet.Based on this,
Frequently with arranging several array LED chip slot in wafer substrate, then by LED chip upside-down mounting and utilize plastic packaging glue to be formed
Mirror layer.But this method is in manufacturing process, after forming local heating circuit, can produce substantial amounts of heat, heat dissipation problem is difficult
To solve, easily affect the life-span of LED chip, service behaviour etc..
Summary of the invention
It is an object of the invention to overcome the shortcoming of prior art, it is provided that the method for a kind of wafer scale LED array encapsulation.
For solving above-mentioned technical problem, present invention employs techniques below measure:
The method of wafer scale LED array encapsulation, comprises the following steps:
S1, it is provided that LED prefabricated component, including wafer substrate, LED chip, arranges several array elements in wafer substrate；
S2, arranges several arrays on array element and arranges LED core section, LED chip be inverted on LED core section；
S3, cuts into some array elements by wafer substrate；
S4, is packaged array element, carries out a glue above described LED chip, forms package lens layer；
S5, cuts into several LED chip packaging bodies by the LED chip on array element.
The present invention can also be the most perfect by techniques below measure:
As improving further, the surrounding of described LED core section forms stopper slot, and the degree of depth of described stopper slot is along away from described
The direction of LED core section is progressively deepened.
As improving further, step LED chip being inverted on LED core section includes:
S21, arranges conductive layer in the front of wafer substrate, and described conductive layer is provided with the circuit for being connected with LED chip,
The position of described conductive layer correspondence stopper slot offers through hole；
S22, by LED chip upside-down mounting on the electrically conductive, be then sticked above LED chip diaphragm.
As improving further, the step that described array element is packaged includes:
S41, smears fluorescent material in described LED chip, and described fluorescent material is yellow fluorescent powder, green emitting phosphor or red glimmering
Light powder；
S42, carries out a glue in described LED chip, makes described glue cover described LED chip and extend to described stopper slot,
Then being cooled to room temperature makes it solidify to form package lens layer.
As improving further, described each array element includes the LED core section that 16 arrays are arranged, described LED chip
District is arranged to 4 row and takes advantage of 4 row.
As improving further, define depth capacity D of described stopper slot, define the Breadth Maximum W of described stopper slot, definition
The thickness of described LED chip is d, wherein, and 0.1d≤D≤0.2d, 0.1D≤W≤0.3D.
As improving further, described diaphragm is UV film, and the thickness of described diaphragm is 0.10mm～0.18mm.
As improving further, described LED core section is square, and the surrounding of described LED core section is surrounded with four strips
Stopper slot, described four stopper slots are the most end to end.
As improving further, described LED chip uses blue chip, and described fluorescent material uses yellow fluorescent powder, described single
Phosphor powder layer in LED chip is 1:100～3:100 with the weight ratio of package lens layer.
As improving further, described stopper slot is arc surface or plane near the surface of described LED chip.
Compared with prior art, the invention have the advantages that
1, wafer substrate is arranged to several array elements, after LED chip upside-down mounting, just array element cutting is come,
Carry out a glue again and form package lens layer.Therefore, after lens jacket completes, produce described in the local heating circuit of formation
Heat is less, and rapid heat dissipation, the problem well solving difficulty of dispelling the heat in manufacturing process.
2, by arranging stopper slot, the shape of package lens layer directly can be controlled, form height width ratio bigger
Package lens layer, thus improve light efficiency.And there is good position-limiting action, be obtained with height width ratio by single point glue
Package lens layer more than 0.5, and without repeating a glue.
Accompanying drawing explanation
Accompanying drawing 1 is the process chart of the method for wafer scale LED array of the present invention encapsulation；
Accompanying drawing 2 is the schematic diagram of a kind of embodiment of stopper slot in the method that wafer scale LED array of the present invention encapsulates；
Accompanying drawing 3 is the schematic diagram of the another kind of embodiment of stopper slot in the method that wafer scale LED array of the present invention encapsulates；
Accompanying drawing 4 is the schematic diagram of the another kind of embodiment of stopper slot in the method that wafer scale LED array of the present invention encapsulates.
Detailed description of the invention
With detailed description of the invention, the present invention is described in further detail below in conjunction with the accompanying drawings.
Refer to Fig. 1 extremely figure, the method for wafer scale LED array encapsulation, comprise the following steps:
S1, it is provided that LED prefabricated component, including wafer substrate 1, LED chip 40, arranges several battle arrays in wafer substrate 1
Column unit 10；
S2, arranges several arrays on array element 10 and arranges LED core section 11, LED chip 40 is inverted in LED
On chip region 11；
S3, cuts into some array elements 10 by wafer substrate 1；
S4, is packaged array element 10, carries out a glue above described LED chip 40, forms package lens layer 30；
S5, cuts into several LED chip 40 packaging bodies by the LED chip 40 on array element 10.
Wafer substrate 1 is arranged to several array elements 10, after LED chip 40 upside-down mounting, just array element 10 is cut
Isolate, then carry out a glue formation package lens layer 30.Therefore, after lens jacket 30 completes, the local heating of formation
The heat produced described in loop is less, and rapid heat dissipation, the problem well solving in manufacturing process difficulty of dispelling the heat.
In step 2, the surrounding of described LED core section 11 forms stopper slot 111, and the degree of depth of described stopper slot 111 along away from
The direction of described LED core section 11 is progressively deepened.The practical structures of described stopper slot 111 can be arranged according to actual needs,
As long as the degree of depth making described stopper slot 111 is progressively deepened along the direction away from described LED chip 40.Described stopper slot 111
It is arc surface or plane near the surface of described LED chip 40.In fig. 2, described stopper slot 111 is near described LED core
The surface of sheet 40 is outwardly arc surface.In figure 3, described stopper slot 111 is near the surface of described LED chip 40
For the plane tilted.In the diagram, described stopper slot 111 is the circular arc caved inward near the surface of described LED chip 40
Face.Described stopper slot 111 can be imprinted with technique or etching technics is formed.Described LED core section 11 can be circular,
Square, rectangle or other regular or irregular a few box shaped.Preferably, described LED core section 11 and described LED chip 40
Shape identical.
By arranging stopper slot 111, the shape of package lens layer 30 directly can be controlled, form height width ratio bigger
Package lens layer 30, thus improve light efficiency.And there is good position-limiting action, by single point glue be obtained with height/
The wide ratio package lens layer 30 more than 0.5, and without repeating a glue.
In the present embodiment, being shaped as of described LED chip 40 is square, and described LED core section 11 is square, described LED
The surrounding of chip region 11 is surrounded with the stopper slot 111 of four strips, and described four stopper slots 111 are the most end to end.Use
Square LED core section 11, easy to process fast, compare the region that LED chip 40 is arranged to concave downward, this structure
Processing want convenient and swift many.Wider one side R1 of definition LED chip 40, defines the narrower of LED chip 40
R2.Define length L1 of the parallel stopper slot 111 in one side wider with LED, define parallel stopper slot narrower with LED
Length L2 of 111.Wherein,Define described limit
Depth capacity D of position groove 111, defines the Breadth Maximum W of described stopper slot 111, defines the thickness of described LED chip 40
For d, wherein, 0.1d≤D≤0.2d, 0.1D≤W≤0.3D.
In step 2, the step that LED chip 40 is inverted on LED core section 11 is included:
S21, arranges conductive layer in the front of wafer substrate 1, and described conductive layer is provided with the electricity for being connected with LED chip 40
Road, the position of described conductive layer correspondence stopper slot 111 offers through hole 21；Wherein, described through hole 21 plays the effect of stepping down,
During point glue, plastic packaging glue is flowed in stopper slot 111 by through hole 21.The independent local that has of each array element 10 is heated back
Road.
S22, by LED chip 40 upside-down mounting on the electrically conductive, be then sticked above LED chip 40 diaphragm.Described protection
Film is UV film, and the thickness of described diaphragm is 0.10mm～0.18mm.
In step 3, wafer substrate 1 is cut into some array elements 10.Described each array element 10 includes 16 arrays
The LED core section 11 arranged, described LED core section 11 is arranged to 4 row and takes advantage of 4 row.
In step 4, the step that described array element 10 is packaged includes:
S41, smears fluorescent material in described LED chip 40, and described fluorescent material is yellow fluorescent powder, green emitting phosphor or redness
Fluorescent material；Selecting fluorescent material, the demands such as the colour temperature of illumination light, color that obtain as required select.In the present embodiment, institute
Stating LED chip 40 and use blue chip, described fluorescent material uses yellow fluorescent powder.Obtain single led chip 40 described in colour temperature
On the weight ratio of phosphor powder layer and package lens layer 30 be 1:100～3:100.
S42, carries out a glue in described LED chip 40, makes described glue cover described LED chip 40 and extend to described
Stopper slot 111, is then cooled to room temperature and makes it solidify to form package lens layer 30.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and former
Within then, any modification, equivalent substitution and improvement etc. done, within should be included in the scope of protection of the invention.
Claims (10)
1. the method for wafer scale LED array encapsulation, comprises the following steps:
S1, it is provided that LED prefabricated component, including wafer substrate, LED chip, arranges several array elements in wafer substrate；
S2, arranges several arrays on array element and arranges LED core section, LED chip be inverted on LED core section；
S3, cuts into some array elements by wafer substrate；
S4, is packaged array element, carries out a glue above described LED chip, forms package lens layer；
S5, cuts into several LED chip packaging bodies by the LED chip on array element.
The method of wafer scale LED array the most according to claim 1 encapsulation, it is characterised in that: described LED core section
Surrounding form stopper slot, and the degree of depth of described stopper slot is progressively deepened along away from the direction of described LED core section.
The method of wafer scale LED array the most according to claim 2 encapsulation, it is characterised in that: by LED chip upside-down mounting
Step on LED core section includes:
S21, arranges conductive layer in the front of wafer substrate, and described conductive layer is provided with the circuit for being connected with LED chip,
The position of described conductive layer correspondence stopper slot offers through hole；
S22, by LED chip upside-down mounting on the electrically conductive, be then sticked above LED chip diaphragm.
The method of wafer scale LED array the most according to claim 2 encapsulation, it is characterised in that: described array element is carried out
The step of encapsulation includes:
S41, smears fluorescent material in described LED chip, and described fluorescent material is yellow fluorescent powder, green emitting phosphor or red glimmering
Light powder；
S42, carries out a glue in described LED chip, makes described glue cover described LED chip and extend to described stopper slot,
Then being cooled to room temperature makes it solidify to form package lens layer.
The method of wafer scale LED array the most according to claim 2 encapsulation, it is characterised in that: described each array list
Unit includes the LED core section that 16 arrays are arranged, and described LED core section is arranged to 4 row and takes advantage of 4 row.
The method of wafer scale LED array the most according to claim 2 encapsulation, it is characterised in that: define described stopper slot
Depth capacity D, define the Breadth Maximum W of described stopper slot, the thickness defining described LED chip is d, wherein,
0.1d≤D≤0.2d, 0.1D≤W≤0.3D.
The method of wafer scale LED array the most according to claim 3 encapsulation, it is characterised in that: described diaphragm is UV
Film, the thickness of described diaphragm is 0.10mm～0.18mm.
The method of wafer scale LED array the most according to claim 5 encapsulation, it is characterised in that: described LED core section
For square, the surrounding of described LED core section is surrounded with the stopper slot of four strips, and described four stopper slots are the most end to end.
The method of wafer scale LED array the most according to claim 4 encapsulation, it is characterised in that: described LED chip is adopted
With blue chip, described fluorescent material uses yellow fluorescent powder, the phosphor powder layer on described single led chip and package lens layer
Weight ratio is 1:100～3:100.
The method of wafer scale LED array the most according to claim 2 encapsulation, it is characterised in that: described stopper slot is close
The surface of described LED chip is arc surface or plane.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610357392.6A CN105845674B (en) | 2016-05-26 | 2016-05-26 | The method of wafer scale LED array encapsulation |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610357392.6A CN105845674B (en) | 2016-05-26 | 2016-05-26 | The method of wafer scale LED array encapsulation |
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| Publication Number | Publication Date |
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| CN105845674A true CN105845674A (en) | 2016-08-10 |
| CN105845674B CN105845674B (en) | 2019-04-02 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109038209A (en) * | 2018-08-29 | 2018-12-18 | Oppo（重庆）智能科技有限公司 | Wafer-level packaging method, laser die group, CCD camera assembly and electronic device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436557A (en) * | 2007-11-13 | 2009-05-20 | 香港科技大学 | Wafer level encapsulation method of LED array encapsulation and LED encapsulation device made thereby |
| EP2144289A2 (en) * | 2008-03-07 | 2010-01-13 | Intematix Technology Center Corp. | Fabrication structure for light emitting diode component |
| CN203588605U (en) * | 2013-10-23 | 2014-05-07 | 深圳市奥伦德科技有限公司 | LED (light-emitting diode) lattice module adopting secondary stamping and secondary cutting encapsulation |
| CN105470209A (en) * | 2014-08-29 | 2016-04-06 | 矽品精密工业股份有限公司 | Semiconductor package and fabrication method thereof |
-
2016
- 2016-05-26 CN CN201610357392.6A patent/CN105845674B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436557A (en) * | 2007-11-13 | 2009-05-20 | 香港科技大学 | Wafer level encapsulation method of LED array encapsulation and LED encapsulation device made thereby |
| EP2144289A2 (en) * | 2008-03-07 | 2010-01-13 | Intematix Technology Center Corp. | Fabrication structure for light emitting diode component |
| CN203588605U (en) * | 2013-10-23 | 2014-05-07 | 深圳市奥伦德科技有限公司 | LED (light-emitting diode) lattice module adopting secondary stamping and secondary cutting encapsulation |
| CN105470209A (en) * | 2014-08-29 | 2016-04-06 | 矽品精密工业股份有限公司 | Semiconductor package and fabrication method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109038209A (en) * | 2018-08-29 | 2018-12-18 | Oppo（重庆）智能科技有限公司 | Wafer-level packaging method, laser die group, CCD camera assembly and electronic device |
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| CN105845674B (en) | 2019-04-02 |
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