CN105845674B - The method of wafer scale LED array encapsulation - Google Patents
The method of wafer scale LED array encapsulation Download PDFInfo
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- CN105845674B CN105845674B CN201610357392.6A CN201610357392A CN105845674B CN 105845674 B CN105845674 B CN 105845674B CN 201610357392 A CN201610357392 A CN 201610357392A CN 105845674 B CN105845674 B CN 105845674B
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- led
- led chip
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- core section
- limiting slot
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
Abstract
The method of wafer scale LED array encapsulation, comprising the following steps: S1 provides LED prefabricated component, including wafer substrate, LED chip, several array elements are arranged in wafer substrate；Several arrays setting LED core section is arranged on array element, LED chip is inverted on LED core section by S2；Wafer substrate is cut into several array elements by S3；Array element is packaged by S4, and dispensing is carried out above the LED chip, forms package lens layer；LED chip on array element is cut into several LED chip packaging bodies by S5.Wafer substrate is arranged to several array elements by the present invention, after LED chip upside-down mounting, just cuts array element open to come, then is carried out dispensing and formed package lens layer.Therefore, after lens jacket completes, the heat of generation described in the local heating circuit of formation is less, and rapid heat dissipation, and radiate difficult problem in very good solution manufacturing process.
Description
Technical field
The present invention relates to the methods that wafer scale LED encapsulation technology field more particularly to wafer scale LED array encapsulate.
Background technique
LED light due to have the characteristics that small in size, power saving and the service life it is long be applied to more and more illumination, back
The fields such as light.However, hindering it further to promote due to LED light higher cost.Wafer scale LED encapsulation reduces cost
Effective ways.Wafer stage chip encapsulation technology be by full wafer wafer be packaged test after cut to obtain again individually at
The technology of product chip.Crystal wafer chip dimension encapsulation technology changes conventional package such as ceramic leadless chip carrier, organic nothing and draws
The mode of line chip carrier and digital-code camera module formula, complied with market it is increasingly light to microelectronic product, it is thin, short, small and at a low price
The requirement of change is the hot spot in current encapsulation field and the trend of future development.
But the packaging technology of traditional LED component is difficult to carry out high-density packages, is not also suitable for wafer-level packaging.Base
In this, frequently with being arranged several array LED chip slots in wafer substrate, then by LED chip upside-down mounting and plastic packaging glue shape is utilized
At lens jacket.But this method is in the production process, after forming local heating circuit, can generate a large amount of heat, heat dissipation is asked
Topic is difficult to solve, and easily influences service life, the working performance etc. of LED chip.
Summary of the invention
The purpose of the present invention is to overcome the shortcomings of the existing technology, provides a kind of method of wafer scale LED array encapsulation.
In order to solve the above technical problems, present invention employs following technical measures:
The method of wafer scale LED array encapsulation, comprising the following steps:
S1 provides LED prefabricated component, including wafer substrate, LED chip, several array elements is arranged in wafer substrate；
Several arrays setting LED core section is arranged on array element, LED chip is inverted in LED core section by S2
On；
Wafer substrate is cut into several array elements by S3；
Array element is packaged by S4, and dispensing is carried out above the LED chip, forms package lens layer；
LED chip on array element is cut into several LED chip packaging bodies by S5.
The present invention can also be further perfect by following technical measures:
As a further improvement, the surrounding of the LED core section forms limiting slot, and the depth of the limiting slot is along separate
Gradually deepen in the direction of the LED core section.
As a further improvement, including: by the step that LED chip is inverted on LED core section
S21, in the front setting conductive layer of wafer substrate, the conductive layer is equipped with the electricity for connecting with LED chip
Road, the position that the conductive layer corresponds to limiting slot offer through-hole；
S22, on the electrically conductive by LED chip upside-down mounting, be then sticked above LED chip protective film.
As a further improvement, the array element includes: the step of being packaged
S41, smears fluorescent powder in the LED chip, and the fluorescent powder is yellow fluorescent powder, green emitting phosphor or red
Fluorescent powder；
S42 carries out dispensing in the LED chip, so that the glue is covered the LED chip and extends to the limit
Slot, being then cooled to room temperature makes it be formed by curing package lens layer.
As a further improvement, each array element includes the LED core section of 16 arrays setting, the LED core
Section is arranged to 4 rows and multiplies 4 column.
As a further improvement, defining the depth capacity D of the limiting slot, the maximum width W of the limiting slot is defined, it is fixed
The justice LED chip with a thickness of d, wherein 0.1d≤D≤0.2d, 0.1D≤W≤0.3D.
As a further improvement, the protective film be UV film, the protective film with a thickness of 0.10mm~0.18mm.
As a further improvement, the LED core section be it is rectangular, the surrounding of the LED core section is surrounded with four strips
The limiting slot of shape, four limiting slots are successively end to end.
As a further improvement, the LED chip uses blue chip, the fluorescent powder uses yellow fluorescent powder, described
The weight ratio of phosphor powder layer and package lens layer on single led chip is 1:100~3:100.
As a further improvement, the limiting slot is arc surface or inclined plane close to the surface of the LED chip.
Compared with prior art, the invention has the following advantages that
1, wafer substrate is arranged to several array elements, after LED chip upside-down mounting, just cut array element open
Come, then carries out dispensing and form package lens layer.Therefore, it after lens jacket completes, is produced described in the local heating circuit of formation
Raw heat is less, and rapid heat dissipation, and radiate difficult problem in very good solution manufacturing process.
2, by setting limiting slot, can the shape to package lens layer directly controlled, formation height width ratio compared with
Big package lens layer, to improve light efficiency.And there is good position-limiting action, by single dispensing be obtained with it is high/
Wide ratio is greater than 0.5 package lens layer, without repeating dispensing.
Detailed description of the invention
Attached drawing 1 is the process flow chart of the method for wafer scale LED array encapsulation of the present invention；
Attached drawing 2 is a kind of schematic diagram of embodiment of limiting slot in the method for wafer scale LED array encapsulation of the present invention；
Attached drawing 3 is the schematic diagram of another embodiment of limiting slot in the method for wafer scale LED array encapsulation of the present invention；
Attached drawing 4 is the schematic diagram of another embodiment of limiting slot in the method for wafer scale LED array encapsulation of the present invention.
Specific embodiment
Present invention is further described in detail with specific embodiment with reference to the accompanying drawing.
Please refer to figs. 1 to 4, the method for wafer scale LED array encapsulation, comprising the following steps:
S1 provides LED prefabricated component, including wafer substrate 1, LED chip 40, several arrays is arranged in wafer substrate 1
Unit 10；
Several arrays setting LED core section 11 is arranged on array element 10, LED chip 40 is inverted in LED core by S2
On section 11；
Wafer substrate 1 is cut into several array elements 10 by S3；
Array element 10 is packaged by S4, and dispensing is carried out above the LED chip 40, forms package lens layer 30；
LED chip 40 on array element 10 is cut into several 40 packaging bodies of LED chip by S5.
Wafer substrate 1 is arranged to several array elements 10, after 40 upside-down mounting of LED chip, is just cut array element 10
It isolates, then carries out dispensing and form package lens layer 30.Therefore, after lens jacket 30 completes, the local heating of formation is returned
The heat of generation described in road is less, and rapid heat dissipation, and radiate difficult problem in very good solution manufacturing process.
In step 2, the surrounding of the LED core section 11 forms limiting slot 111, and the depth of the limiting slot 111 is along remote
Gradually deepen in direction from the LED core section 11.The practical structures of the limiting slot 111 can be set according to actual needs,
As long as deepening the depth of the limiting slot 111 gradually along the direction far from the LED chip 40.The limiting slot 111
It is arc surface or inclined plane close to the surface of the LED chip 40.In Fig. 2, the limiting slot 111 is close to the LED
The surface of chip 40 is the arc surface outwardly protruded.In Fig. 3, the limiting slot 111 is close to the surface of the LED chip 40
Inclined plane.In Fig. 4, the limiting slot 111 is the arc surface being recessed inwardly close to the surface of the LED chip 40.Institute
Stating limiting slot 111 can be formed by imprint process or etching technics.The LED core section 11 can be circle, rectangular, rectangle
Or other regular or irregular several box shaped.Preferably, the LED core section 11 is identical as the shape of the LED chip 40.
By be arranged limiting slot 111, can the shape to package lens layer 30 directly controlled, formation height width ratio
It is worth biggish package lens layer 30, to improve light efficiency.And there is good position-limiting action, can be obtained by single dispensing
The package lens layer 30 that height width ratio is greater than 0.5 is obtained, without repeating dispensing.
In the present embodiment, the shape of the LED chip 40 be it is rectangular, the LED core section 11 is rectangular, the LED core
The surrounding of section 11 is surrounded with the limiting slot 111 of four strips, and four limiting slots 111 are successively end to end.Using side
Shape LED core section 11, it is easy to process quick, compared to the region being arranged to LED chip 40 to lower recess, the processing of this structure
Want convenient and efficient many.Wider one side R1 of LED chip 40 is defined, relatively narrow one side R2 of LED chip 40 is defined.Definition and LED
The length L1 of the parallel limiting slot 111 in wider one side defines the length L2 of the limiting slot 111 parallel with the relatively narrow one side LED.Its
In,Define the limiting slot 111
Depth capacity D, define the maximum width W of the limiting slot 111, define the LED chip 40 with a thickness of d, wherein 0.1d
≤ D≤0.2d, 0.1D≤W≤0.3D.
In step 2, include: by the step that LED chip 40 is inverted on LED core section 11
S21, in the front setting conductive layer 20 of wafer substrate 1, the conductive layer 20 is equipped with for connecting with LED chip 40
The position of the circuit connect, the corresponding limiting slot 111 of the conductive layer 20 offers through-hole 21；Wherein, the through-hole 21 plays resigning
Effect, when dispensing, plastic packaging glue is flowed into limiting slot 111 by through-hole 21.There is each array element 10 independent part to add
Hot loop.
LED chip 40 is inverted on conductive layer 20 by S22, and be then sticked above LED chip 40 protective film.The guarantor
Cuticula be UV film, the protective film with a thickness of 0.10mm~0.18mm.
In step 3, wafer substrate 1 is cut into several array elements 10.Each array element 10 includes 16 battle arrays
The LED core section 11 of setting is arranged, the LED core section 11 is arranged to 4 rows and multiplies 4 column.
In step 4, the step of array element 10 is packaged, includes:
S41, smears fluorescent powder in the LED chip 40, and the fluorescent powder is yellow fluorescent powder, green emitting phosphor or red
Color fluorescent powder；Fluorescent powder is selected, the demands such as colour temperature, the color of illumination light is obtained as needed and is selected.In the present embodiment, institute
LED chip 40 is stated using blue chip, the fluorescent powder uses yellow fluorescent powder.It obtains on single led chip 40 described in colour temperature
Phosphor powder layer and package lens layer 30 weight ratio be 1:100~3:100.
S42 carries out dispensing in the LED chip 40, so that the glue is covered the LED chip 40 and extends to the limit
Position slot 111, being then cooled to room temperature makes it be formed by curing package lens layer 30.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent substitution, improvement and etc. done be should be included within the scope of the present invention.
Claims (10)
1. the method for wafer scale LED array encapsulation, comprising the following steps:
S1 provides LED prefabricated component, including wafer substrate, LED chip, several array elements is arranged in wafer substrate；
The LED core section of several arrays setting is arranged on array element, LED chip is inverted on LED core section by S2；
Wafer substrate is cut into several array elements by S3；
Array element is packaged by S4, and dispensing is carried out above the LED chip, forms package lens layer；
LED chip on array element is cut into several LED chip packaging bodies by S5.
2. the method for wafer scale LED array encapsulation according to claim 1, it is characterised in that: the four of the LED core section
Form limiting slot week, and the depth of the limiting slot is gradually deepened along the direction far from the LED core section.
3. the method for wafer scale LED array encapsulation according to claim 2, it is characterised in that: LED chip to be inverted in
Step on LED core section includes:
S21, in the front setting conductive layer of wafer substrate, the conductive layer is equipped with the circuit for connecting with LED chip, institute
It states conductive layer and corresponds to the position of limiting slot and offer through-hole；
S22, on the electrically conductive by LED chip upside-down mounting, be then sticked above LED chip protective film.
4. the method for wafer scale LED array encapsulation according to claim 2, it is characterised in that: the array element carries out
The step of encapsulation includes:
S41, smears fluorescent powder in the LED chip, and the fluorescent powder is yellow fluorescent powder, green emitting phosphor or red fluorescence
Powder；
S42 carries out dispensing in the LED chip, so that the glue is covered the LED chip and extends to the limiting slot, so
After be cooled to room temperature it made to be formed by curing package lens layer.
5. the method for wafer scale LED array according to claim 2 encapsulation, it is characterised in that: each array element includes
The LED core section of 16 arrays setting, the LED core section is arranged to 4 rows and multiplies 4 column.
6. the method for wafer scale LED array encapsulation according to claim 2, it is characterised in that: define the limiting slot
Depth capacity D defines the maximum width W of the limiting slot, define the LED chip with a thickness of d, wherein 0.1d≤D≤
0.2d, 0.1D≤W≤0.3D.
7. the method for wafer scale LED array encapsulation according to claim 3, it is characterised in that: the protective film is UV film,
The protective film with a thickness of 0.10mm~0.18mm.
8. the method for wafer scale LED array encapsulation according to claim 5, it is characterised in that: the LED core section is side
Shape, the surrounding of the LED core section are surrounded with the limiting slot of four strips, and four limiting slots are successively end to end.
9. the method for wafer scale LED array encapsulation according to claim 4, it is characterised in that: the LED chip is using blue
Optical chip, the fluorescent powder use yellow fluorescent powder, the weight of phosphor powder layer and package lens layer in the single LED chip
Than for 1:100~3:100.
10. the method for wafer scale LED array encapsulation according to claim 2, it is characterised in that: the limiting slot is close to institute
The surface for stating LED chip is arc surface or inclined plane.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610357392.6A CN105845674B (en) | 2016-05-26 | 2016-05-26 | The method of wafer scale LED array encapsulation |
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| CN201610357392.6A CN105845674B (en) | 2016-05-26 | 2016-05-26 | The method of wafer scale LED array encapsulation |
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| CN105845674A CN105845674A (en) | 2016-08-10 |
| CN105845674B true CN105845674B (en) | 2019-04-02 |
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| CN109038209B (en) * | 2018-08-29 | 2020-04-14 | Oppo（重庆）智能科技有限公司 | Wafer level packaging method, laser module, camera assembly and electronic device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436557A (en) * | 2007-11-13 | 2009-05-20 | 香港科技大学 | Wafer level encapsulation method of LED array encapsulation and LED encapsulation device made thereby |
| EP2144289A2 (en) * | 2008-03-07 | 2010-01-13 | Intematix Technology Center Corp. | Fabrication structure for light emitting diode component |
| CN203588605U (en) * | 2013-10-23 | 2014-05-07 | 深圳市奥伦德科技有限公司 | LED (light-emitting diode) lattice module adopting secondary stamping and secondary cutting encapsulation |
| CN105470209A (en) * | 2014-08-29 | 2016-04-06 | 矽品精密工业股份有限公司 | Semiconductor package and fabrication method thereof |
-
2016
- 2016-05-26 CN CN201610357392.6A patent/CN105845674B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436557A (en) * | 2007-11-13 | 2009-05-20 | 香港科技大学 | Wafer level encapsulation method of LED array encapsulation and LED encapsulation device made thereby |
| EP2144289A2 (en) * | 2008-03-07 | 2010-01-13 | Intematix Technology Center Corp. | Fabrication structure for light emitting diode component |
| CN203588605U (en) * | 2013-10-23 | 2014-05-07 | 深圳市奥伦德科技有限公司 | LED (light-emitting diode) lattice module adopting secondary stamping and secondary cutting encapsulation |
| CN105470209A (en) * | 2014-08-29 | 2016-04-06 | 矽品精密工业股份有限公司 | Semiconductor package and fabrication method thereof |
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