CN105827122A - Three-level power module with electrode connection points arranged in column - Google Patents
Three-level power module with electrode connection points arranged in column Download PDFInfo
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- CN105827122A CN105827122A CN201610284605.7A CN201610284605A CN105827122A CN 105827122 A CN105827122 A CN 105827122A CN 201610284605 A CN201610284605 A CN 201610284605A CN 105827122 A CN105827122 A CN 105827122A
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- junction point
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- insulated substrate
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
Abstract
The invention discloses a three-level power module with electrode connection points arranged in a column. The three-level power module includes a plurality of insulating substrates arranged in a row, half of the insulating substrates are lower half-bridge insulating substrates, and the other half of the insulating substrates are upper half-bridge insulating substrate; and a negative electrode connection point and an intermediate electrode connection point are arranged on each lower half-bridge insulating substrate which are arranged in a column, and a positive electrode connection point and an intermediate electrode connection point are arranged on each upper half-bridge insulating substrate which are arranged in a column. Through optimization of the layout of chip positions on the insulating substrates, the positive electrode connection points and the intermediate electrode connection points are arranged in columns, and the negative electrode connection points and the intermediate electrode connection points are also arranged in column, and upper half-bridge units, upper half-bridge follow current units, lower half-bridge units and lower half-bridge follow current units adopt a partition connection and gate pole leading-out mode, thereby reducing parasitic parameters and module loss, effectively shortening the length of power switch chip gate pole leads, and improving the work reliability.
Description
Technical field
The present invention relates to field of power electronics, particularly relate to three electrical level power module that a kind of electrode connection points is arranged in column.
Background technology
Power model is the power switch module that power electronic devices such as metal-oxide semiconductor (MOS) (power MOS pipe), insulated-gate type field effect transistor (IGBT), fast recovery diode (FRD) are packaged into by certain function combinations, and it is mainly used in power conversion under the various occasions such as electric automobile, photovoltaic generation, wind-power electricity generation, industry frequency conversion.
The positive and negative electrode parasitic parameter of power model of the prior art is the biggest, module loss is bigger.
Summary of the invention
Goal of the invention: it is an object of the invention to provide that a kind of parasitic parameter is little, module is lost three electrical level power module that little and that gate lead is shorter electrode connection points is arranged in column.
Technical scheme: for reaching this purpose, the present invention by the following technical solutions:
Three electrical level power module that electrode connection points of the present invention is arranged in column, including the multiple insulated substrates being in line, wherein the insulated substrate of half quantity is lower half-bridge insulated substrate, and the insulated substrate of second half quantity is upper half-bridge insulated substrate；Lower half-bridge insulated substrate is provided with negative electrode junction point and target junction point, negative electrode junction point is arranged in column with target junction point, upper half-bridge insulated substrate is provided with anelectrode junction point and target junction point, and anelectrode junction point is arranged in column with target junction point.
Further, lower half-bridge cells and lower half-bridge afterflow unit it is additionally provided with on described lower half-bridge insulated substrate, the emitter stage of lower half-bridge cells or source electrode connect negative electrode junction point, during the conducting of lower half-bridge cells, electric current is circulated by lower half-bridge cells, when lower half-bridge cells turns off, electric current is circulated by lower half-bridge afterflow unit；Half-bridge cells and upper half-bridge afterflow unit it is additionally provided with on upper half-bridge insulated substrate, colelctor electrode or the drain electrode of upper half-bridge cells connect anelectrode junction point, during the conducting of upper half-bridge cells, electric current is circulated by upper half-bridge cells, when upper half-bridge cells turns off, electric current is circulated by upper half-bridge afterflow unit.
Further, described lower half-bridge cells includes IGBT pipe Q1 and diode D1, diode D1 is connected in reverse parallel in IGBT pipe Q1 two ends, and the emitter stage of IGBT pipe Q1 connects the negative electrode junction point on lower half-bridge insulated substrate, and the colelctor electrode of IGBT pipe Q1 connects the output electrode junction point on lower half-bridge insulated substrate；Lower half-bridge afterflow unit includes IGBT pipe Q2, diode D2 and diode D3, the colelctor electrode of IGBT pipe Q2 connects the colelctor electrode of IGBT pipe Q1, diode D2 is connected in reverse parallel in IGBT pipe Q2 two ends, the emitter stage of IGBT pipe Q2 connects the positive pole of diode D3, and the negative pole of diode D3 connects the target junction point on lower half-bridge insulated substrate.
Further, described lower half-bridge cells includes power MOS pipe Q11 and diode D11, diode D11 is connected in reverse parallel in power MOS pipe Q11 two ends, the source electrode of power MOS pipe Q11 connects the negative electrode junction point on lower half-bridge insulated substrate, and the drain electrode of power MOS pipe Q11 connects the output electrode junction point on lower half-bridge insulated substrate；Lower half-bridge afterflow unit includes power MOS pipe Q21, diode D21 and diode D31, the drain electrode of power MOS pipe Q21 connects the drain electrode of power MOS pipe Q11, diode D21 is connected in reverse parallel in power MOS pipe Q21 two ends, the source electrode of power MOS pipe Q21 connects the positive pole of diode D31, and the negative pole of diode D31 connects the target junction point on lower half-bridge insulated substrate.
Further, described upper half-bridge cells includes IGBT pipe Q3 and diode D4, diode D4 is connected in reverse parallel in IGBT pipe Q3 two ends, and the colelctor electrode of IGBT pipe Q3 connects the anelectrode junction point on upper half-bridge insulated substrate, and the emitter stage of IGBT pipe Q3 connects the output electrode junction point on upper half-bridge insulated substrate；Upper half-bridge afterflow unit includes IGBT pipe Q4, diode D5 and diode D6, the emitter stage of IGBT pipe Q4 connects the emitter stage of IGBT pipe Q3, diode D5 is connected in reverse parallel in IGBT pipe Q4 two ends, the colelctor electrode of IGBT pipe Q4 connects the negative pole of diode D6, and the positive pole of diode D6 connects the target junction point on upper half-bridge insulated substrate.
Further, described upper half-bridge cells includes power MOS pipe Q31 and diode D41, diode D41 is connected in reverse parallel in power MOS pipe Q31 two ends, the drain electrode of power MOS pipe Q31 connects the anelectrode junction point on upper half-bridge insulated substrate, and the source electrode of power MOS pipe Q31 connects the output electrode junction point on upper half-bridge insulated substrate；Upper half-bridge afterflow unit includes power MOS pipe Q41, diode D51 and diode D61, the source electrode of power MOS pipe Q41 connects the source electrode of power MOS pipe Q31, diode D51 is connected in reverse parallel in power MOS pipe Q41 two ends, the drain electrode of power MOS pipe Q41 connects the negative pole of diode D61, and the positive pole of diode D61 connects the target junction point on upper half-bridge insulated substrate.
Further, one piece of lower half-bridge gate pole insulated substrate of all lower half-bridge units shareds, for connecting the gate pole of all lower half-bridge cells；The lower half-bridge afterflow gate insulation substrate of all lower half-bridge afterflow units shareds one piece, for connecting the gate pole of all lower half-bridge afterflow unit.
Further, on described each lower half-bridge insulated substrate, distance between target junction point and lower half-bridge afterflow gate insulation substrate is less than the distance between negative electrode junction point and lower half-bridge afterflow gate insulation substrate, and the distance between negative electrode junction point and lower half-bridge gate pole insulated substrate is less than the distance between target junction point and lower half-bridge gate pole insulated substrate.
Further, all upper half-bridge units shareds one piece upper half-bridge gate pole insulated substrate, for connecting the gate pole of all upper half-bridge cells；The upper half-bridge afterflow gate insulation substrate of all upper half-bridge afterflow units shareds one piece, for connecting the gate pole of all upper half-bridge afterflow unit.
Further, on described each upper half-bridge insulated substrate, distance between target junction point and upper half-bridge afterflow gate insulation substrate is less than the distance between anelectrode junction point and upper half-bridge afterflow gate insulation substrate, and the distance between anelectrode junction point and upper half-bridge gate pole insulated substrate is less than the distance between target junction point and upper half-bridge gate pole insulated substrate.
Beneficial effect: the present invention is by optimizing chip position layout on insulated substrate, anelectrode junction point is arranged with target junction point the most in column with target junction point, negative electrode junction point, upper half-bridge cells, upper half-bridge afterflow unit, lower half-bridge cells, lower half-bridge afterflow unit use piecewise connection and gate pole lead-out mode, reduce parasitic parameter and module loss, it is effectively shortened the length of power switch chip gate lead, i.e. reduce the area in gate pole loop, improve the reliability of work.
Accompanying drawing explanation
Fig. 1 is the axonometric chart of three electrical level power module of the present invention；
Fig. 2 is the top view of three electrical level power module of the present invention；
Fig. 3 is the partial circuit diagram that the present invention uses in three electrical level power module of IGBT pipe；
Fig. 4 is the partial circuit diagram that the present invention uses in three electrical level power module of power MOS pipe.
Detailed description of the invention
Below in conjunction with the accompanying drawings, technical scheme is further elaborated.
The invention discloses three electrical level power module that a kind of electrode connection points is arranged in column, as shown in Figure 1, including six insulated substrates being in line, wherein three, left side insulated substrate is lower half-bridge insulated substrate, it is respectively 1, second time half-bridge insulated substrate 2 of first time half-bridge insulated substrate and the 3rd time half-bridge insulated substrate 3, three insulated substrates in the right are upper half-bridge insulated substrate, half-bridge insulated substrate 6 on half-bridge insulated substrate 5 and the 3rd on half-bridge insulated substrate 4, second on respectively first.
As shown in Figure 2, first time half-bridge insulated substrate 1, second time half-bridge insulated substrate 2, 3rd time half-bridge insulated substrate 3, half-bridge insulated substrate 4 on first, the the first negative electrode junction point 15 arranged in column and first time half-bridge target junction point 16 it is respectively equipped with on half-bridge insulated substrate 5 and the 3rd in the right half area of half-bridge insulated substrate 6 on second, second negative electrode junction point 25 and second time half-bridge target junction point 26, 3rd negative electrode junction point 35 and the 3rd time half-bridge target junction point 36, half-bridge target junction point 46 on first anelectrode junction point 45 and first, half-bridge target junction point 56 on second anelectrode junction point 55 and second, and the 3rd half-bridge target junction point 66 on anelectrode junction point 65 and the 3rd.
Lower half-bridge insulated substrate is provided with lower half-bridge cells and lower half-bridge afterflow unit, introduced as a example by first time half-bridge insulated substrate 1 below: first time half-bridge insulated substrate 1 is provided with first time half-bridge cells 17 and first time half-bridge afterflow unit 18, the emitter stage of first time half-bridge cells 17 or source electrode connect the first negative electrode junction point 15, when first time half-bridge cells 17 turns on, electric current is circulated by first time half-bridge cells 17, when first time half-bridge cells 17 turns off, electric current is circulated by first time half-bridge afterflow unit 18.One piece of lower half-bridge gate pole insulated substrate 213 of all lower half-bridge units shareds, for connecting the gate pole of all lower half-bridge cells；The lower half-bridge afterflow gate insulation substrate 321 of all lower half-bridge afterflow units shareds one piece, for connecting the gate pole of all lower half-bridge afterflow unit.On each lower half-bridge insulated substrate, distance between target junction point and lower half-bridge afterflow gate insulation substrate 321 is less than the distance between negative electrode junction point and lower half-bridge afterflow gate insulation substrate 321, and the distance between negative electrode junction point and lower half-bridge gate pole insulated substrate 213 is less than the distance between half-bridge gate pole insulated substrate 213 under target junction point.
Upper half-bridge insulated substrate is provided with half-bridge cells and upper half-bridge afterflow unit, introduced as a example by half-bridge insulated substrate 4 on first below: on first, half-bridge insulated substrate 4 is provided with on first half-bridge afterflow unit 48 on half-bridge cells 47 and first, on first, emitter stage or the source electrode of half-bridge cells 47 connect the first anelectrode junction point 45, when on first, half-bridge cells 47 turns on, electric current passes through half-bridge cells 47 on first and circulates, when on first, half-bridge cells 47 turns off, electric current passes through half-bridge afterflow unit 48 on first and circulates.All upper half-bridge units shareds one piece upper half-bridge gate pole insulated substrate 546, for connecting the gate pole of all upper half-bridge cells；The upper half-bridge afterflow gate insulation substrate 654 of all upper half-bridge afterflow units shareds one piece, for connecting the gate pole of all upper half-bridge afterflow unit.On each upper half-bridge insulated substrate, distance between target junction point and upper half-bridge afterflow gate insulation substrate 654 is less than the distance between anelectrode junction point and upper half-bridge afterflow gate insulation substrate 654, and on anelectrode junction point, the distance between half-bridge gate pole insulated substrate 546 is less than the distance between target junction point and upper half-bridge gate pole insulated substrate 546.
In addition, second time half-bridge insulated substrate 2 is arranged over the first parallel large arm and the second large arm, draws the first forearm on the left of the first large arm, and the first forearm connects the first negative electrode junction point 15, drawing the second forearm on the left of second large arm, the second forearm connects first time half-bridge target junction point 16；3rd time half-bridge insulated substrate 3 is arranged over parallel the third-largest arm and the fourth-largest arm, the 3rd forearm is respectively drawn on the left of the third-largest arm and right side, 3rd forearm in left side connects the second negative electrode junction point 25,3rd forearm on right side connects the 3rd negative electrode junction point 35, the 4th forearm is respectively drawn on the left of the fourth-largest arm and right side, 4th forearm in left side connects second time half-bridge target junction point 26, and the 4th forearm on right side connects the 3rd time half-bridge target junction point 36.Wherein, first large arm and the third-largest arm are referred to as negative electrode large arm, first forearm and the 3rd forearm are referred to as negative electrode forearm, and the second large arm and the fourth-largest arm are referred to as lower half-bridge target large arm, and the second forearm and the 4th forearm are referred to as lower half-bridge target forearm.On second, half-bridge insulated substrate 5 is arranged over parallel the fifth-largest arm and the sixth-largest arm, the 5th forearm is respectively drawn on the left of the fifth-largest arm and right side, 5th forearm in left side connects the first anelectrode junction point 45,5th forearm on right side connects the second anelectrode junction point 55, the 6th forearm is respectively drawn on the left of the sixth-largest arm and right side, 6th forearm in left side connects half-bridge target junction point 46 on first, and the 6th forearm on right side connects half-bridge target junction point 56 on second；On 3rd, half-bridge insulated substrate 6 is arranged over parallel the seventh-largest arm and the eighth-largest arm, the 7th forearm is drawn on the right side of the seventh-largest arm, 7th forearm connects the 3rd anelectrode junction point 65, draws the 8th forearm on the right side of the eighth-largest arm, and the 8th forearm connects half-bridge target junction point 66 on the 3rd.Wherein, the fifth-largest arm and the seventh-largest arm are referred to as anelectrode large arm, 5th forearm and the 7th forearm are referred to as anelectrode forearm, the sixth-largest arm and the eighth-largest arm and are referred to as half-bridge target large arm, and the 6th forearm and the 8th forearm are referred to as half-bridge target forearm.
The upper right side of the 3rd time half-bridge insulated substrate 3 is provided with negative electrode lead division 7, negative electrode lead division 7 bending to the left also connects the first large arm and the third-largest arm by negative electrode main part 71, being provided with lower half-bridge target lead division 8 on the right side of negative electrode lead division 7, the bending to the right of lower half-bridge target lead division 8 also connects the second large arm and the fourth-largest arm by lower half-bridge target main part 81.On first, the upper right side of half-bridge insulated substrate 4 is provided with anelectrode lead division 9, anelectrode lead division 9 bending to the left also each extends over out the first anelectrode main part 91 and the second anelectrode main part 92 to left and right, first anelectrode main part 91 connects the fifth-largest arm, and the second anelectrode main part 92 connects the seventh-largest arm.Half-bridge target lead division 10 it is provided with on the right side of anelectrode lead division 9, the bending to the right of upper half-bridge target lead division 10 also each extends over out on first half-bridge target main part 83 on half-bridge target main part 82 and second to left and right, on first, half-bridge target main part 82 connects the sixth-largest arm, and on second, half-bridge target main part 83 connects the eighth-largest arm.As can be seen here, all electrode body portions constitute the shape of " a few word ", as shown in Figure 1.
When the present invention uses IGBT pipe, on first time half-bridge insulated substrate 1 and first as a example by half-bridge insulated substrate 4, partial circuit is as shown in Figure 3.First time half-bridge cells 17 includes IGBT pipe Q1 and diode D1, diode D1 is connected in reverse parallel in IGBT pipe Q1 two ends, the emitter stage of IGBT pipe Q1 connects the first negative electrode junction point 15 of 1 on first time half-bridge insulated substrate, and the colelctor electrode of IGBT pipe Q1 connects the output electrode junction point on first time half-bridge insulated substrate 1；First time half-bridge afterflow unit 18 includes IGBT pipe Q2, diode D2 and diode D3, the colelctor electrode of IGBT pipe Q2 connects the colelctor electrode of IGBT pipe Q1, diode D2 is connected in reverse parallel in IGBT pipe Q2 two ends, the emitter stage of IGBT pipe Q2 connects the positive pole of diode D3, and the negative pole of diode D3 connects first time half-bridge target junction point 16 on first time half-bridge insulated substrate 1.On first, half-bridge cells 47 includes IGBT pipe Q3 and diode D4, diode D4 is connected in reverse parallel in IGBT pipe Q3 two ends, the colelctor electrode of IGBT pipe Q3 connects the first anelectrode junction point 45 on first on half-bridge insulated substrate 4, and the emitter stage of IGBT pipe Q3 connects the output electrode junction point on first on half-bridge insulated substrate 4；On first, half-bridge afterflow unit 48 includes IGBT pipe Q4, diode D5 and diode D6, the emitter stage of IGBT pipe Q4 connects the emitter stage of IGBT pipe Q3, diode D5 is connected in reverse parallel in IGBT pipe Q4 two ends, the colelctor electrode of IGBT pipe Q4 connects the negative pole of diode D6, and the positive pole of diode D6 connects on first half-bridge target junction point 46 on first on half-bridge insulated substrate 4.
When the present invention uses power MOS pipe, on first time half-bridge insulated substrate 1 and first as a example by half-bridge insulated substrate 4, partial circuit is as shown in Figure 4.First time half-bridge cells 17 includes power MOS pipe Q11 and diode D11, diode D11 is connected in reverse parallel in power MOS pipe Q11 two ends, the source electrode of power MOS pipe Q11 connects the first negative electrode junction point 15 on first time half-bridge insulated substrate 1, and the drain electrode of power MOS pipe Q11 connects the output electrode junction point on first time half-bridge insulated substrate 1；First time half-bridge afterflow unit 18 includes power MOS pipe Q21, diode D21 and diode D31, the drain electrode of power MOS pipe Q21 connects the drain electrode of power MOS pipe Q11, diode D21 is connected in reverse parallel in power MOS pipe Q21 two ends, the source electrode of power MOS pipe Q21 connects the positive pole of diode D31, and the negative pole of diode D31 connects first time half-bridge target junction point 16 on first time half-bridge insulated substrate 1.On first, half-bridge cells 47 includes power MOS pipe Q31 and diode D41, diode D41 is connected in reverse parallel in power MOS pipe Q31 two ends, the first anelectrode junction point 45 that the drain electrode of power MOS pipe Q31 connects on first on half-bridge insulated substrate 4, the source electrode of power MOS pipe Q31 connects the output electrode junction point on first on half-bridge insulated substrate 4；On first, half-bridge afterflow unit 48 includes power MOS pipe Q41, diode D51 and diode D61, the source electrode of power MOS pipe Q41 connects the source electrode of power MOS pipe Q31, diode D51 is connected in reverse parallel in power MOS pipe Q41 two ends, the drain electrode of power MOS pipe Q41 connects the negative pole of diode D61, and the positive pole of diode D61 connects on first half-bridge target junction point 46 on first on half-bridge insulated substrate 4.
Claims (10)
1. three electrical level power module that an electrode connection points is arranged in column, it is characterised in that: including the multiple insulated substrates being in line, wherein the insulated substrate of half quantity is lower half-bridge insulated substrate, and the insulated substrate of second half quantity is upper half-bridge insulated substrate；Lower half-bridge insulated substrate is provided with negative electrode junction point and target junction point, negative electrode junction point is arranged in column with target junction point, upper half-bridge insulated substrate is provided with anelectrode junction point and target junction point, and anelectrode junction point is arranged in column with target junction point.
Three electrical level power module that electrode connection points the most according to claim 1 is arranged in column, it is characterized in that: on described lower half-bridge insulated substrate, be additionally provided with lower half-bridge cells and lower half-bridge afterflow unit, the emitter stage of lower half-bridge cells or source electrode connect negative electrode junction point, during the conducting of lower half-bridge cells, electric current is circulated by lower half-bridge cells, when lower half-bridge cells turns off, electric current is circulated by lower half-bridge afterflow unit；Half-bridge cells and upper half-bridge afterflow unit it is additionally provided with on upper half-bridge insulated substrate, colelctor electrode or the drain electrode of upper half-bridge cells connect anelectrode junction point, during the conducting of upper half-bridge cells, electric current is circulated by upper half-bridge cells, when upper half-bridge cells turns off, electric current is circulated by upper half-bridge afterflow unit.
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterized in that: described lower half-bridge cells includes IGBT pipe Q1 and diode D1, diode D1 is connected in reverse parallel in IGBT pipe Q1 two ends, the emitter stage of IGBT pipe Q1 connects the negative electrode junction point on lower half-bridge insulated substrate, and the colelctor electrode of IGBT pipe Q1 connects the output electrode junction point on lower half-bridge insulated substrate；Lower half-bridge afterflow unit includes IGBT pipe Q2, diode D2 and diode D3, the colelctor electrode of IGBT pipe Q2 connects the colelctor electrode of IGBT pipe Q1, diode D2 is connected in reverse parallel in IGBT pipe Q2 two ends, the emitter stage of IGBT pipe Q2 connects the positive pole of diode D3, and the negative pole of diode D3 connects the target junction point on lower half-bridge insulated substrate.
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterized in that: described lower half-bridge cells includes power MOS pipe Q11 and diode D11, diode D11 is connected in reverse parallel in power MOS pipe Q11 two ends, the source electrode of power MOS pipe Q11 connects the negative electrode junction point on lower half-bridge insulated substrate, and the drain electrode of power MOS pipe Q11 connects the output electrode junction point on lower half-bridge insulated substrate；Lower half-bridge afterflow unit includes power MOS pipe Q21, diode D21 and diode D31, the drain electrode of power MOS pipe Q21 connects the drain electrode of power MOS pipe Q11, diode D21 is connected in reverse parallel in power MOS pipe Q21 two ends, the source electrode of power MOS pipe Q21 connects the positive pole of diode D31, and the negative pole of diode D31 connects the target junction point on lower half-bridge insulated substrate.
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterized in that: described upper half-bridge cells includes IGBT pipe Q3 and diode D4, diode D4 is connected in reverse parallel in IGBT pipe Q3 two ends, the colelctor electrode of IGBT pipe Q3 connects the anelectrode junction point on upper half-bridge insulated substrate, and the emitter stage of IGBT pipe Q3 connects the output electrode junction point on upper half-bridge insulated substrate；Upper half-bridge afterflow unit includes IGBT pipe Q4, diode D5 and diode D6, the emitter stage of IGBT pipe Q4 connects the emitter stage of IGBT pipe Q3, diode D5 is connected in reverse parallel in IGBT pipe Q4 two ends, the colelctor electrode of IGBT pipe Q4 connects the negative pole of diode D6, and the positive pole of diode D6 connects the target junction point on upper half-bridge insulated substrate.
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterized in that: described upper half-bridge cells includes power MOS pipe Q31 and diode D41, diode D41 is connected in reverse parallel in power MOS pipe Q31 two ends, the drain electrode of power MOS pipe Q31 connects the anelectrode junction point on upper half-bridge insulated substrate, and the source electrode of power MOS pipe Q31 connects the output electrode junction point on upper half-bridge insulated substrate；Upper half-bridge afterflow unit includes power MOS pipe Q41, diode D51 and diode D61, the source electrode of power MOS pipe Q41 connects the source electrode of power MOS pipe Q31, diode D51 is connected in reverse parallel in power MOS pipe Q41 two ends, the drain electrode of power MOS pipe Q41 connects the negative pole of diode D61, and the positive pole of diode D61 connects the target junction point on upper half-bridge insulated substrate.
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterised in that: lower half-bridge gate pole insulated substrate (213) of all lower half-bridge units shareds one piece, for connecting the gate pole of all lower half-bridge cells；One piece of lower half-bridge afterflow gate insulation substrate (321) of all lower half-bridge afterflow units shareds, for connecting the gate pole of all lower half-bridge afterflow unit.
Three electrical level power module that electrode connection points the most according to claim 7 is arranged in column, it is characterized in that: on described each lower half-bridge insulated substrate, distance between target junction point and lower half-bridge afterflow gate insulation substrate (321) is less than the distance between negative electrode junction point and lower half-bridge afterflow gate insulation substrate (321), and the distance between negative electrode junction point and lower half-bridge gate pole insulated substrate (213) is less than the distance between target junction point and lower half-bridge gate pole insulated substrate (213).
Three electrical level power module that electrode connection points the most according to claim 2 is arranged in column, it is characterised in that: upper half-bridge gate pole insulated substrate (546) of all upper half-bridge units shareds one piece, for connecting the gate pole of all upper half-bridge cells；Upper half-bridge afterflow gate insulation substrate (654) of all upper half-bridge afterflow units shareds one piece, for connecting the gate pole of all upper half-bridge afterflow unit.
Three electrical level power module that electrode connection points the most according to claim 9 is arranged in column, it is characterized in that: on described each upper half-bridge insulated substrate, distance between target junction point and upper half-bridge afterflow gate insulation substrate (654) is less than the distance between anelectrode junction point and upper half-bridge afterflow gate insulation substrate (654), and the distance between anelectrode junction point and upper half-bridge gate pole insulated substrate (546) is less than the distance between target junction point and upper half-bridge gate pole insulated substrate (546).
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| CN104838576A (en) * | 2013-02-06 | 2015-08-12 | 富士电机株式会社 | Semiconductor device |
| CN103516242A (en) * | 2013-09-22 | 2014-01-15 | 中国船舶重工集团公司第七一〇研究所 | Three-level three-phase half-bridge inverter circuit |
| CN205725481U (en) * | 2016-05-03 | 2016-11-23 | 扬州国扬电子有限公司 | Three electrical level power module that a kind of electrode connection points is arranged in column |
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