CN105826431A - Preparation method for N-type efficient monocrystal two-sided battery - Google Patents
Preparation method for N-type efficient monocrystal two-sided battery Download PDFInfo
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- CN105826431A CN105826431A CN201610322551.9A CN201610322551A CN105826431A CN 105826431 A CN105826431 A CN 105826431A CN 201610322551 A CN201610322551 A CN 201610322551A CN 105826431 A CN105826431 A CN 105826431A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 42
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 68
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 67
- 239000010703 silicon Substances 0.000 claims abstract description 67
- 238000009792 diffusion process Methods 0.000 claims abstract description 47
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 39
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910052796 boron Inorganic materials 0.000 claims abstract description 20
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 19
- 239000011574 phosphorus Substances 0.000 claims abstract description 19
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 32
- 230000000873 masking effect Effects 0.000 claims description 28
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 21
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 16
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 16
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 8
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 6
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 5
- 229910021529 ammonia Inorganic materials 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 3
- 238000010926 purge Methods 0.000 claims description 3
- 238000007650 screen-printing Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 8
- 238000006243 chemical reaction Methods 0.000 abstract description 6
- 239000000377 silicon dioxide Substances 0.000 abstract 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 238000004804 winding Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 25
- 230000003749 cleanliness Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 208000020442 loss of weight Diseases 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 150000003017 phosphorus Chemical class 0.000 description 2
- 239000003513 alkali Substances 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000003442 weekly effect Effects 0.000 description 1
- 210000002268 wool Anatomy 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
- H01L31/1812—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table including only AIVBIV alloys, e.g. SiGe
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
The application discloses a preparation method for an N-type efficient monocrystal two-sided battery. The method comprises the steps that boron diffusion is carried out to the front face of a silicon wafer on which a suede face is formed; etching is implemented to the back face of the silicon wafer; a silicon dioxide mask film is manufactured on the front face of the silica wafer by N2O and SiH4; and phosphorus diffusion is carried out to the back face of the silica wafer. The method is characterized in that the boron diffusion is carried out to the front face of the silicon wafer on which a suede face is formed, then the etching is implemented to the back face of the silicon wafer, then the silicon dioxide mask film is manufactured on the front face of the silica wafer by the N2O and the SiH4, and finally the phosphorus diffusion is carried out to the back face of the silica wafer, so that diffusion winding influences brought by the phosphorus diffusion on the back face to the boron diffusion on the front face can be effectively avoided. In this way, cleanness can be guaranteed during dual-sided diffusion; and photovoltaic conversion efficiency of the battery can be increased.
Description
Technical field
The invention belongs to photovoltaic apparatus technical field, particularly relate to the preparation method of a kind of N-type efficient monocrystalline double-side cell.
Background technology
In current photovoltaic market, conventional is p-type polycrystalline cell piece, and the photovoltaic conversion efficiency of this p-type polycrystalline cell piece is the highest.Progress along with technology, the production cost of N-type silicon chip is also further reducing, efficiency additionally, due to monocrystal material is higher than polycrystalline material, therefore N-type battery slice have also been obtained increasing utilization, and, owing to having been developed that the Boron diffusion method of N-type silicon chip, therefore N-type double-side cell arises at the historic moment.
The method of the Double side diffusion of a kind of N-type double-side cell of the prior art, is to go out silicon nitride and silicon oxide as mask by CVD deposition, as the barrier layer to this face when another side is diffused.Concrete, during PECVD, the first redeposited one layer of silicon oxide film of one layer of silicon nitride film of deposition, by this two membranes as mask blocks layer, it is to avoid impact when phosphorus expands below.
But, owing to the cleanliness factor during CVD deposition can be far short of what is expected, after cvd nitride silicon thin film and silicon oxide film, with a lot of impurity for the cleanliness factor of diffusion furnace, do diffusion again with regard to very possible contamination boiler tube, so that the effect of Double side diffusion bad, simultaneously as silicon nitride film advances through diffusion high temperature again, in cleaning process below, being difficult to clean up, the Double side diffusion the most finally made is unholiness, causes last overall battery efficiency the highest.
Summary of the invention
For solving the problems referred to above, the invention provides the preparation method of a kind of N-type efficient monocrystalline double-side cell, can be prevented effectively from the back side the diffusion of phosphorus diffusion couple front boron around expanding impact, it is possible to ensure the cleanliness factor during Double side diffusion, improve the photovoltaic conversion efficiency of battery.
The preparation method of a kind of N-type efficient monocrystalline double-side cell that the present invention provides, including:
The front of the silicon chip after forming matte is carried out boron diffusion；
The back side of described silicon chip is performed etching；
Utilize N2O and SiH4Silicon oxide masking film is made in the front of described silicon chip；
The back side of described silicon chip is carried out phosphorus diffusion.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, described utilize N2O and SiH4Making silicon oxide masking film in the described front of described silicon chip is:
In PECVD boiler tube, by described N2O and SiH4Mix according to the ratio of 300:4500, make the silicon oxide masking film that thickness range is 70 nanometers to 90 nanometers in the front of described silicon chip.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, N is utilized described2O and SiH4Before the front of described silicon chip makes silicon oxide masking film, also include:
Ammonia is utilized to purge described PECVD boiler tube and bombard the surface of described silicon chip.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, after the described back side to described silicon chip carries out phosphorus diffusion, also include:
Remove PSG, BSG and described silicon oxide masking film.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, described PSG, BSG and the described silicon oxide masking film of removing is:
The hydrofluoric acid solution utilizing mass fraction to be 5% to 20% soaks described silicon chip 5 to 10 minutes, removes described PSG, BSG and described silicon oxide masking film.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, after described removing PSG, BSG and described silicon oxide masking film, also include:
Making thickness in the front of described silicon chip is that 4 nanometers are annealed to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, making thickness in the front of described silicon chip is that 4 nanometers, also include after annealing to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C:
Make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and make the silicon nitride that thickness is 65 nanometers to 85 nanometers at the back side of described silicon chip.
Preferably, in the preparation method of above-mentioned N-type efficient monocrystalline double-side cell, make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and after the back side of described silicon chip makes the silicon nitride that thickness is 65 nanometers to 85 nanometers, also include:
Described silicon chip is carried out two-sided silk screen printing.
By foregoing description, the preparation method of the above-mentioned N-type efficient monocrystalline double-side cell that the present invention provides, owing to first the front of the silicon chip after forming matte being carried out boron diffusion, then the back side of described silicon chip is performed etching, then utilize N2O and SiH4Silicon oxide masking film is made in the front of described silicon chip, finally the back side of described silicon chip is carried out phosphorus diffusion, what this phosphorus diffusion couple front boron that can be prevented effectively from the back side spread affects around expansion, therefore, it is possible to ensure the cleanliness factor during Double side diffusion, improves the photovoltaic conversion efficiency of battery.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, the accompanying drawing used required in embodiment or description of the prior art will be briefly described below, apparently, accompanying drawing in describing below is only embodiments of the invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to the accompanying drawing provided.
The flow chart of the preparation method of the first N-type efficient monocrystalline double-side cell that Fig. 1 provides for the embodiment of the present application.
Detailed description of the invention
In the preparation process of double-side cell, front needs to carry out boron diffusion, the back side needs to carry out phosphorus diffusion, without good mask as barrier layer, stop that another kind of diffusion brings around expanding impact, so four weekly assemblies of another side are destroyed largely, can not get well tying, finally affect cell piece efficiency, therefore, the core concept of the present invention is to provide the preparation method of a kind of N-type efficient monocrystalline double-side cell, can be prevented effectively from the back side the diffusion of phosphorus diffusion couple front boron around expanding impact, ensure that the cleanliness factor during Double side diffusion, improve the photovoltaic conversion efficiency of battery.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, broadly fall into the scope of protection of the invention.
The preparation method of the first N-type efficient monocrystalline double-side cell that the embodiment of the present application provides is as it is shown in figure 1, the flow chart of the preparation method of the first N-type efficient monocrystalline double-side cell that provides for the embodiment of the present application of Fig. 1.The method comprises the steps:
S1: the front of the silicon chip after forming matte is carried out boron diffusion；
Before this step, first the front to silicon chip carries out alkali making herbs into wool, forms matte, reaches antireflecting effect, and in this step, in back-to-back fashion can be used to carry out boron diffusion process, finally obtain the BSG of 70 nanometers to 85 nanometers, and sheet resistance is 65 Ω to 85 Ω.
S2: the back side of described silicon chip is performed etching；
In this step, being to perform etching the one side not having diffusion, make loss of weight amount within the scope of 0.03-0.05g, a preferred loss of weight amount is 0.04g.
S3: utilize N2O and SiH4Silicon oxide masking film is made in the front of described silicon chip；
In this step, N is utilized2O and SiH4Can obtain evenly, purer and be easy to the silicon oxide masking film cleaned.
S4: the back side of described silicon chip is carried out phosphorus diffusion.
In this step, in back-to-back fashion can be used to carry out phosphorus diffusion, concrete, can by the boron extended surface of two silicon chips with aspectant mode mutually against, put into boiler tube diffusion, boron extended surface, owing to there being the thickest barrier layer, therefore can effectively stop extending influence of phosphorus extended surface, and the sheet resistance obtained is 70 Ω to 85 about Ω.
By foregoing description, the preparation method of the above-mentioned N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, owing to first the front of the silicon chip after forming matte being carried out boron diffusion, then the back side of described silicon chip is performed etching, then utilize N2O and SiH4Silicon oxide masking film is made in the front of described silicon chip, finally the back side of described silicon chip is carried out phosphorus diffusion, what this phosphorus diffusion couple front boron that can be prevented effectively from the back side spread affects around expansion, therefore, it is possible to ensure the cleanliness factor during Double side diffusion, improves the photovoltaic conversion efficiency of battery.
The preparation method of the second N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of the first N-type above-mentioned efficient monocrystalline double-side cell, also includes following technical characteristic:
Described utilize N2O and SiH4Making silicon oxide masking film in the described front of described silicon chip is:
In PECVD boiler tube, by described N2O and SiH4Mix according to the ratio of 300:4500, make the silicon oxide masking film that thickness range is 70 nanometers to 90 nanometers in the front of described silicon chip.
Concrete, this process is carried out in PECVD boiler tube, and environment is the same, by SiH with environment during PE plated film4With N2O carries out immixture about 800 seconds according to the ratio of 300:4500, finally obtains the silicon oxide masking film that thickness range is 70 nanometers to 90 nanometers, this mask evenly, purer, and easily facilitate cleaning.
The preparation method of the third N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of above-mentioned the second N-type efficient monocrystalline double-side cell, also includes following technical characteristic:
N is utilized described2O and SiH4Before the front of described silicon chip makes silicon oxide masking film, also include:
Ammonia is utilized to purge described PECVD boiler tube and bombard the surface of described silicon chip.So, prewashed purpose has just been reached, it is achieved the cleanest technical process.
The preparation method of the 4th kind of N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of the third N-type above-mentioned efficient monocrystalline double-side cell, also includes following technical characteristic:
After the described back side to described silicon chip carries out phosphorus diffusion, also include:
Remove PSG, BSG and described silicon oxide masking film.
The preparation method of the 5th kind of N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of above-mentioned 4th kind of N-type efficient monocrystalline double-side cell, also includes following technical characteristic:
Described remove PSG, BSG and described silicon oxide masking film can particularly as follows:
The hydrofluoric acid solution utilizing mass fraction to be 5% to 20% soaks described silicon chip 5 to 10 minutes, removes described PSG, BSG and described silicon oxide masking film.Further, the mass fraction of described hydrofluoric acid solution can be preferably 10%.
The preparation method of the 6th kind of N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of above-mentioned 5th kind of N-type efficient monocrystalline double-side cell, also includes following technical characteristic:
After described removing PSG, BSG and described silicon oxide masking film, also include:
Making thickness in the front of described silicon chip is that 4 nanometers are annealed to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C.Concrete, it is possible to use ALD equipment does one layer of 4 nanometer to the aluminium oxide of 10 nanometers in boron extended surface, with Passivation of Boron extended surface.
The preparation method of the 7th kind of N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of above-mentioned 6th kind of N-type efficient monocrystalline double-side cell, also includes following technical characteristic:
Making thickness in the front of described silicon chip is that 4 nanometers, also include after annealing to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C:
Make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and make the silicon nitride that thickness is 65 nanometers to 85 nanometers at the back side of described silicon chip.
The preparation method of the 8th kind of N-type efficient monocrystalline double-side cell that the embodiment of the present application provides, on the basis of the preparation method of above-mentioned 7th kind of N-type efficient monocrystalline double-side cell, also includes following technical characteristic:
Make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and after the back side of described silicon chip makes the silicon nitride that thickness is 65 nanometers to 85 nanometers, also include:
Described silicon chip is carried out two-sided silk screen printing.Concrete, first printed back, republish front.
Said method is by with N2O does one layer of front mask, be possible to prevent that back side diffusion brings around expanding impact, thus the boron protecting front expands, and turn avoid simultaneously and carries SiN and enter boiler tube diffusion, protects boiler tube, and silicon oxide is removed the most convenient than silicon nitride.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses the present invention.Multiple amendment to these embodiments will be apparent from for those skilled in the art, and generic principles defined herein can realize without departing from the spirit or scope of the present invention in other embodiments.Therefore, the present invention is not intended to be limited to the embodiments shown herein, and is to fit to the widest scope consistent with principles disclosed herein and features of novelty.
Claims (8)
1. the preparation method of a N-type efficient monocrystalline double-side cell, it is characterised in that including:
The front of the silicon chip after forming matte is carried out boron diffusion；
The back side of described silicon chip is performed etching；
Utilize N2O and SiH4Silicon oxide masking film is made in the front of described silicon chip；
The back side of described silicon chip is carried out phosphorus diffusion.
The preparation method of N-type the most according to claim 1 efficient monocrystalline double-side cell, it is characterised in that described utilize N2O and SiH4Making silicon oxide masking film in the described front of described silicon chip is:
In PECVD boiler tube, by described N2O and SiH4Mix according to the ratio of 300:4500, make the silicon oxide masking film that thickness range is 70 nanometers to 90 nanometers in the front of described silicon chip.
The preparation method of N-type the most according to claim 2 efficient monocrystalline double-side cell, it is characterised in that utilize N described2O and SiH4Before the front of described silicon chip makes silicon oxide masking film, also include:
Ammonia is utilized to purge described PECVD boiler tube and bombard the surface of described silicon chip.
The preparation method of N-type the most according to claim 3 efficient monocrystalline double-side cell, it is characterised in that after the described back side to described silicon chip carries out phosphorus diffusion, also include:
Remove PSG, BSG and described silicon oxide masking film.
The preparation method of N-type the most according to claim 4 efficient monocrystalline double-side cell, it is characterised in that described removing PSG, BSG and described silicon oxide masking film be:
The hydrofluoric acid solution utilizing mass fraction to be 5% to 20% soaks described silicon chip 5 to 10 minutes, removes described PSG, BSG and described silicon oxide masking film.
The preparation method of N-type the most according to claim 5 efficient monocrystalline double-side cell, it is characterised in that after described removing PSG, BSG and described silicon oxide masking film, also include:
Making thickness in the front of described silicon chip is that 4 nanometers are annealed to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C.
The preparation method of N-type the most according to claim 6 efficient monocrystalline double-side cell, it is characterised in that make thickness is that 4 nanometers, also include after annealing to the aluminium oxide of 10 nanometers and at 300 DEG C to 500 DEG C in the front of described silicon chip:
Make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and make the silicon nitride that thickness is 65 nanometers to 85 nanometers at the back side of described silicon chip.
The preparation method of N-type the most according to claim 7 efficient monocrystalline double-side cell, it is characterized in that, make the silicon nitride that thickness is 50 nanometers to 75 nanometers in the front of described silicon chip, and after the back side of described silicon chip makes the silicon nitride that thickness is 65 nanometers to 85 nanometers, also include:
Described silicon chip is carried out two-sided silk screen printing.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20110139243A1 (en) * | 2010-09-03 | 2011-06-16 | Lg Electronics Inc. | Solar cell and method for manufacturing the same |
| CN102364698A (en) * | 2011-06-30 | 2012-02-29 | 常州天合光能有限公司 | Preparation method of solar cell for reutilizing diffusion oxide layer |
| CN103618022A (en) * | 2013-10-18 | 2014-03-05 | 浙江晶科能源有限公司 | Solar battery antireflection film manufacturing method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110139243A1 (en) * | 2010-09-03 | 2011-06-16 | Lg Electronics Inc. | Solar cell and method for manufacturing the same |
| CN102364698A (en) * | 2011-06-30 | 2012-02-29 | 常州天合光能有限公司 | Preparation method of solar cell for reutilizing diffusion oxide layer |
| CN103618022A (en) * | 2013-10-18 | 2014-03-05 | 浙江晶科能源有限公司 | Solar battery antireflection film manufacturing method |
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