CN105762133B - A kind of stack encapsulation structure and its process - Google Patents
A kind of stack encapsulation structure and its process Download PDFInfo
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- CN105762133B CN105762133B CN201610193304.3A CN201610193304A CN105762133B CN 105762133 B CN105762133 B CN 105762133B CN 201610193304 A CN201610193304 A CN 201610193304A CN 105762133 B CN105762133 B CN 105762133B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8134—Bonding interfaces of the bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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- Packaging Of Annular Or Rod-Shaped Articles, Wearing Apparel, Cassettes, Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The present invention relates to a kind of stack encapsulation structure and its process, the structure includes the first packaging body（1）With the second packaging body（2）, first packaging body（1）Including first substrate（14）With the first chip（16）, the first substrate（14）Including the first copper post（11）, the first plastic packaging material above the first substrate（17）Upper surface corresponds to the first copper post（11）Position be provided with trepanning（18）, first copper post（11）Top is provided with tin ball（13）, second packaging body（2）Including second substrate（19）, the second chip（20）With the second plastic packaging material（21）, the second substrate（19）The second copper post is provided on lower surface（12）, second copper post（12）It is plugged in the first plastic packaging material（17）On trepanning（18）In.A kind of stack encapsulation structure of the present invention and its process make tin ball when reflow be avoided that generation bridge joint phenomenon, to promote the yield of product.
Description
Technical field
The present invention relates to a kind of stack encapsulation structure and its processes, belong to technical field of semiconductor encapsulation.
Background technology
With flourishing for portable electronic product in recent years, all kinds of Related products are increasingly towards high density, high-performance
And light, thin, short, small trend and walk, each style encapsulated layer fold (package on package, PoP) also thus cooperation push away
It is old go out it is new, it is light and short with highdensity requirement to meet.
As shown in Figure 1, it is the schematic cross-sectional view of existing POP encapsulating structures.The encapsulation stack apparatus includes two being stacked
Encapsulating structure 100 and another encapsulating structure 200.After forming the first packaging body 100, the first packaging body upper surface is subtracted
It is thin, expose copper post 101, the second encapsulation 200 stacks by the tin ball 201 of its substrate back and is electrically coupled to lower package body 100.
There are defects below for above-mentioned stacked structure：
1, with the miniaturization of electronic building brick, the circuit spacing in packaging body becomes smaller, and each spacing welded between tin ball needs to contract
It is small, cause adjacent tin ball to be easy to happen bridge joint（bridge）The phenomenon that；
2, the tolerance of volume and height of the tin ball after reflow is big, and when reflow, tin club first becomes weak state, while in
After the weight for bearing top packaging body 200, it is easy flat deformation of collapsing, is bridged；
3, it is bad that the palisade array (grid array) that tin ball is arranged in easy tos produce coplanarity, leads to contact stress
It is uneven and be easy to cause stacked structure inclination.
Invention content
The technical problem to be solved by the present invention is to provide a kind of stack encapsulation structure for the above-mentioned prior art, make back
Tin ball when weldering is avoided that generation bridge joint phenomenon, to promote the yield of product, and can meet the needs of thin space.
Another object of the present invention is to provide a kind of stack encapsulation structure, coplanarity (coplanarity) well, easily
In control product height, do not tilt；
Another object of the present invention is to provide a kind of process of stack encapsulation structure, makes stacked structure in reflow
Tin ball be avoided that generation bridge joint phenomenon, to promote the yield of processing procedure.
Technical solution is used by the present invention solves the above problems：A kind of stack encapsulation structure, it includes the first envelope
It includes first substrate and the first chip to fill body and the second packaging body, first packaging body, and the first substrate includes First Line
Road pattern and the first copper post, are provided with the first plastic packaging material above the first substrate, and first plastic packaging material upper surface corresponds to the
The position of one copper post is provided with trepanning, is exposed in the trepanning of the first plastic packaging material upper surface at the top of first copper post, and described the
It is provided with tin ball at the top of one copper post, second packaging body includes second substrate, the second chip and the second plastic packaging material, and described second
The second copper post is provided on base lower surface, second copper post is plugged in the trepanning on the first plastic packaging material, and passes through tin ball
It is electrically connected with the first copper post.
First chip realizes electric connection, first chip and first with the first line pattern in first substrate
The upper surface of line pattern is located inside the first plastic packaging material.
It is in convex structure at the top of first copper post and the second copper post.
First plastic packaging material and the second plastic packaging material, which use, filler or packless epoxy resin.
A kind of process of stack encapsulation structure, the described method comprises the following steps：
Step 1: taking the first metal substrate；
Step 2: sticking the photoresistance film that can be exposed development respectively in the first metal substrate front and the back side, exposure is utilized
Metal substrate front is carried out graph exposure, development and removal partial graphical photoresistance film by photodevelopment equipment, to expose the first metal
Substrate front side subsequently needs the regional graphics being etched, and is etched to the first metal substrate, forms the first copper post；
Step 3: sticking the photoresistance film that can be exposed development in the first metal substrate front of step 2, exposure is utilized
First metal substrate front is carried out graph exposure, development and removal partial graphical photoresistance film by developing apparatus again, to expose the
One metal substrate front subsequently needs the regional graphics being etched, and is etched to the first metal substrate, forms first line
Pattern removes the photoresistance film of the first metallic substrate surfaces；
Step 4: chip is set on the first metal substrate for completing etching in step 3, chip and first line figure
Case, which is realized, to be electrically connected, then carries out epoxy resin plastic packaging protection to the first metal substrate front, forms the first plastic packaging material, the first modeling
Envelope material upper surface is higher by the upper surface of the first copper post；
Step 5: the position for corresponding to the first copper post in the first plastic packaging material carries out trepanning, the first copper post is exposed；
Step 6: the lower surface of the first metal substrate is thinned, first line pattern and point of the first copper post are realized
From to form the first packaging body；
Step 7: taking the second metal substrate；
Step 8: the second chip is arranged on the second metal substrate of step 7, the second chip and the second metal substrate are real
It is now electrically connected, then epoxy resin plastic packaging protection is carried out to the second metal substrate front, form the second plastic packaging material；
Step 9: the photoresistance film that can be exposed development is sticked at the second metal substrate back side that encapsulating is completed to step 8,
The second metal substrate back side is subjected to graph exposure, development and removal partial graphical photoresistance film using exposure imaging equipment, with dew
Go out the second metal substrate back side and subsequently need the regional graphics being etched, the second metal substrate is etched, forms second
Copper post；
Step 10: tin ball is placed in the trepanning of the first plastic packaging material of the first packaging body that step 6 is formed, by step 9
The second packaging body and the first packaging body of middle formation are combined, and the second copper post of the second packaging body lower surface is made to be inserted into the first envelope
In the trepanning for filling the first plastic packaging material upper surface of body；
Step 11: carrying out Reflow Soldering, the second copper post of the second packaging body lower surface is made to pass through tin ball and the first packaging body
The first copper post be electrically connected；
Step 12: step 11, which is completed the semi-finished product that packaging body stacks, carries out cutting operation, stacked package is made
Structure.
Compared with the prior art, the advantages of the present invention are as follows：
1, the copper post 11 of the first packaging body of the invention and the copper post 12 of the second packaging body form electricity in trepanning by tin ball
Property connection, metal column contacting metal ball makes to occur only at metal column contact jaw in trepanning at welding when reflow, be located at welding
In trepanning, so being avoided that generation bridge joint phenomenon, to promote the yield of product, and can meet the needs of thin space；
2, the present invention is in reflow due to the support of metal column, and the tolerance of packaging height is small, and contact is not likely to produce defect, altogether
Well, easily controllable product height does not tilt face property (coplanarity).
Description of the drawings
Fig. 1 is the schematic diagram of existing POP encapsulating structures.
Fig. 2 is a kind of schematic diagram of stack encapsulation structure of the present invention.
Fig. 3 ~ Figure 13 is a kind of process flow chart of stack encapsulation structure of the present invention.
Figure 14, Figure 15 are a kind of schematic diagram of another embodiment of stack encapsulation structure of the present invention.
Wherein：
First packaging body 1
Second packaging body 2
First copper post 11
Second copper post 12
Tin ball 13
First substrate 14
First line pattern 15
First chip 16
First plastic packaging material 17
Trepanning 18
Second substrate 19
Second chip 20
Second plastic packaging material 21.
Specific implementation mode
Below in conjunction with attached drawing embodiment, present invention is further described in detail.
As shown in Fig. 2, a kind of stack encapsulation structure in the present embodiment, it is encapsulated including the first packaging body 1 and second
Body 2, first packaging body 1 include first substrate 14 and the first chip 16, and the first substrate 14 includes first line pattern
15 and first copper post 11, the first chip 16, first chip 16 and first line are provided on the first line pattern 15
Pattern 15, which is realized, to be electrically connected, and 14 top of the first substrate is provided with the first plastic packaging material 17,17 upper table of the first plastic packaging material
The position that face corresponds to the first copper post 11 is provided with trepanning 18, and first copper post, 11 top is exposed to 17 upper surface of the first plastic packaging material
Trepanning 18 in, the top of first copper post 11 is provided with tin ball 13, and second packaging body 2 includes second substrate 19, second
Chip 20 and the second plastic packaging material 21, the second copper post 12 is provided on 19 lower surface of the second substrate, and second copper post 12 is inserted
Loaded in the trepanning 18 on the first plastic packaging material 17, and it is electrically connected by tin ball 13 and the first copper post 11.
Its processing step is as follows：
Step 1: referring to Fig. 3, the first metal substrate is taken；
Step 2: referring to Fig. 4, the photoresist that can be exposed development is sticked respectively in the first metal substrate front and the back side
Metal substrate front is carried out graph exposure, development and removal partial graphical photoresistance film, to expose by film using exposure imaging equipment
First metal substrate front subsequently needs the regional graphics being etched, and is etched to the first metal substrate, forms the first bronze medal
Column；
Step 3: referring to Fig. 5, the photoresistance film that can be exposed development is sticked in the first metal substrate front of step 2,
The first metal substrate front is subjected to graph exposure, development and removal partial graphical photoresistance film again using exposure imaging equipment,
The regional graphics being etched subsequently are needed to expose the first metal substrate front, the first metal substrate is etched, is formed
First line pattern removes the photoresistance film of the first metallic substrate surfaces；
Step 4: referring to Fig. 6, chip is set on the first metal substrate for completing etching in step 3, chip and the
One line pattern, which is realized, to be electrically connected, then carries out epoxy resin plastic packaging protection to the first metal substrate front, forms the first plastic packaging
Material, the first plastic packaging material upper surface are higher by the upper surface of the first copper post, and epoxide resin material can select to fill out according to product characteristic
Material or the not type of filler；
Step 5: referring to Fig. 7, the position that the first copper post is corresponded in the first plastic packaging material carries out trepanning, it is therefore an objective to expose the
One copper post；
Step 6: referring to Fig. 8, the lower surface of the first metal substrate is thinned, in order to realize first line
The separation of pattern and the first copper post, to form the first packaging body；
Step 7: referring to Fig. 9, the second metal substrate is taken；
Step 8: referring to Figure 10, the second chip, the second chip and the second gold medal are set on the second metal substrate of step 7
Belong to substrate and realize electric connection, then epoxy resin plastic packaging protection is carried out to the second metal substrate front, forms the second plastic packaging material, ring
Oxygen resin material can select have filler or the not type of filler according to product characteristic；
Step 9: referring to Figure 11, development can be exposed by being sticked to the second metal substrate back side that step 8 is completed to encapsulate
Photoresistance film, using exposure imaging equipment by the second metal substrate back side carry out graph exposure, development with removal partial graphical light
Film is hindered, the regional graphics being etched subsequently is needed to expose the second metal substrate back side, the second metal substrate is etched,
Form the second copper post；
Step 10: referring to Figure 12, tin ball is placed in the trepanning of the first plastic packaging material of the first packaging body that step 6 is formed,
The second packaging body formed in step 9 and the first packaging body are combined, the second copper post of the second packaging body lower surface is made to insert
Enter in the trepanning of the first plastic packaging material upper surface of the first packaging body；
Step 11: referring to Figure 13, Reflow Soldering is carried out, the second copper post of the second packaging body lower surface is made to pass through tin ball and the
First copper post of one packaging body is electrically connected；
Step 12: step 11, which is completed the semi-finished product that packaging body stacks, carries out cutting operation, stacked package is made
Structure.
As shown in Figure 14, Figure 15, for a kind of another embodiment of stack encapsulation structure of the present invention, it includes the first encapsulation
Body 1 and the second packaging body 2,11 top of the first copper post in first packaging body 1 is in convex structure, second packaging body 2
12 top of the second copper post of lower surface is in convex structure, and second copper post 12 is plugged in the trepanning 18 on the first plastic packaging material 17,
And be electrically connected by tin ball 13 and the first copper post 11, due to being in convex knot at the top of the first copper post and at the top of the second copper post
Structure, in Reflow Soldering, solder can envelope the salient point in copper post completely, can by the grasping force for the salient point that solder coats it
To further strengthen the binding force between the first packaging body and the second packaging body.
In addition to the implementation, all to use equivalent transformation or equivalent replacement the invention also includes there is an other embodiment
The technical solution that mode is formed should all be fallen within the scope of the hereto appended claims.
Claims (1)
1. a kind of process of stack encapsulation structure, it is characterised in that the described method comprises the following steps：
Step 1: taking the first metal substrate；
Step 2: stick the photoresistance film that can be exposed development respectively in the first metal substrate front and the back side, it is aobvious using exposure
Metal substrate front is carried out graph exposure, development and removal partial graphical photoresistance film by shadow equipment, to expose the first metal substrate
Front subsequently needs the regional graphics being etched, and is etched to the first metal substrate, forms the first copper post；
Step 3: sticking the photoresistance film that can be exposed development in the first metal substrate front of step 2, exposure imaging is utilized
First metal substrate front is carried out graph exposure, development and removal partial graphical photoresistance film by equipment again, to expose the first gold medal
Belong to substrate front side and subsequently need the regional graphics being etched, the first metal substrate is etched, forms first line pattern,
Remove the photoresistance film of the first metallic substrate surfaces；
Step 4: chip is set on the first metal substrate for completing etching in step 3, chip is real with first line pattern
It is now electrically connected, then epoxy resin plastic packaging protection is carried out to the first metal substrate front, form the first plastic packaging material, the first plastic packaging material
Upper surface is higher by the upper surface of the first copper post；
Step 5: the position for corresponding to the first copper post in the first plastic packaging material carries out trepanning, the first copper post is exposed；
Step 6: the lower surface of the first metal substrate is thinned, the separation of first line pattern and the first copper post is realized, from
And form the first packaging body；
Step 7: taking the second metal substrate；
Step 8: the second chip is arranged on the second metal substrate of step 7, the second chip and the second metal substrate realize electricity
Property connection, then to the second metal substrate front carry out epoxy resin plastic packaging protection, formed the second plastic packaging material；
Step 9: the photoresistance film that can be exposed development is sticked at the second metal substrate back side for completing encapsulating to step 8, utilize
The second metal substrate back side is carried out graph exposure, development and removal partial graphical photoresistance film by exposure imaging equipment, to expose the
The two metal substrate back sides subsequently need the regional graphics being etched, and are etched to the second metal substrate, form the second copper post；
Step 10: tin ball is placed in the trepanning of the first plastic packaging material of the first packaging body that step 6 is formed, by shape in step 9
At the second packaging body and the first packaging body be combined, make the second packaging body lower surface the second copper post be inserted into the first packaging body
The first plastic packaging material upper surface trepanning in；
Step 11: carry out Reflow Soldering, the second copper post of the second packaging body lower surface is made to pass through the of tin ball and the first packaging body
One copper post is electrically connected；
Step 12: step 11, which is completed the semi-finished product that packaging body stacks, carries out cutting operation, stack encapsulation structure is made.
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| TWI556379B (en) * | 2014-01-02 | 2016-11-01 | 矽品精密工業股份有限公司 | Semiconductor package and manufacturing method thereof |
| TWI556402B (en) * | 2014-01-02 | 2016-11-01 | 矽品精密工業股份有限公司 | Package on package structure and manufacturing method thereof |
| CN103904056A (en) * | 2014-04-02 | 2014-07-02 | 华进半导体封装先导技术研发中心有限公司 | PoP packaging structure and manufacturing technology |
| CN104103536A (en) * | 2014-07-15 | 2014-10-15 | 南通富士通微电子股份有限公司 | Package-on-package (POP) packaging method |
| CN205609513U (en) * | 2016-03-30 | 2016-09-28 | 江苏长电科技股份有限公司 | Heap packaging structure |
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