CN205920961U - Package structure of flip chip - Google Patents
Package structure of flip chip Download PDFInfo
- Publication number
- CN205920961U CN205920961U CN201620808349.2U CN201620808349U CN205920961U CN 205920961 U CN205920961 U CN 205920961U CN 201620808349 U CN201620808349 U CN 201620808349U CN 205920961 U CN205920961 U CN 205920961U
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- China
- Prior art keywords
- metal
- column
- metal line
- chip
- metal column
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
Abstract
The utility model provides a package structure of flip chip, including graphical metal wiring bottom, chip and cladding the plastic -sealed body of metal wiring bottom and chip, graphical metal wiring bottom has a plurality of metal gaskets, be provided with at least one second metal column on the metal gasket upper surface, under the metal gasket surface exposure in the plastic -sealed body, the chip orientation the surface of metal wiring bottom is provided with at least one first metal column of being connected with the chip land electricity, first metal column with the second metal column corresponds the electricity and connects, just highly being greater than of second metal column the height of first metal column. The utility model has the advantages of, the height that highly is greater than the first metal column of chip side of second metal column, this structure can reduce stress, avoids the chip to receive the damage, and practices thrift the cost, can be with cost reduction to 20%.
Description
Technical field
This utility model is related to field of semiconductor package, more particularly, to a kind of flip chip packaging structure.
Background technology
Conventional level package technology is all that the active area of chip faces up, and is bonded, such as lead back to after substrate and patch
Bonding and tape automated bonding (tab).Flip-Chip Using then by chip active area in the face of substrate, by being in that array is arranged on chip
The solder bump of row realizes the interconnection of chip and substrate.Silicon chip is directly installed to printed circuit board in back-off mode, from silicon chip to
Surrounding draws input/output terminal, greatly shortening of interconnection, reduces the delay of phase-shift circuit, is effectively improved electrical property.Aobvious
So, this chip interconnection mode is provided that the density of higher input/output terminal.Upside-down mounting occupied area almost with die size one
Cause.In all surface mounting technique, flip-chip can reach minimum, the thinnest encapsulation.
But, existing flip-chip packaged method haves the shortcomings that stress is big, and chip can be led to be damaged.Therefore, need badly
A kind of method for packing, reduces the stress of flip-chip packaged, it is to avoid chip is damaged.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of flip chip packaging structure, and it can reduce should
Power, it is to avoid chip is damaged, and cost-effective.
In order to solve the above problems, this utility model provides a kind of flip chip packaging structure, including patterned gold
Belong to wiring bottom, chip and the plastic-sealed body coating described metal line bottom and chip, described patterned metal line bottom
There are multiple metal gaskets, described metal gasket upper surface is provided with least one second metal column, described metal gasket lower surface is naked
It is exposed to described plastic-sealed body, described chip is provided with and is electrically connected at least with chip bonding pad towards the surface of described metal line bottom
One the first metal column, the electrical connection corresponding with described second metal column of described first metal column, and the height of described second metal column
Degree is more than the height of described first metal column.
Further, described encapsulating structure also includes at least one patterned metal line intermediate layer, multiple described metals
Wiring intermediate layer is along described second metal intercolumniation short transverse and described metal line bottom interval setting.
Further, at least one described second metal column side wall and/or at least one described patterned metal line bottom
Layer the side wall of metal gasket and/or at least one described patterned metal line intermediate layer metal gasket side wall have for
The projection of locking encapsulating structure plastic-sealed body.
Further, the lower surface exposing described plastic-sealed body in the metal gasket of described metal line bottom have solderable
Layer, for welding with extraneous.
The utility model has the advantage of, the height that this utility model forms the second metal column of a substrate-side is more than chip
The flip chip packaging structure of the height of the first metal column of side, this structure can reduce stress, it is to avoid chip is damaged, and
Cost-effective, cost can be reduced to 20%.
Brief description
Fig. 1 is the step schematic diagram of this utility model method for packing；
Fig. 2 a～Fig. 2 g is the schematic flow sheet of this utility model method for packing；
Fig. 3 a～Fig. 3 g is to form patterned metal line bottom and the upper surface in described metal gasket in substrate surface
Form the schematic flow sheet of at least one the second metal column；
Fig. 4 a～Fig. 4 g is to form at least one patterned metal line intermediate layer in the second metal column correspondence position
Schematic flow sheet；
Fig. 5 is to form raised structural representation；
Fig. 6 is the structural representation of one specific embodiment of this utility model flip chip packaging structure；
Fig. 7 is the structural representation of this utility model flip chip packaging structure another embodiment.
Specific embodiment
Below in conjunction with the accompanying drawings the specific embodiment of the flip chip packaging structure that this utility model provides is done specifically
Bright.
Referring to Fig. 1, this utility model method for packing comprises the steps: step s10: provides a substrate and a chip, institute
The bond pad surface stating chip has one first metal column；Step s12: form patterned metal line on described substrate one surface
Bottom, described metal line bottom has multiple metal gaskets；Step s14: form at least one in the upper surface of described metal gasket
Second metal column, the height of described second metal column is more than the height of described first metal column；Step s16: by described first gold medal
Belong to post and described second metal column welding；Step s18: chip described in plastic packaging, the first metal column, the second metal column and patterned
Metal line bottom；Step s20: remove described substrate, so that the metal gasket lower surface of metal line bottom is exposed, form upside-down mounting
Chip-packaging structure.
Fig. 2 a～Fig. 2 g is the process chart of this utility model method for packing.
Referring to Fig. 2 a and step s10, provide a substrate 200 and a chip 300, the pad of described chip 300 is (in accompanying drawing not
Indicating) surface has one first metal column 301.
Described substrate 200 can have a carrier of peelable metal level for simple carrier or surface, described can
Stripping metal layer can be subsequently peelable by plating or other modes deposition.Described first metal column 301 can be prior
It is produced on copper bump or other metal salient points of bond pad surface.
Referring to Fig. 2 b, step s12 and step s14, form patterned metal line bottom on described substrate 200 1 surface
201, described metal line bottom 201 has multiple metal gaskets 202.Form at least one in the upper surface of described metal gasket 202
Second metal column 203, the height of described second metal column 203 is more than the height of described first metal column 301.
In this embodiment, referring to Fig. 3 a～Fig. 3 g, form patterned metal on described substrate 200 1 surface
Wiring bottom 201 and form the method for at least one the second metal column 203 and include walking as follows in the upper surface of described metal gasket 202
Rapid:
Referring to Fig. 3 a, cover photosensitive mask 301 on a surface of described substrate 200.
Referring to Fig. 3 b, graphically described photosensitive mask 301, form patterned first mask layer 302.
Referring to Fig. 3 c, deposited metal, such as electro-coppering at the figure of described first mask layer 302, formed patterned
Metal line bottom 201, is deposited into the metal gasket of described metal line bottom 201 at the figure of described first mask layer 302
202.
Referring to Fig. 3 d, cover photosensitive mask 303 in described first mask layer 302 and metal line bottom 201 surface.
Referring to Fig. 3 e, graphically described photosensitive mask 303, form patterned second mask layer 304, described second mask
Corresponding described metal gasket 202 at the figure of layer 304.
Referring to Fig. 3 f, deposited metal at the figure of described second mask layer 304, with described metal gasket 202 upper surface
Form at least one second metal column 203.
Referring to Fig. 3 g, remove described first mask layer 302 and the second mask layer 304, expose patterned metal line
Bottom 201 and the second metal column 203.After this step, the second metal column 203 described in a pair can also be included and carry out anti-oxidation place
Reason step, the processing method of this step is prior art, will not be described here.
In another specific embodiment of this utility model, referring to Fig. 4 a, also include one and correspond to position in the second metal column 203
Put the step forming at least one patterned metal line intermediate layer 205.Described metal line intermediate layer 205 is in the second metal
Post position has metal gasket 206, and at least one described metal line intermediate layer 205 is along described second metal column 203 short transverse
Interval split described second metal column 203, that is, described metal line intermediate layer 205 described second metal column 203 is divided into some
It is preferable that being divided into some equal portions, often a second metal column 203 is defined as time the second metal column to part.Referring to shown in Fig. 4 a,
In this embodiment, comprise a described metal line intermediate layer 205, a described metal line intermediate layer 205 will
Described second metal column 203 is divided into two parts.Described patterned metal line intermediate layer 205 is used for described chip 300 fan-out
(fan out), to mate pcb plate.
The manufacture method in described metal line intermediate layer can be divided into two kinds of situations, after a kind of situation is step s12, that is, exists
After described substrate 200 1 surface forms the step of patterned metal line bottom 201, make metal line intermediate layer 205；
Another kind of situation is after step s14, and that is, the upper surface in described metal gasket 202 forms at least one second metal column 203
After step, make metal line intermediate layer 205.
In the case of being each described hereafter two kinds, the manufacture method in described metal line intermediate layer.
Fig. 4 b～Fig. 4 d is a kind of manufacture method in described metal line intermediate layer.Formed on described substrate 200 1 surface
Form described metal line intermediate layer 205 after the step of patterned metal line bottom 201.
Referring to Fig. 4 b, after described substrate 200 1 surface forms the step of patterned metal line bottom 201, adopt
Cover described patterned metal line bottom 201 and substrate 200 with insulant, form insulating barrier 210, and in described metal
Metal gasket 202 correspondence position of wiring bottom 201 forms via 211, exposes described metal gasket 202.
Referring to Fig. 4 c, form a patterned metal line intermediate layer 205 in described insulating barrier 210 upper surface, in this step
In rapid, metal deposit, in via 211, forms time the second metal column 212, described patterned metal line intermediate layer 205
The position of corresponding the second metal column 212 of metal gasket 206.
Referring to Fig. 4 d, the metal gasket 206 in described patterned metal line intermediate layer 205 forms a projection 213.Should
Raised 213 in subsequent technique, for welding with the first metal column 301.This projection 213 is with described the second metal column 212 altogether
With described second metal column 203 of composition.Formed by metal line bottom 201, the second metal column 203 on described substrate 200 surface
And constitute along the metal line intermediate layer 205 of described second metal column 203 of described second metal column 203 short transverse interval segmentation
Structure, the height sum in described second metal column 203 and described metal line intermediate layer 205 is more than described first metal column
301 height.
Fig. 4 e～Fig. 4 g is another kind of manufacture method in described metal line intermediate layer.Upper table in described metal gasket 202
After face forms at least one the second metal column 203 step, make metal line intermediate layer 205.
Formed at least one the second metal column 203 step in the upper surface of described metal gasket 202, shorten described second gold medal
Belong to the height of post 203, the second metal column 203 that here defines this shortening is time the second metal column 212；
Referring to Fig. 4 e, described patterned metal line bottom 201, substrate are covered using capsulation material or insulant
200 and secondary second metal column 212, form an insulating barrier 210, the upper surface of described the second metal column 212 be exposed to described absolutely
Edge layer 210 upper surface.
Referring to Fig. 4 f, form a patterned metal line intermediate layer 205 in described insulating barrier upper surface, described graphical
Described time second metal column 212 of metal gasket 206 correspondence in metal line intermediate layer 205 position.
Referring to Fig. 4 g, it is raised that metal gasket 206 upper surface in described patterned metal line intermediate layer 205 forms one
213, this projection 213 collectively forms described second metal column 203, on described substrate 200 surface with described the second metal column 212
Formed by metal line bottom 201, the second metal column 203 and split along described second metal column 203 short transverse interval described
The structure that the metal line intermediate layer 205 of the second metal column 203 is constituted, in described second metal column 203 and described metal line
The height sum of interbed 205 is more than the height of described first metal column 301.
Wherein, in this two methods, the manufacture method of described patterned metal line intermediate layer 205 and projection 213
The method that mask can be adopted, the technology that the method is known in the art, will not be described here.In addition, it is described patterned making
Conductive layer (not indicating in accompanying drawing) can be formed on described insulating barrier 210 surface before metal line intermediate layer 205, subsequently can adopt
Electric plating method deposits patterned metal line intermediate layer 205.In this embodiment, mask film covering layer and graphical
The method commonly used for those skilled in the art of method, will not be described here.
Referring to Fig. 2 c, after step s14, also including one, formed on described second metal column 203 surface can layer 204
Step, described can layer 204 be used for subsequent technique in use as weld layer.This step can be laggard in step shown in Fig. 3 f
OK, formed before removing the step of the first mask layer 302 and the second mask layer 304 can layer 204 it is also possible to remove
Except formed after the step of the first mask layer 302 and the second mask layer 304 can layer 204, herein this is not defined.
Referring to Fig. 2 d and step s16, described first metal column 301 is welded with described second metal column 203.Described
The surface of one metal column 301 can be previously implanted metal ball, when being welded, can be by the metal on the first metal column 301 surface
Ball layer 204 welding can form weld layer 400 with described.
Before welding step s16, referring to Fig. 5, also include one at least one described second metal column 203 side wall and/
Or the side wall of metal gasket 202 of at least one described patterned metal line bottom 201 and/or at least one is described graphical
The side wall of the metal gasket 206 in metal line intermediate layer 205 form the step of the projection 207 for locking encapsulating structure plastic-sealed body
Suddenly.Described second metal column 203 side wall, the side wall of metal gasket 202 of described patterned metal line bottom 201 and described figure
One or more of side wall of metal gasket 206 in metal line intermediate layer 205 of shape all can form projection 207, described
Raised 207 structures forming similar ear in side wall, can fix the plastic-sealed body 500 that follow-up encapsulation is formed, it is to avoid plastic packaging further
Body 500 is separated with components and parts (such as chip 300).In this embodiment, only at described patterned metal line bottom
The side wall of the metal gasket 202 of layer 201 forms raised 207.
Referring to Fig. 2 e and step s18, chip 300 described in plastic packaging, the first metal column 301, the second metal column 203 and graphical
Metal line bottom 201, described plastic-sealed body 500 surround described chip 300, the first metal column 301, the second metal column 203 and
Patterned metal line bottom 201.
Referring to Fig. 2 f and step s20, remove described substrate 200, so that metal gasket 202 following table of metal line bottom 201
Face is exposed, forms flip chip packaging structure 600.The method removing described substrate 200 is this area conventional method, and here is no longer
Repeat.
Further, referring to Fig. 2 g, after removing described substrate 200, also include one in described metal line bottom 201
Metal gasket 202 expose described plastic-sealed body 500 lower surface formed can layer 208 step, described can layer 208 be used for
Extraneous realization welding.Described can layer 208 can be by the heavy stannum of chemistry, deposition nickel gold or osp process (Organic Solderability protection) etc.
Mode is formed.
This utility model also provides a kind of flip chip packaging structure, and referring to Fig. 6, flip chip packaging structure 600 includes
Patterned metal line bottom 201, chip 300 and the plastic-sealed body 500 coating described metal line bottom 201 and chip 300,
Described patterned metal line bottom 201 has multiple metal gaskets 202, and described metal gasket 202 upper surface is provided with least
One the second metal column 203, described metal gasket 202 lower surface is exposed to described plastic-sealed body 500, and described chip 300 is towards described
The surface of metal line bottom 201 is provided with least one first metal column 301 electrically connecting with chip bonding pad, described first gold medal
Belong to post 301 and the corresponding electrical connection of described second metal column 203, and the height of described second metal column 203 is more than described first gold medal
Belong to the height of post 301.
Referring to Fig. 7, in another specific embodiment of this utility model, described encapsulating structure also includes at least one figure
Change metal line intermediate layer 205, multiple described metal line intermediate layers 205 along described second metal column 203 short transverse with
Described metal line bottom 201 interval setting.In this embodiment, described encapsulating structure also include one patterned
Metal line intermediate layer 205, described second metal column 203 is divided into two parts by a described metal line intermediate layer 205.
Preferably, at least one described second metal column 203 side wall and/or at least one described patterned metal line
The side wall of the metal gasket 202 of bottom 201 and/or the metal gasket 206 at least one described patterned metal line intermediate layer 205
Side wall there is projection 207 for locking encapsulating structure plastic-sealed body, described raised 207 form the knot of similar ear in side wall
Structure, can fix plastic-sealed body 500 further, it is to avoid plastic-sealed body 500 is separated with components and parts (such as chip 300), referring to Fig. 7, at this
In specific embodiment, only the side wall in the metal gasket 202 of described patterned metal line bottom 201 forms raised 207.
Preferably, in the lower surface exposing described plastic-sealed body 500 of the metal gasket 202 of described metal line bottom 201
Also have can layer 208, described layer 208 can be used for and extraneous realize welding.
The above is only preferred implementation of the present utility model it is noted that common skill for the art
Art personnel, on the premise of without departing from this utility model principle, can also make some improvements and modifications, these improvements and modifications
Also should be regarded as protection domain of the present utility model.
Claims (4)
1. a kind of flip chip packaging structure, including patterned metal line bottom, chip and the described metal line bottom of cladding
Layer and the plastic-sealed body of chip, described patterned metal line bottom has multiple metal gaskets, described metal gasket upper surface sets
It is equipped with least one second metal column, described metal gasket lower surface is exposed to described plastic-sealed body, and described chip is towards described metal
The surface of wiring bottom is provided with least one first metal column electrically connecting with chip bonding pad it is characterised in that described first
Metal column electrical connection corresponding with described second metal column, and the height of described second metal column is more than the height of described first metal column
Degree.
2. flip chip packaging structure according to claim 1 is it is characterised in that described encapsulating structure also includes at least one
Individual patterned metal line intermediate layer, multiple described metal line intermediate layers are along described second metal intercolumniation short transverse and institute
State metal line bottom interval setting.
3. the flip chip packaging structure according to claim 1 or 2 any one is it is characterised in that described at least one
Second metal column side wall and/or the side wall of metal gasket and/or at least of at least one described patterned metal line bottom
The side wall of the metal gasket in individual described patterned metal line intermediate layer has the projection for locking encapsulating structure plastic-sealed body.
4. flip chip packaging structure according to claim 1 is it is characterised in that metal in described metal line bottom
The lower surface exposing described plastic-sealed body of pad have can layer, for extraneous welding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620808349.2U CN205920961U (en) | 2016-07-28 | 2016-07-28 | Package structure of flip chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620808349.2U CN205920961U (en) | 2016-07-28 | 2016-07-28 | Package structure of flip chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205920961U true CN205920961U (en) | 2017-02-01 |
Family
ID=57873184
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620808349.2U Active CN205920961U (en) | 2016-07-28 | 2016-07-28 | Package structure of flip chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205920961U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106057685A (en) * | 2016-07-28 | 2016-10-26 | 合肥矽迈微电子科技有限公司 | Packaging method and flip chip packaging structure |
| CN109427714A (en) * | 2017-08-24 | 2019-03-05 | 日月光半导体制造股份有限公司 | Semiconductor packages and its manufacturing method |
| US11239140B2 (en) | 2017-12-20 | 2022-02-01 | Hefei Smat Technology Co., Ltd. | Chip packaging structure with heat dissipation layer, flange and sealing pin |
-
2016
- 2016-07-28 CN CN201620808349.2U patent/CN205920961U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106057685A (en) * | 2016-07-28 | 2016-10-26 | 合肥矽迈微电子科技有限公司 | Packaging method and flip chip packaging structure |
| CN109427714A (en) * | 2017-08-24 | 2019-03-05 | 日月光半导体制造股份有限公司 | Semiconductor packages and its manufacturing method |
| CN109427714B (en) * | 2017-08-24 | 2023-09-08 | 日月光半导体制造股份有限公司 | Semiconductor package and method of manufacturing the same |
| US11239140B2 (en) | 2017-12-20 | 2022-02-01 | Hefei Smat Technology Co., Ltd. | Chip packaging structure with heat dissipation layer, flange and sealing pin |
| US11735503B2 (en) | 2017-12-20 | 2023-08-22 | Hefei SMAT Technology Co., LTD | Method of manufacturing chip packaging structure with dissipation layer, flange and sealing pin |
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