CN105740518A - FPGA resource placement method and apparatus - Google Patents
FPGA resource placement method and apparatus Download PDFInfo
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- CN105740518A CN105740518A CN201610049907.6A CN201610049907A CN105740518A CN 105740518 A CN105740518 A CN 105740518A CN 201610049907 A CN201610049907 A CN 201610049907A CN 105740518 A CN105740518 A CN 105740518A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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Abstract
The present invention discloses an FPGA resource placement method and apparatus. The method comprises: dividing a resource placement region in an FPGA according to resource types to obtain a plurality of sub-regions, and establishing a corresponding relation between the resource types and the sub-regions; determining a resource type of a to-be-placed unit, and according to the resource type of the to-be-placed unit as well as the corresponding relation, searching out a sub-region corresponding to the resource type; and placing the to-be-placed unit in the searched-out sub-region. The method and apparatus disclosed by the present invention solve the problem of an imperfect resource placement scheme of the existing FPGA.
Description
Technical field
The present invention relates to field programmable gate array (FPGA) technical field, particularly relate to resource placement's method and the device of a kind of FPGA.
Background technology
The core of EDA (ElectronicDesignAutomation, electric design automation) software is placement-and-routing, and the result of layout directly affects the feasibility of wiring and the performance of postorder.In general the process of layout carries out global wiring, the layout that legalizes and detailed placement according to this.Global wiring is tentatively to be placed on by calculated position by each unit in design netlist, this calculating process is generally with line length, sequential and density are cost factor, use specific algorithm, and global wiring is it is not intended that whether each unit has the region of overlap or deviate whole legal layout areas；The layout that legalizes adjustment to global wiring result just, the unit of repetition is placed into different physical locations, the unit being in outside layout areas is adjusted legal position, the result of the layout that legalizes can connect up often, but performance is frequently not optimum, layout result needs detailed placement do further fine setting and optimize.
The layout that legalizes of present stage main flow usually can layout units be ranked up all after global wiring, and the unit that area occupied is big is more big on the impact of the layout that legalizes, so needing preferentially to carry out the operation that legalizes；The result of global wiring is a kind of desired layout situation that the cost value drawn according to algorithm is very little, and legalize the suitable position needing the physical location around preliminary placement result to find other free time for this each unit.Conventional one legalizes layout process such as shown in Fig. 1 a to Fig. 1 d, assume that the layout result of global wiring of a unit is in position shown in Fig. 1 a, the layout that then legalizes follows the result of global wiring, at 4 nearest position search one by one, as shown in Figure 1 b, find the position that can place, if can not layout; continue outer layers and expand to position as illustrated in figure 1 c, if or can not layout, continue outer layers and expand to position as shown in Figure 1 d, until being diffused into whole layout areas.
The advantage of the method is in that, for each unit, it is minimum that its result legalized follows line length on the basis of global wiring algorithm, but, shortcoming is also evident from, and being required for traveling through all of whole layout areas for each unit can placement position.If placement position has m, design netlist has n to treat layout units, then the time complexity of algorithm is O (m*n).Along with the complication of the expansion of physical circuit scale and design netlist, the process legalized can be greatly increased.The layout that legalizes it is, thus, sought for a kind of new layout method meets Consumer's Experience, in the placement algorithm that especially large scale integrated circuit is corresponding with complicated user's design netlist.
Summary of the invention
The present invention provides resource placement's method and the device of a kind of FPGA, solves the problem that resource placement's scheme of existing FPGA is perfect not.
For solving above-mentioned technical problem, the present invention by the following technical solutions:
A kind of resource placement method of FPGA, including:
According to resource type, the resource placement region in FPGA is divided, be divided into many sub regions, and set up the corresponding relation of resource type and subregion；
Determine the resource type treated belonging to layout units, and according to the resource type treated belonging to layout units, and described corresponding relation finds out corresponding subregion；
The subregion found out treats layout units described in layout.
A kind of resource placement device of FPGA, including:
Sub-zone dividing module, for being divided in the resource placement region in FPGA according to resource type, is divided into many sub regions；
Relation sets up module, for setting up the corresponding relation of resource type and subregion；
Resource type determines module, for determining the resource type treated belonging to layout units；
Search module, treat the resource type belonging to layout units for basis, and described corresponding relation finds out corresponding subregion；
Subregion layout modules, for treating layout units described in layout in the subregion that described lookup module searches goes out.
The present invention is directed to the limitation of the middle layout method of prior art, devise a kind of brand-new layout method, resource placement region in FPGA is divided according to the type of resource, it is divided into many sub regions, layout units is treated for each, in corresponding subregion, only finding the position of free time and place wherein, reducing each scope treating that layout units is inquired about, thus being greatly saved the meaningless lookup time.Be particularly suited for carrying out the layout result based on global wiring after global wiring, i.e. resource placement region, carry out legalizing layout, eliminates the overlapping region of each unit.
Accompanying drawing explanation
Fig. 1 a be existing global wiring layout result in the position view of unit of layout to be legalized；
Fig. 1 b is the schematic diagram of a kind of layout type that legalizes of unit shown in Fig. 1 a；
Fig. 1 c is that the another kind of unit shown in Fig. 1 a legalizes the schematic diagram of layout type；
Fig. 1 d is that the another kind of unit shown in Fig. 1 a legalizes the schematic diagram of layout type；
The flow chart of resource placement's method of the FPGA that Fig. 2 provides for one embodiment of the invention；
Fig. 3 a is the schematic diagram in the resource placement region obtained after one embodiment of the invention global wiring；
Fig. 3 b is the schematic diagram of the first subregion marked off in resource placement region shown in Fig. 3 a；
Fig. 3 c is the schematic diagram of the second subregion marked off in resource placement region shown in Fig. 3 a；
Fig. 3 d is the schematic diagram of the 3rd subregion marked off in resource placement region shown in Fig. 3 a；
The schematic diagram of resource placement's device of the FPGA that Fig. 4 provides for one embodiment of the invention.
Detailed description of the invention
Below by specific embodiment, the design of the present invention is further described.
As in figure 2 it is shown, the flow chart of resource placement's method of the FPGA provided for one embodiment of the invention, mainly comprise the steps that
S101, according to resource type, the resource placement region in FPGA is divided, be divided into many sub regions, and set up the corresponding relation of resource type and subregion.
Resource placement region is including, but not limited to the layout result of global wiring.
In certain embodiments, before step S101, also include: according to design netlist and preset algorithm, the resource of FPGA is carried out global wiring, obtain the layout result of global wiring, i.e. resource placement region.The concrete mode of global wiring can refer to prior art.Resource in resource placement region is including, but not limited to IOB (Input/OutputBuffer), CLB (ConfigurableLogicBlock), DCM (DigitalClockManagement), RAM (RandomAccessMemory), other the embedded functional unit of bottom such as PLL (PhaseLockedLoop), DLL (DelayLockedLoop), DSP (DigitalSignalProcessing), CPU (CentralProcessUnit) etc..
In general each distribution of resource in current resource placement region is that comparison is regular, and the division in resource placement region can be followed following principle:
The region being distributed in same class resource set in resource placement region, as subregion；Such as will be distributed over same a line or the same class resource with string is retained in the relative position relation in former region respectively as subregion, such as IOB, what be commonly seen is distributed in horizontal a line or longitudinal string, all can as subregion for every a line, every string；
For the same class resource of dispersed and distributed in resource placement region, it is possible to carry out layout again, centralized layout is in one or more regions, using each region after layout again as subregion；The regular distribution of resource and the dispersion ratio of the type such as having are more uniform, it is possible to adopt the mode rebuild, namely directly these resources are concentrated on a region, using this region as subregion, be different in that the physical distance between resource is no longer unit 1；
For the same class resource of dispersed and distributed in resource placement region, it is also possible to using each discrete areas as subregion；
For the resource of accounting big especially (such as more than preset value), as CLB can not divide, because its quantity is excessive, and substantially spreading over whole resource placement region, unnecessary useless lookup is negligible；If individually one corresponding subregion of structure also may be used, it may be considered that simple distribution is removed in the I/O portion of whole resource placement edges of regions.
For there being the part of white space can consider directly to ignore this difference, because the set containing only layout resource that resource placement region takes out with reference to the prototype of side circuit often, physics relativeness mutual between each unit cannot accomplish very to describe accurately.Or select using the left and right sides, clear area or up and down both sides as subregion.
S102, determine the resource type treated belonging to layout units, and according to the resource type treated belonging to layout units, and described corresponding relation finds out corresponding subregion.
Treat that layout units can be arbitrary unit, it is also possible to be specific unit, it is preferred that to standardized, step S102 only treats that layout units makes a look up, traditional scheme can be adopted to carry out layout for the compound of other and macroelement.
In certain embodiments, according to the resource type treated belonging to layout units, and before described corresponding relation finds out corresponding subregion, also include:
Judge to treat whether layout units meets pre-conditioned；Such as: judge to treat that whether layout units is standardized treat layout units, if it is, meet pre-conditioned, if it is not, then be unsatisfactory for pre-conditioned, compound and macroblock are considered as being unsatisfactory for pre-conditioned；
If meeting pre-conditioned, then enter according to treating the resource type belonging to layout units, and described corresponding relation finds out the step of corresponding subregion.
S103, in the subregion found out, treat layout units described in layout.
For respectively treating layout units, in corresponding subregion, only finding the position of free time and place wherein, reducing each scope treating that layout units is inquired about, thus being greatly saved the meaningless lookup time.It is particularly suited for the layout that legalizes, eliminates the overlapping region of each unit.
Below for the global wiring result shown in Fig. 3 a, present inventive concept is adopted to realize legalizing on the basis of this global wiring result layout.Global wiring result shown in Fig. 3 a, is namely the set of all layout resources, and this layout resource has IO, tri-kinds of resources of CLB, PLL, and IO is distributed in top line and two horizontal zones of bottom row, PLL is distributed rectangle grid area in fig. 3 a, owing to CLB is large number of, does not mark in figure.
First, using global wiring result as resource placement region, divide according to resource type, concrete: can to divide according to resource type, the corresponding sub regions of PLL, such as Fig. 3 b, claim the first subregion；Due to IO have far top row and most bottom row point, it is considered to two subzones in same resource type, it is possible to using the IO of far top row, most bottom row IO as a sub regions, such as Fig. 3 c and Fig. 3 d, claim the second subregion, the 3rd subregion respectively；Owing to CLB is large number of, distribution dispersion, it may not be necessary to individually divide the subregion of CLB.
Secondly, set up the corresponding relation of resource type and subregion, the first subregion as corresponding in PLL；Corresponding second subregion of IO and the 3rd subregion.
Again, that finds out overlapping placement in resource placement region treats layout units, it may be judged whether for standardized unit, if, determine the resource type treated belonging to layout units, and according to the resource type treated belonging to layout units, and upper corresponding relation finds out corresponding subregion；If not standardized unit, it is such as compound and macroelement, then traditional scheme can be adopted to carry out layout.
Finally, in the subregion found out, layout units is treated described in layout.In corresponding subregion, only find the position of free time and place wherein, eliminating the overlapping region of each unit.In certain some embodiment, after this step, it is also possible to according to the corresponding relation between the position in each position of subregion and resource placement region, subregion is reset in resource placement region.
No matter the existing placement scheme that legalizes, be Standardisation Cell, or complicated type or macroelement, all carries out the operation that legalizes in whole layout areas.And above example of the present invention treats layout units for what obtain from the netlist after global wiring, if for complicated type or macroelement, whole layout areas is still used to legalize；If being Standardisation Cell, finding the subregion of correspondence according to previously established corresponding relation, carrying out, at this subregion, the operation that legalizes.
The schematic diagram of resource placement's device of the FPGA that Fig. 4 provides for one embodiment of the invention, resource placement's device of FPGA includes:
Sub-zone dividing module 41, for being divided in the resource placement region in FPGA according to resource type, is divided into many sub regions；
Relation sets up module 42, for setting up the corresponding relation of resource type and subregion；
Resource type determines module 43, for determining the resource type treated belonging to layout units；
Search module 44, treat the resource type belonging to layout units for basis, and described corresponding relation finds out corresponding subregion；
Subregion layout modules 45, treats layout units described in layout in searching the subregion that module 44 finds out.
In certain embodiments, resource placement's device of this FPGA, also include global wiring module 46, for the resource of FPGA being carried out global wiring according to design netlist and preset algorithm, obtain described resource placement region.
In certain embodiments, the sub-zone dividing module 41 region specifically for being distributed in same class resource set in described resource placement region, as subregion；For the same class resource of dispersed and distributed in described resource placement region, carrying out layout again, centralized layout is in one or more regions, using each region after layout again as subregion, or, using each discrete areas as subregion.
In certain embodiments, resource placement's device of this FPGA, also include judge module 47, treat whether layout units meets described in being used for judging pre-conditioned；Described lookup module 44 specifically for the judged result of described judge module 47 for meeting pre-conditioned time, according to the resource type treated belonging to layout units, and described corresponding relation finds out corresponding subregion.
The present invention is directed to the limitation of the middle layout method of prior art, devise a kind of brand-new layout method, resource placement region in FPGA is divided according to the type of resource, it is divided into many sub regions, layout units is treated for each, in corresponding subregion, only finding the position of free time and place wherein, reducing each scope treating that layout units is inquired about, thus being greatly saved the meaningless lookup time.Be particularly suited for carrying out the layout result based on global wiring after global wiring, i.e. resource placement region, carry out legalizing layout, eliminates the overlapping region of each unit.
Above content is in conjunction with specific embodiment further description made for the present invention, it is impossible to assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, it is also possible to make some simple deduction or replace, protection scope of the present invention all should be considered as belonging to.
Claims (8)
1. resource placement's method of a FPGA, it is characterised in that including:
According to resource type, the resource placement region in FPGA is divided, be divided into many sub regions, and set up the corresponding relation of resource type and subregion；
Determine the resource type treated belonging to layout units, and according to the resource type treated belonging to layout units, and described corresponding relation finds out corresponding subregion；
The subregion found out treats layout units described in layout.
2. resource placement's method of FPGA as claimed in claim 1, it is characterized in that, before according to resource type the resource placement region in FPGA being divided, also include: according to design netlist and preset algorithm, the resource of FPGA is carried out global wiring, obtain described resource placement region.
3. resource placement's method of FPGA as claimed in claim 1, it is characterised in that according to resource type, the resource placement region in FPGA is carried out division and include:
The region being distributed in same class resource set in described resource placement region, as subregion；
For the same class resource of dispersed and distributed in described resource placement region, carrying out layout again, centralized layout is in one or more regions, using each region after layout again as subregion；Or, using each discrete areas as subregion.
4. resource placement's method of the FPGA as described in any one of claims 1 to 3, it is characterised in that according to the resource type treated belonging to layout units, and before described corresponding relation finds out corresponding subregion, also include:
Treat described in judgement whether layout units meets pre-conditioned；
If meeting pre-conditioned, then enter according to treating the resource type belonging to layout units, and described corresponding relation finds out the step of corresponding subregion.
5. resource placement's device of a FPGA, it is characterised in that including:
Sub-zone dividing module, for being divided in the resource placement region in FPGA according to resource type, is divided into many sub regions；
Relation sets up module, for setting up the corresponding relation of resource type and subregion；
Resource type determines module, for determining the resource type treated belonging to layout units；
Search module, treat the resource type belonging to layout units for basis, and described corresponding relation finds out corresponding subregion；
Subregion layout modules, for treating layout units described in layout in the subregion that described lookup module searches goes out.
6. resource placement's device of FPGA as claimed in claim 5, it is characterised in that also include global wiring module, for the resource of FPGA being carried out global wiring according to design netlist and preset algorithm, obtain described resource placement region.
7. resource placement's device of FPGA as claimed in claim 5, it is characterised in that the sub-zone dividing module region specifically for being distributed in same class resource set in described resource placement region, as subregion；For the same class resource of dispersed and distributed in described resource placement region, carrying out layout again, centralized layout is in one or more regions, using each region after layout again as subregion, or, using each discrete areas as subregion.
8. resource placement's device of the FPGA as described in any one of claim 5 to 7, it is characterised in that also include judge module, treats whether layout units meets described in being used for judging pre-conditioned；Described lookup module specifically for the judged result of described judge module for meeting pre-conditioned time, according to the resource type treated belonging to layout units, and described corresponding relation finds out corresponding subregion.
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Application publication date: 20160706 |