CN1056763A - The sense amplifier driving circuit that is used for semiconductor memory - Google Patents
The sense amplifier driving circuit that is used for semiconductor memory Download PDFInfo
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- CN1056763A CN1056763A CN91103355A CN91103355A CN1056763A CN 1056763 A CN1056763 A CN 1056763A CN 91103355 A CN91103355 A CN 91103355A CN 91103355 A CN91103355 A CN 91103355A CN 1056763 A CN1056763 A CN 1056763A
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- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
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- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
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- G11C7/065—Differential amplifiers of latching type
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Abstract
Control the sense amplifier driving circuit of the sensor amplifier of high density semiconductor memory by conducting or the driving transistors between external electric pressure side and earth terminal, it comprises the biasing circuit that is connected to the driving transistors canopy utmost point, to control its grid voltage, reduce the peak point current of sensor amplifier drive signal.And, to have the waveform generation drive signal of bilinearity slope, noise power is descended.This biasing circuit is connected to the clamp of clamp circuit realization to the effective recovery voltage of described driving circuit.Described driving circuit comprises that also the constant current circuit that contains two above sequence starting image electric current circuit makes the sensor amplifier drive signal have stable bilinearity slope.
Description
The present invention relates to be used for amplifying a kind of sense amplifier driving circuit of the data that are stored in the high density memory storage unit, relate to a kind of like this sense amplifier driving circuit more precisely, promptly, peak point current when reducing the sensor amplifier that drives storer, thereby improve the stability of sensor amplifier, the signal that is used to drive sensor amplifier will have the diclinic rate, and the effective recovery voltage that latchs node that is input to the P-MOS sensor amplifier will be clamped at the builtin voltage level.
Recently develop many dissimilar semiconductor memories, in all these storeies, all used sensor amplifier to amplify the data that are stored in the storage unit.But, increase with semiconductor memory density and to go wrong, so that the peak point current of sensor amplifier drive signal is increased to high level, and the stability of sensor amplifier reduces when driving sensor amplifier.Therefore, a lot of effort have been made for peak point current, the noise that reduces its generation that reduces the sensor amplifier drive signal, the stability that strengthens sensor amplifier.
Fig. 1 illustrates normally used conventional sensor amplifier and its driving circuit.As shown in the drawing, this conventional sensor amplifier comprises that two are connected to the P-MOS transistor that latchs node LAp, and two are connected to and latch node LA
NThe N-MOS transistor, and the bit line BL that is connected to the MOS transistor gate terminal
L, BL
R, constitute multistage sensing amplifier SA more than a plurality of
1-SA
N
This sense amplifier driving circuit comprises: be used to drive the large-scale P-MOS transistor Q1 and the large-scale N-MOS transistor Q2 of sensor amplifier, they are connected respectively to latchs node LAp, LA
N, and be connected respectively to external voltage Vcc end and earth potential Vss end; Phase inverter INV1, INV2, they are connected respectively on the grid of MOS transistor Q1, Q2.
Conventional sense amplifier driving circuit as above-mentioned composition is described its operation referring now to Fig. 2.During effective recovery operation of sensor amplifier, if row address selecting way signal RAS becomes low level, then have efficient recovery enabling signal Φ sp to become high level, this signal is converted to low level by phase inverter INV1, so it is input to the grid of driving transistors Q1 with transistor Q1 conducting.
With similar methods, during the sensing operation of N-MOS sensor amplifier, if row address selecting way signal RAS is a low level, sense enable signal Φ then
SNBecome low level, then, this signal is converted to high level by phase inverter INV2, and the grid that therefore it is input to transistor Q2 makes transistor Q2 conducting.
Like this, conventional sensor amplifier is by driven MOS transistor Q1, and the operation of the conduction and cut-off of Q2 is controlled.Therefore, when driven MOS transistor Q1 and Q2 conducting, there are peak point current Iccp and Issp to take place and are suddenly to increase.Produce high-power noise thus.And, public node LAp, the LA of latching of sensor amplifier
NCurrent potential such as Fig. 2 in drive signal Φ LAp, Φ LA
NWaveform shown in be with precipitous variation, so the stability of this micro sensing amplifier further reduces.
In order to improve the stability of sensor amplifier, conventional sense amplifier driving circuit can constitute like this,, provides the double-sensing strobe pulse by two or more transistorized sequential operation that is.But,, make control become very complicated and difficult owing to must control a large amount of transistors in this case.
In order to overcome above-mentioned shortcoming, to driving sensor amplifier SA
1-SA
NMOS transistor Q1, the scale of Q2 divide, and these isolated M OS transistor is connected respectively to each sensor amplifier, this can be referring to Figure 1B.
Then, in this class sense amplifier driving circuit, owing to have a large amount of sensor amplifiers, node LAp, LA
NStray capacitance increase, sensing speed reduces as a result, and makes the formation of the layout of circuit and the double-sensing slope difficulty that becomes.Except a plurality of driving transistors Q1 are arranged
1-Q1
n, Q2
1-Q2
nBe connected respectively to sensor amplifier SA
1-SA
NOutside, the circuit of this sense amplifier driving circuit shown in Figure 1B and Figure 1A is similar.That is, with the sensor amplifier driving P-MOS transistor Q1 of distribution mode configuration
1-Q1
nWith sensor amplifier driving N-MOS transistor Q2
1-Q2
nBe connected to public node LAp, the LA of latching
NAnd between end points Vcc, the Vss.
Therefore when driving sensor amplifier, if the row address selecting way signal RAS of Fig. 2 becomes low level, P-MOS transistor Q1
1-Q1
nWith N-MOS transistor Q2
1-Q2
nBy through phase inverter INV1 and INV2 conversion efficient recovery enabling signal Φ sp and sense enable signal Φ sn conduction and cut-off arranged, control the operation of sensor amplifier thus.
So, when driving sensor amplifier, transistor Q1
1-Q1
nOr Q2
1-Q2
nTherefore the peak point current that conducting simultaneously so that generation suddenly increase, latchs node LAp, LA
NCurrent potential undergo mutation.Thereby the stability of micro sensing amplifier is worsened.
In addition, since the sensor amplifier driving transistors disposes with distribution mode in memory cell array, because the increase of circuit layout difficulty and chip area, this device is difficult to adopt can be by the sensing scheme of the drive sensor amplifier with diclinic rate.Shown in the sequential chart of conventional sense amplifier driving circuit among Fig. 2, the peak value of drive signal current Icc and Iss is very big, and drive signal Φ LAp and Φ LA
NChange in voltage very rapid.
As mentioned above, there is shortcoming in conventional sense amplifier driving circuit, in the driving operating period of sensor amplifier, and especially when the conducting driving transistors, drive signal Φ LAp and Φ LA
NCurrent peak very big, the variation of driving voltage is very rapid, therefore because the stray capacitance increase makes sensing speed become very slow, circuit layout becomes difficulty, and forms the double-sensing slope difficulty that also becomes.
The present invention attempts to overcome the shortcoming of above-mentioned custom circuit.
So, an object of the present invention is to provide a kind of sense amplifier driving circuit, in this driving circuit the grid voltage of driving transistors at the transistor duration of work by comprising the bias circuit controls that forms the MOS transistor of mirror image circuit with driving transistors, driving transistors conducting lentamente like this, drive signal Φ LAp and Φ LA
NCan have linear the rising or the linear slope that descends respectively, reduce the peak point current of drive signal thus, and improve the stability of micro sensing amplifier.
Another object of the present invention provide a kind of sensor amplifier have efficient recovery to drive during, the external voltage Vcc of memory cell array is clamped on inner level (about 4 volts), can prevent the sense amplifier driving circuit that the characteristic of this cell arrangement degenerates thus.
The present invention also has in addition a purpose to provide a kind ofly only to start when effective reset mode, eliminate thus because of using the sense amplifier driving circuit of the issuable additional bypass electric current of internal voltage generating circuit in the routine techniques.
The present invention also has a purpose to provide a kind of two image electric current circuit that drive in a sequential manner that wherein form in addition, so that the sensor amplifier drive signal can have the bilinearity slope, make it can fast and stable ground drive the sense amplifier driving circuit of sensor amplifier thus.
In order to achieve the above object, according to the embodiment of the invention, by a kind of sense amplifier driving circuit that is used for driving each a plurality of sensor amplifier of forming by two P-MOS transistors and two N-MOS transistors, it comprises receiving efficient recovery enabling signal Φ sp to be arranged and produce by its input end that efficient recovery drive signal Φ LAp's have an efficient recovery driving circuit, described have the efficient recovery driving circuit to be connected between described sensor amplifier and the power end Vcc, also comprises being used for receiving sense enable signal Φ by its input end
SNWith generation sensing drive signal Φ LA
NThe sensing driving circuit, described sensing driving circuit is connected between sensor amplifier and the earth terminal Vss, it is characterized in that:
Described have the efficient recovery driving circuit to comprise:
Contain one or more driving P-MOS transistors and another is used to regulate the transistorized image electric current circuit of P-MOS of drive transistor current size;
Contain P-MOS transistor and N-MOS transistor, be used for according to the negative circuit that efficient recovery enabling signal Φ sp control image electric current circuit operation is arranged; And
As the constant current source of described image electric current circuit, and by its grid reception bias voltage, its drain electrode is connected to the transistorized source electrode of negative circuit N-MOS, and its source electrode is connected to the N-MOS transistor of earth terminal Vss;
Thereby the current potential that control has efficient recovery drive signal Φ LAp is so that the waveform of signal Phi LAp has the linear rate of rise,
Described sensing driving circuit comprises:
Contain one or more driving N-MOS transistor and another is used to regulate the transistorized image electric current circuit of N-MOS of drive transistor current size;
Contain N-MOS transistor and P-MOS transistor, be used for negative circuit according to sense enable signal Φ control image electric current circuit operation, and
As the constant current source of described image electric current circuit, and by its grid lead wire reception bias voltage Vbias, its source electrode is connected to described negative circuit P-MOS transistor drain, and its drain electrode is connected to the P-MOS transistor of external power supply end Vcc,
Control sensing drive signal Φ LA whereby
NCurrent potential so that signal Phi LA
NWaveform have linear descending slope.
According to another embodiment of the present invention, provide a kind of sense amplifier driving circuit that is used to drive a plurality of sensor amplifiers, it comprises purchasing and one or morely is connected that driving P-MOS between sensor amplifier and the external power source end Vcc is transistorized an efficient recovery driving circuit that described sense amplifier driving circuit comprises:
Be used for forming the P-MOS transistor of image electric current circuit and comprising a P-MOS transistor and a N-MOS transistor is used for according to the negative circuit that efficient recovery enabling signal Φ sp control image electric current circuit working is arranged by being connected to described driving P-MOS transistor gate with described driving P-MOS transistor, and be used for receiving that bias voltage Vbias and its drain electrode end are connected to negative circuit N-MOS transistor source and source electrode is connected to the N-MOS transistor of earth terminal and forms as the constant current source of described image electric current circuit and by its grid, be used to regulate the biasing circuit of the transistorized strength of current of the described P-MOS of driving;
Form by differential amplifier circuit and constant current source, be used for detecting the voltage V that sensor amplifier latchs node
CAPAnd with testing result and reference voltage V
REFThe comparator circuit of comparing; And
Be used for the biasing circuit triggering is exported the trigger circuit that excite or disconnect biasing circuit for high or low state so that respond comparator circuit,
Whereby effective recovery voltage is clamped to constant level (about 4V) builtin voltage and no matter externally fed voltage.
According to another embodiment of the present invention, a kind of sense amplifier driving circuit that is used to drive a plurality of sensing dischargers is provided, it comprises disposing and a plurality ofly is connected that driving P-MOS between external electric pressure side Vcc and the described sensor amplifier is transistorized an efficient recovery driving circuit that described sense amplifier driving circuit comprises:
Form the first image electric current circuit is connected to described drive transistor gate with the strength of current of regulating this driving transistors and its grid and source electrode a P-MOS transistor with described driving transistors;
Its drain electrode is connected on drive transistor gate and the transistorized source electrode of a described P-MOS and receives first by its grid has efficient recovery to start the N-MOS transistor of clock Φ sp1;
Form, be used for first constant current source by the 3rd N-MOS transistor that is connected on the transistorized source electrode of a N-MOS by its grid reception bias voltage Vbias and its drain electrode as the stabilized power source source of the described first image electric current circuit;
Form the second image electric current circuit and its canopy utmost point and source electrode with described driving transistors and be connected to the 2nd P-MOS transistor on the described drive transistor gate;
Its drain electrode is connected on drive transistor gate and the transistorized source electrode of described P-MOS and receives second at its grid has efficient recovery to start the 2nd N-MOS transistor of clock signal Φ sp2;
Form, be used for second constant current source by the 4th N-MOS transistor that is connected to described the 2nd N-MOS transistor source by grid reception bias voltage Vbias and drain electrode as the second image electric current circuit constant current source; And
Be connected to drive transistor gate, be used to receive first and second and efficient recovery enabling signal Φ sp1, Φ sp2 arranged and export drive controlling clock Φ by the 3rd P-MOS transistor
ENOR-gate.
The sequence starting first and second image electric current circuit are so that there is efficient recovery drive signal Φ LAp to have the bilinearity slope whereby.
According to another embodiment of the present invention, a kind of sense amplifier driving circuit that is used to drive a plurality of sensor amplifiers is provided, it comprises and disposes one or more transistorized sensing driving circuits of N-MOS that are connected between sensor amplifier and the earth terminal Vss that described sense amplifier driving circuit comprises:
Form the first image electric current circuit with described driving transistors and be connected to a N-MOS transistor on described driving N-MOS transistor grid with the strength of current of regulating described driving transistors and its grid and drain electrode;
Its source electrode is connected on the grid of described driving transistors and the described N-MOS transistor drain and by its grid and receives the first sense enable signal Φ
SN1A P-MOS transistor;
Form, be used for first constant current source by the 3rd P-MOS transistor that reception bias voltage and its source electrode are connected on the described P-MOS transistor drain as the constant current source of the described first image electric current circuit;
Form the second image electric current circuit and its grid and drain electrode with described driving transistors and be connected to the 2nd N-MOS transistor on described driving N-MOS transistor grid;
Its source electrode is connected on the grid of described driving transistors and described the 2nd N-MOS transistor drain and receives second sensing and starts clock Φ
SN2The 2nd P-MOS transistor,
Form, be used for second constant current source by the 4th P-MOS transistor that is connected on described the 2nd P-MOS transistor drain by its grid reception bias voltage Vbias and its source electrode as the constant current source of the described second image electric current circuit; And
Receive drive controlling clock Φ
EN, and its source ground and drain electrode be connected to the 3rd N-MOS transistor on the described drive transistor gate,
The described first and second image electric current circuit of sequence starting are so that sensing drive signal Φ LA whereby
NHas the bilinearity slope.
Above-mentioned purpose of the present invention and other advantage are described in detail most preferred embodiment of the present invention by the reference accompanying drawing and can become more obvious, in the accompanying drawing:
Fig. 1 is the circuit diagram of conventional sense amplifier driving circuit;
Fig. 2 is the sequential chart of the conventional drive signal that sense amplifier driving circuit produces of Fig. 1;
Fig. 3 is the circuit diagram according to sense amplifier driving circuit first embodiment of the present invention;
Fig. 4 is the sequential chart of the drive signal that produces in Fig. 3 sense amplifier driving circuit;
Fig. 5 illustrates the schematic block diagram of sense amplifier driving circuit second embodiment of the present invention, wherein to there being the efficient recovery drive signal to carry out clamp;
Fig. 6 is the detailed circuit diagram according to sense amplifier driving circuit second embodiment of the present invention shown in Figure 5;
Fig. 7 is similar to Fig. 6 second embodiment circuit but the detailed icon of the circuit revised slightly;
Fig. 8 is the sequential chart of drive signal that second embodiment of the invention produces;
Fig. 9 is circuit diagram and the sequential chart according to sense amplifier driving circuit the 3rd embodiment of the present invention, wherein forms the diclinic rate when effective recovery operation; And
Figure 10 is according to circuit diagram and the sequential chart of sense amplifier driving circuit the 4th embodiment of the present invention, wherein forms the double-sensing slope.
With reference to Fig. 3 A and 3B, below to being described according to sense amplifier driving circuit first embodiment of the present invention.
According to Fig. 3 A, a large-scale P-MOS transistor Q10 and a large-scale N-MOS transistor Q20 are connected respectively to N sensor amplifier SA
1-SA
NLatch node LAp, LA
NAccording to Fig. 3 B, except being divided into the individual a plurality of P-MOS transistor Q10 of N
1-Q10
nWith a plurality of N-MOS transistor Q20
1-Q20
n(replacing single P-MOS transistor and single N-MOS transistor among Fig. 3 A) is respectively by N sensor amplifier SA
1-SA
NLatch node LAp, LA
NConnect with distribution mode, this circuit is identical with the circuit of Fig. 3 A.
In the circuit of Fig. 3 A and Fig. 3 B, each sensor amplifier SA
1-SA
NForm by two P-MOS transistors and two N-MOS transistors.Sensor amplifier latch node LAp, LA
NBy described driving P-MOS transistor or transistor Q10 or Q10
1-Q10
nWith N-MOS transistor or transistor Q20 or Q20
1-Q20
nBe connected respectively to Vcc and Vss.
In addition, provide a grid and source electrode to be connected to described driving P-MOS transistor Q10 or Q10
1-Q10
nThe P-MOS transistor Q11 of grid so that form the image electric current circuit, during effectively the resuming work of described sensor amplifier, regulate described driving transistors or transistor Q10 or Q10 thus with described driving P-MOS transistor
1-Q10
nStrength of current.
The grid of described transistor Q11 and source electrode are connected to the output terminal of the negative circuit of being made up of P-MOS transistor Q12 and N-MOS transistor Q13, and like this, above-mentioned image electric current circuit will be by there being efficient recovery enabling signal Φ sp to operate control.The source electrode of N-MOS transistor Q13 is connected to the N-MOS transistor Q14 as image electric current circuit constant current source.
Described N-MOS transistor Q14 receives bias voltage Vbias by its grid, and its source electrode is connected to earth terminal Vss, and the drain electrode of described P-MOS transistor Q11, Q12 also is connected to power supply contact Vcc.
Simultaneously, the image electric current circuit needs constant current source, forms like this according to constant current source of the present invention, even the grid voltage Vbias of MOS transistor Q14 has the intermediate level between Vcc and Vss, and is proportional to Vcc.
The operation of the sense amplifier driving circuit of forming as mentioned above is described below.
During this sensor amplifier is effectively resumed work, if becoming low level, rwo address strobe signals RAS is in effective circulation, the efficient recovery enabling signal Φ sp that has that then is input to negative circuit is decided to be high level, and P-MOS transistor Q12 will end, and N-MOS transistor Q13 is with conducting.
Therefore, the output of negative circuit causes the P-MOS transistor Q11 conducting of image electric current circuit, driving transistors Q10 or Q10 in low level
1-Q10
nAlso conducting, thus the electric current I p of steering transistor Q11 is to constant current source Q14.
Like this, be set in medium voltage between high level and the low level at the signal Phi LApc of node LApc, it is less than [Vcc-Vth], thus driving transistors Q10 or Q10
1-Q10
nConducting lentamente, wherein Vth is the threshold voltage of driving transistors.
That is, be disposed at the driving transistors Q10 or the Q10 of node LAp one side
1-Q10
nAssemble to form image electric current circuit, driving transistors Q10 or Q10 thus with P-MOS transistor Q11
1-Q10
nStrength of current will be proportional to the strength of current of P-MOS transistor Q11.
Therefore, during effectively resuming work, saving land corresponding to each transistorized adjustable size provides efficient recovery drive signal Φ the peak point current of LAp, and the current potential of node LAp will change with linear forms, so that the stability of height micro sensing amplifier improves.
In a similar fashion, at the sensing duration of work of sensor amplifier, be connected to sensor amplifier driving N-MOS transistor Q20 or Q20 by grid and source electrode with N-MOS transistor Q15
1-Q20
nGrid, it and described driving N-MOS transistor forms the image electric current circuit by this way, thereby regulate the strength of current of driving transistors.
And the grid of transistor Q15 and drain electrode are connected to the output terminal of the negative circuit of being made up of N-MOS transistor Q16 and P-MOS transistor Q17, by this way according to sense enable signal Φ
SNThe work of control image electric current circuit.
The drain electrode of P-MOS transistor Q17 is connected to the P-MOS transistor Q18 that is used as image electric current circuit constant current source.The grid of P-MOS transistor Q18 is set the bias voltage that is received as intermediate level between Vcc and the Vss, and the drain electrode of transistor Q18 is set and received external power source terminal voltage Vcc, and the source electrode of N-MOS transistor Q15, Q16 is connected to earth terminal Vss.
The sensing of foregoing circuit drives operation and carries out as follows.With reference to Fig. 4, if rwo address strobe signals RAS becomes low level, be indicated as the valid function process, then be input to the sense enable signal Φ of negative circuit
SNAlso be set to low level, thereby N-MOS transistor Q16 is ended, P-MOS transistor Q17 conducting.Thus, the output terminal of negative circuit is with the output of high level form, so that the N-MOS transistor Q15 conducting of image electric current circuit, driving transistors Q20 or Q20
1-Q20
nAlso conducting.
In this way, driving transistors Q20 or Q20
1-Q20
nStrength of current be proportional to the strength of current of transistor Q15, make the slow conducting of driving transistors.
Driving transistors Q20 or Q20
1-Q20
nConstitute with the formation of image electric current circuit with N-MOS transistor Q15, by this way driving transistors Q20 or Q20
1-Q20
nStrength of current be proportional to N-MOS transistor Q15 strength of current.
As a result, during sensing operation, regulate sensing drive signal QLA according to each transistorized dimensional ratios
NPeak point current, node LA
NThe current potential linear change.Therefore the stability of miniature high density semiconductor memory is improved.
If in Fig. 3 A and Fig. 3 B, constitute the transistor Q10 of image electric current circuit, Q10
1-Q10
nQ20, Q20
1-Q20
n, the channel width/length separately of Q11 and Q15 is by W10/Lp, W10
1/ Lp-W10
n/ Lp, W20/Ln, W20
1/ Ln-W20
n/ Ln, W11/Lp and W15/Ln represent, and if during the image electric current circuit working, flow through transistor Q11, the electric current of Q15 is with Ip, I
NExpression then has efficient recovery and sensing drive signal Φ LAp, Φ LA
NElectric current I cca, Issa establish an equation under depending on:
Icca= (W10)/(W11) ×I
P= (W10
1+W10
2+W10
3+……W10n)/(W11) ×I
P[1]
Issa= (W20)/(W15) ×I
N= (W20
1+W20
2+W20
3+……W20
n)/(W15) ×I
N[2]
In formula [1] and [2], there are the peak point current Iccap of efficient recovery and sensing drive signal and Issap to determine as can be seen by each transistorized dimensional ratios.
Therefore, driving transistors Q10 or Q10
1-Q10
nAnd Q20 or Q20
1-Q20
nStrength of current be proportional to the transistor Q11 that forms the image electric current circuit with it together, the strength of current of Q15.
As shown in Figure 4, with custom circuit shown in Figure 2 relatively, except efficient recovery and sensing drive signal Φ LAp, Φ LA being arranged what latch node
NPeak point current reduce only about half of beyond, identical according in the sensor amplifier control clock signal sequence of sense amplifier driving circuit of the present invention and the conventional sensor amplifier, and efficient recovery and sensing drive signal Φ LAp, Φ LA arranged according to of the present invention
NCurrent potential be linear change.
Fig. 5 to Fig. 8 is circuit diagram and the sequential chart of sense amplifier driving circuit second embodiment of the present invention, wherein has the efficient recovery drive signal to be clamped on builtin voltage level (about 4V).
In high density semiconductor memory, be necessary that recovery voltage with storage unit is clamped on builtin voltage and no matter external voltage.In order to meet this requirement, the present invention includes the comparator circuit of forming by the differential amplifier of working with the image electric current circuit.
As shown in Figure 5 and Figure 6, second embodiment of sense amplifier driving circuit of the present invention constitutes as described below.
Sensor amplifier SA
1-SA
NA plurality of P-MOS transistors be connected to and latch node LAp, driving transistors Q10 also is connected to the there, the drain electrode of driving transistors Q10 is connected to external power source contact Vcc.
Further comprise biasing circuit 10 according to sense amplifier driving circuit of the present invention, trigger circuit 20 and comparator circuit 30.
More particularly, the grid of the driving transistors Q10 of Fig. 6 is connected to biasing circuit 10, and the grid voltage of controlling and driving transistor Q10 by this way is so that there is efficient recovery drive signal Φ LAp to have the linear rate of rise.
The biasing circuit 10 that is used to regulate the strength of current of driving transistors Q10 comprises: be connected to driving transistors Q10 grid so that form the P-MOS transistor Q11 of image electric current circuit with described driving transistors Q10; Be connected to the source electrode of transistor Q11 and grid, form, be used to control the negative circuit of the operation of image electric current circuit by P-MOS transistor Q12 and N-MOS transistor Q13; Be connected to the N-MOS transistor Q13 of described negative circuit source electrode, be used for N-MOS transistor Q14 as the constant current source of image electric current circuit.
Transistor Q11, the drain electrode of Q12 is connected to external power source end Vcc, and the grid of transistor Q14 receives bias voltage Vbias, and its source electrode is connected to earth terminal Vss.
According to the output of comparator circuit, biasing circuit 10 triggered to high state or low state comprise with conducting or by the trigger circuit 20 of biasing circuit 10: drain electrode is connected to the P-MOS transistor Q21 on the external voltage Vcc; The drain electrode of grid is connected respectively to the grid of transistor Q21 and the N-MOS transistor Q22 of source electrode; Source electrode, the source electrode that drain electrode is connected to N-MOS transistor Q22 is connected to the N-MOS transistor Q23 of earth terminal Vss; Input end is connected to the source electrode of transistor Q21 and drain electrode, another input end of transistor Q22 receives the Sheffer stroke gate NAND that starts clock signal Φ s; And the phase inverter INV3 that is connected to described Sheffer stroke gate output terminal.
Detect the voltage V that sensor amplifier latchs node
LAP, with this voltage and reference voltage V
REFRelatively and the comparator circuit 30 of exporting the result comprise: constant current source Q35 and by two P-MOS transistor Q31, Q33 and two differential amplifier circuits that N-MOS transistor Q32, Q34 form.With reference voltage V
REFOffer the grid of transistor Q32, and latch the voltage V of node
LAPOffer the grid of transistor Q34.
Constitute as mentioned above, realize that second embodiment to the sense amplifier driving circuit of the present invention of effective recovery voltage clamp function describes its operation referring now to the waveform of Fig. 8.
If the startup clock Φ s of sense amplifier driving circuit is a high level, comparator circuit 30 output low level signals then, this signal change high level during by trigger circuit 20 into.Like this, with the described the same manner of Fig. 3, high level signal is input to biasing circuit 10 so that slow conducting driving transistors Q10, final thus conducting sensor amplifier SA
1-SA
N
In this state, there is the voltage linear of efficient recovery drive signal Φ LAp to rise, if this voltage reaches and reference voltage V
REFSame level, then by transistor Q31, Q33, Q32, the comparator circuit output high level signal that Q34 and Q35 form, and described trigger circuit 20 output low level signals.The result has efficient recovery enabling signal Φ sp to be under an embargo, so driving transistors ends.
This shows, detect the voltage of Φ LAp by detection line, and the voltage of LAp with have built-in potential V
INTReference voltage V
REFCompare mutually.If the voltage of node LAp is lower than reference voltage V
REF, then starting has efficient recovery enabling signal Φ sp, so that slow conducting sensor amplifier driving transistors, and if the voltage of node LAp is equal to or greater than reference voltage V
REF, then comparator circuit 30 is exported high level signals, and this conversion of signals is a low level signal after the process trigger circuit.Therefore, forbid having efficient recovery enabling signal Φ sp to cause ending of driving transistors, thereby shown in oscillogram among Fig. 8, will have efficient recovery drive signal Φ LAp to be clamped on the builtin voltage level.That is, there is efficient recovery drive signal Φ LAp to remain on reference voltage V
REFLevel.
Fig. 7 illustrates the practical circuit that is used for the effective recovery voltage of clamp according to of the present invention, and shows the minor modifications to Fig. 5 and Fig. 6 sense amplifier driving circuit.
In Fig. 7, element numerals 30 expression comparator circuits, 40 expression trigger circuit, 50 expression biasing circuits, 60 expression level translators.
Comparator circuit 30 is with the form formation same with Fig. 6, and trigger circuit 40 comprise a converter of being made up of two transistor Q41, Q42.
Biasing circuit 50 comprises two transistor Q51, Q52 that form current source, also comprise the image electric current circuit of forming by two transistor Q51, Q52 and driving transistors Q50, this is the feature that is different from Fig. 6 circuit, and biasing circuit 10 comprises the image electric current circuit of being made up of driving transistors Q10 and Q11 in Fig. 6.Except top mentioned, identical among other unit of all of Fig. 7 circuit and Fig. 6.
So Fig. 7 sense amplifier driving circuit is almost to operate with the same mode of Fig. 6 circuit.That is s is a high level if sense amplifier driving circuit starts clock Φ, and then this voltage of signals level is identical with the builtin voltage level, and by level translator 60 it is pulled to external voltage level Vcc, and transistor Q61 is ended.
Sense amplifier driving circuit starts the transistor Q35 that clock Φ s is input to the constant current source that forms comparator circuit 30, and the output of comparator circuit 30 is converted to low level like this.The low level of comparator circuit 30 is input to the phase inverter of trigger circuit 40, and to be converted to high state signal, this high state signal is input to biasing circuit 50 to trigger value circuit 50 partially.
Therefore, node LA as shown in Figure 8
PGCurrent potential be an intermediate level, driving transistors Q50 will rise to reference voltage V lentamente like this
REFThat is, control the driving transistors Q50 that makes steady current flow through sensor amplifier in such a way by transistor Q51, Q52.
As the circuit among Fig. 3, in this circuit, constitute constant current source like this so that have as the grid voltage Vbias of the MOS transistor Q55 of constant current source and to be proportional to Vcc level and the intermediate level between Vcc and Vss, so steady current flows through the image electric current circuit.
Yet, in conventional art, realize for the stability of improving sensor amplifier and sensing sensitivity diclinic rate sensing and effectively recovery operation be difficult, that is, therefore the sensor amplifier driving transistors is configured in the storage array with diffusion mode, adopts the diclinic rate method difficulty that becomes from circuit layout and chip size aspect.
In order to overcome such problem, the present invention uses two or more image electric current circuit in such a way, and each image electric current circuit is excited in proper order, therefore might take the method for diclinic rate.
Fig. 9 and Figure 10 illustrate the circuit diagram and the sequential chart of sense amplifier driving circuit of the present invention, wherein form the diclinic rate when carrying out sensing and effective recovery operation.
In Fig. 9, provide with driving the P-MOS transistor Q111 that P-MOS transistor Q110 forms the first image electric current circuit, so that regulate the strength of current of driving transistors Q110, the grid of transistor Q111 and source electrode are connected to the grid of driving transistors Q110.Other has a P-MOS transistor Q114 to be connected to the grid of driving transistors Q110 and grid and the source electrode of transistor Q111, makes transistor Q114 form the second image electric current circuit with described driving transistors Q110 thus.
And a N-MOS transistor Q112 is connected to grid and the source electrode of the transistor Q111 of the grid of described driving transistors Q110 and the first image electric current circuit, and first have efficient recovery to start the grid that clock signal Φ sp1 is added to transistor Q112.The source electrode of the one N-MOS transistor Q112 is connected to another N-MOS transistor Q113, and this transistor Q113 forms constant current source and is received as the bias voltage of the intermediate level between Vcc and the Vss by its grid.
The 2nd N-MOS transistor Q115 is connected to grid and the source electrode of the transistor Q114 of the grid of driving transistors and the second image electric current circuit, and second have efficient recovery to start clock signal Φ
Sp2Be input to the grid of transistor Q115.The source electrode of the 2nd N-MOS transistor Q115 is connected to N-MOS transistor Q116, and the grid of transistor Q116 is received as the bias voltage of the intermediate level between Vcc and the Vss and forms a constant current source.
Be connected with a transistor Q117 between the grid of the grid of driving transistors Q110 and P-MOS transistor Q111 and source electrode, its drain electrode is connected to external power source end Vcc, and its grid receives from the drive controlling clock Φ of OR-gate OR output
ENIn addition, two input ends of OR-gate OR receive first and second respectively has efficient recovery to start clock signal Φ sp1, Φ sp2.
This shows that during effective recovery operation, if rwo address strobe signals RAS is a low level, then it is in effective circulation, first has efficient recovery startup clock signal Φ sp1 to be set to high level then.As a result, transistor Q117 ends, transistor Q114, and the transistor Q111 conducting of the transistor Q112 and the first image electric current circuit makes driving transistors Q110 conducting thus.
In this case, the current potential of node LAp begins slow rising, through after cycle regular hour, when second has efficient recovery startup clock signal Φ sp to reach high level, form the transistor Q115 conducting of the second image electric current circuit with transistor Q114, so that the strength of current that flows through driving transistors Q110 increases, and drives sensor amplifier with stable and immediate mode thus.The sensing driving circuit of Figure 10 also to constitute with the similar form of Fig. 9 circuit, wherein is formed with the double-sensing slope.
That is, another N-MOS transistor Q121 is provided in such a way, it forms the first image electric current circuit with driving N-MOS transistor Q120, therefore the strength of current that flows through sensor amplifier driving transistors Q120 is adjusted, yet for same purpose, the grid of transistor Q121 and drain electrode are connected to the grid of driving transistors Q120.
In addition, provide a N-MOS transistor Q124 by this way, promptly it is connected to grid and the drain electrode of the grid and the transistor Q121 of driving transistors, so transistor Q124 forms the second image electric current circuit with driving transistors.
Have, a P-MOS transistor Q122 is connected to grid and the drain electrode of the transistor Q121 of the grid of driving transistors and the first image electric current circuit again, and first sensing starts clock signal Φ
SN1Be input to the grid of transistor Q122.
In addition, the 2nd P-MOS transistor Q125 is connected in the drain electrode and grid of transistor Q124 of the grid of driving transistors and the second image electric current circuit, and second sensing starts clock signal Φ simultaneously
SN2Be input to the grid of transistor Q125.
And the drain electrode of the 2nd P-MOS transistor Q125 is connected to P-MOS transistor Q126, and the grid of transistor Q126 is received as the bias voltage of the intermediate level between external voltage Vcc and the ground voltage Vss.The grid of the grid of driving transistors Q120 and N-MOS transistor Q121, Q124 and drain electrode also are connected to transistor Q127, and the source electrode of transistor Q127 is connected to earth terminal Vss, and its grid receives drive controlling clock Φ
EN
This shows that during sensing operation, if rwo address strobe signals RAS is a low level so that be in effective circulation, first sensing starts clock signal Φ
SN1Become low level, drive controlling clock Φ
ENAlso become low level, so transistor Q127 ends transistor Q122 conducting.
Thereby high level signal is input to the grid of driving transistors Q120, the first image electric current circuit transistor Q124 and transistor Q121, causes transistor Q121, Q120 conducting, Φ LA
NCurrent potential at first begin to descend lentamente.The process certain hour is after the cycle, when second sensing starts clock Φ
SN2When becoming, form the transistor Q124 conducting of the second image electric current circuit, cause the strength of current of driving transistors Q120 to increase, therefore make it can be with quick and stable manner drives sensor amplifier with transistor Q125 to low level.
Simultaneously, if in Fig. 9 and Figure 10, form the image electric current circuit transistor Q110, Q111, Q114, Q120, Q121, and the channel width of Q124 represent with W110, W111, W114, W120, W121 and W124 respectively, and with I
P1, I
P2, I
N1And I
N2Represent to flow through during the image electric current circuit working electric current of transistor Q111, Q114, Q121 and Q124 respectively, efficient recovery drive signal and sensing drive signal Φ LAp are then arranged, Φ LA
NHaving the electric current that produces during efficient recovery and the sensing operation to depend on following equation:
Icca＝ (W110)/(W111+W114) ×（I
P1+I
P2）[3]
Issa＝ (W120)/(W121+W124) ×（I
N1+I
N2）[4]
By above equation [3] and [4] as seen, determine according to the strength of current of the transistorized size ratio and the first image electric current circuit at the peak current value that the drive signal that produces during efficient recovery and the sensing operation is arranged.At first start the first image electric current circuit and set its second image electric current circuit little than startup afterwards.Successively start the first and second image electric current circuit by this way so that efficient recovery drive signal Φ LAp is arranged and sensing drive signal Φ LA
NHave the Linear Double slope, thereby make it drive sensor amplifier with quick and stable manner.
According to the present invention described above, in the sensor amplifier driving transistors operating period of semiconductor memory, the grid voltage of driving transistors is by comprising the bias circuit controls of forming the MOS transistor of image electric current circuit with driving transistors.
As a result, driving transistors is conducting lentamente, has efficient recovery and sensing drive signal should have the linear slope that rises or descend respectively like this.This causes the peak point current of drive signal to descend, the sense amplifier driving circuit that makes it possible to provide the stability of micro sensing amplifier to be improved thus.
In addition, sense amplifier driving circuit disposes the image electric current circuit of two sequence startings, therefore can obtain with Linear Double slope form.
Moreover biasing circuit disposes the clamp circuit that comprises comparator circuit, therefore can will have the efficient recovery drive signal to be clamped on builtin voltage level (being about 4V), thereby prevent the battery apparatus characteristic distortion.
And, according to the present invention, only effective recovery operation is started, therefore form the sense amplifier driving circuit of eliminating the extra current of following conventional internal voltage generating circuit.
Claims (17)
1, a kind of sense amplifier driving circuit that is used to drive a plurality of sensor amplifiers, described each sensor amplifier is made up of two P-MOS transistors and two N-MOS transistors, and this sense amplifier driving circuit comprises:
One be used for by its input end receive efficient recovery enabling signal φ sp is arranged and produce one efficient recovery drive signal φ LAp arranged the efficient recovery driving circuit arranged, described have the efficient recovery driving circuit to be connected between described sensor amplifier and the power end Vcc,
One is used for receiving sense enable signal φ SN and producing the sensing driving circuit of a sensing drive signal φ LAN by its input end, and described sensing driving circuit is connected between sensor amplifier and the earth terminal Vss,
It is characterized in that:
Described have the efficient recovery driving circuit to comprise:
One contains one or more driving P-MOS transistors and another and is used to regulate the transistorized image electric current circuit of P-MOS of drive transistor current amount,
A basis has the negative circuit of the operation of efficient recovery enabling signal φ sp control image electric current circuit, and described negative circuit comprises a P-MOS transistor and a N-MOS transistor,
A N-MOS transistor, it receives bias voltage Vbias as the constant current source of described image electric current circuit and by its grid, and its drain electrode is connected to the transistorized source electrode of negative circuit N-MOS, and source electrode is connected to earth terminal Vss,
Control has the current potential of efficient recovery drive signal φ LAp to make the waveform of signal psi LAp have the linear slope that rises thus,
Described sensing circuit comprises:
Comprise the transistorized image electric current circuit of N-MOS that one or more driving N-MOS transistor and another are used to regulate the magnitude of current of driving transistors,
One contain a N-MOS transistor and a P-MOS transistor, according to the negative circuit of sense enable signal φ sN control image electric current circuit working, and
One receives as the constant current source of described image electric current circuit and by its grid that bias voltage Vbias, its source electrode are connected to the described circuitry phase P-MOS of institute transistor drain, drain electrode is connected to external power source end V
CCThe P-MOS transistor,
The current potential of controlling sensing drive signal φ LAN thus makes the waveform of signal psi LAN have the linear slope that descends.
2, sense amplifier driving circuit as claimed in claim 1 is characterized in that: be added to bias voltage Vbias as the described MOS transistor grid of the constant current source of described image electric current circuit and remain on intermediate level between outer power voltage Vcc and the ground voltage Vss.
3, dispose the transistorized sense amplifier driving circuit that the efficient recovery driving circuit is arranged, be used to drive a plurality of sensor amplifiers of one or more driving P-MOS that is connected between sensor amplifier and the external power source end Vcc a kind of comprising, it comprises:
One contains the image electric current circuit that forms with described driving P-MOS transistor, is used for according to the transistorized grid voltage V of the efficient recovery enabling signal Φ sp described driving P-MOS of control is arranged
LAPGSo that regulate the biasing circuit of described transistorized strength of current,
Form by differential amplifier circuit and constant current source for one, be used for detecting the voltage V that sensor amplifier latchs node
LAPAnd with testing result and reference voltage V
REFComparator circuit relatively, and
Be used for the biasing circuit triggering is exported the trigger circuit that excite or disconnect biasing circuit for high or low state so that respond comparator circuit,
To have whereby recovery voltage be clamped to constant level (about 4V) builtin voltage and no matter externally fed voltage.
4, sense amplifier driving circuit as claimed in claim 3 is characterized in that: described biasing circuit contains:
A P-MOS transistor that is connected to described driving P-MOS transistor gate, is used for forming the mirror image circuit with described driving P-MOS transistor,
One comprise-the P-MOS transistor and-the N-MOS transistor, be used for according to the negative circuit that efficient recovery enabling signal Φ sp control image electric current circuit working is arranged, and
One be used for as the constant current source of described image electric current circuit and by its grid receive bias voltage Vbias, its drain electrode is connected to negative circuit N-MOS transistor source and source electrode is connected to the N-MOS transistor of earth terminal.
5, sense amplifier driving circuit as claimed in claim 3 is characterized in that: described biasing circuit comprises:
A grid is connected to the N-MOS transistor of external voltage Vcc with draining,
Drain electrode is connected to the transistorized source electrode of described N-MOS, grid and is connected to the P-MOS transistor that earth terminal Vss and source electrode are connected to the grid of described driving transistors,
Described N-MOS transistor and the described driving of P-MOS transistor AND gate P-MOS transistor form an image electric current circuit together,
A negative circuit of forming by a P-MOS transistor and a N-MOS transistor, and
One as the constant current source of described image electric current circuit and receive its drain electrode of bias voltage Vbias by its grid and be connected to the N-MOS transistor that the transistorized source electrode of negative circuit N-MOS, source electrode are connected to earth terminal.
6, as each described sense amplifier driving circuit in the claim 3,4 and 5, it is characterized in that: be input to bias voltage Vbias as the described MOS transistor grid of the constant current source of described image electric current circuit and remain on intermediate level between external voltage Vcc and the ground voltage Vss.
7, as each described sense amplifier driving circuit in the claim 3,4 and 5, it is characterized in that: the grid voltage of described driving transistors is changed to the intermediate level between external voltage Vcc and the ground voltage Vss during described sensor amplifier drives.
8, sense amplifier driving circuit as claimed in claim 3 is characterized in that: described trigger circuit can comprise:
A drain electrode is connected to the P-MOS transistor of external voltage Vcc,
A grid is connected respectively to a N-MOS transistor of transistorized grid of a described P-MOS and source electrode with draining,
Drain electrode is connected to the 2nd N-MOS transistor that the transistorized source electrode of a described N-MOS and source electrode are connected to earth terminal Vss,
A NOT-AND gate NAND one input end is connected to a transistorized source electrode of a described P-MOS and a described N-MOS transistor drain, and the other end receives the startup clock signal Φ s that is used to start sense amplifier driving circuit, and
A phase inverter INV3 who is connected to the output terminal of described Sheffer stroke gate NAND.
9, sense amplifier driving circuit as claimed in claim 3 is characterized in that: described trigger circuit can be by disposing a P-MOS transistor and the transistorized phase inverter of a N-MOS is formed.
10, sense amplifier driving circuit as claimed in claim 3 is characterized in that: described comparator circuit comprises:
One by two P-MOS transistors and two differential amplifier circuits that the N-MOS transistor is formed,
One is connected to the transistorized source electrode of described N-MOS of described differential amplifier circuit and passes through the constant current source that its grid receives drive controlling clock Φ s,
Described comparator circuit can relatively be input to the reference voltage V of the grid of one of described N-MOS transistor
REFWith the voltage V that is input to another described N-MOS transistor gate
LAP(voltage of node LAp).
11, as any one described sense amplifier driving circuit in the claim 3,4,5,8,9 and 10, it is characterized in that: reference voltage V
REFThe voltage V that latchs node LAp with described sensor amplifier
CAPWhen effective recovery operation, compare mutually, if voltage V
CAPBe equal to or greater than reference voltage, the operation that stops the image electric current circuit is to be clamped to constant level with effective recovery voltage.
12, a kind of sense amplifier driving circuit that is used to drive a plurality of sensing dischargers, it comprises disposing and a plurality ofly is connected that driving P-MOS between external electric pressure side Vcc and the described sensor amplifier is transistorized an efficient recovery driving circuit that described sense amplifier driving circuit comprises:
Form the first image electric current circuit with described driving transistors and be connected to a P-MOS transistor of described drive transistor gate with the strength of current of regulating this driving transistors and its grid and source electrode,
Its drain electrode is connected on drive transistor gate and the transistorized source electrode of a described P-MOS and receives first by its grid has efficient recovery to start clock Φ
Sp1A N-MOS transistor,
Form, be used for first constant current source by the 3rd N-MOS transistor that is connected on the transistorized source electrode of a N-MOS by its canopy utmost point reception bias voltage Vbias and its drain electrode as the constant current source of the described first image electric current circuit,
Form the second image electric current circuit and its canopy utmost point and source electrode with described driving transistors and be connected to the 2nd P-MOS transistor on the described drive transistor gate,
Its drain electrode is connected on drive transistor gate and the transistorized source electrode of described P-MOS and receives second at its grid has efficient recovery to start the 2nd N-MOS transistor of clock signal Φ sp2;
Form, be used for second constant current source by the 4th N-MOS transistor that is connected on described the 2nd N-MOS transistor source by grid reception bias voltage Vbias and drain electrode as the second image electric current circuit constant current source; And
Be connected to drive transistor gate, be used to receive first and second efficient recovery enabling signal Φ sp1, Φ sp2 and output drive controlling clock Φ are arranged by the 3rd P-MOS transistor
ENOR-gate.
The sequence starting first and second image electric current circuit are so that there is efficient recovery drive signal Φ LAp to have the bilinearity slope whereby.
13, sense amplifier driving circuit as claimed in claim 12 is characterized in that: be input to the constant voltage that remains on the intermediate level between external voltage and the ground voltage as the bias voltage of the transistorized grid of described third and fourth N-MOS of the described first and second image electric current circuit constant current sources.
14, as any one described sense amplifier driving circuit in claim 12 and 13, it is characterized in that: it is little that the electric current of the described first image electric current circuit is provided with than the described second image electric current circuit.
15, a kind of sense amplifier driving circuit that is used to drive a plurality of sensor amplifiers, it comprises and disposes one or more transistorized sensing driving circuits of N-MOS that are connected between sensor amplifier and the earth terminal Vss that described sense amplifier driving circuit comprises:
Form the first image electric current circuit with described driving transistors and be connected to a N-MOS transistor on described driving N-MOS transistor grid with the strength of current of regulating described driving transistors and its grid and drain electrode,
Its source electrode is connected on the grid of described driving transistors and the described N-MOS transistor drain and by its grid and receives the first sense enable signal Φ
SN1A P-MOS transistor,
Form, be used for first constant current source by the 3rd P-MOS transistor that reception bias voltage and its source electrode are connected on the described P-MOS transistor drain as the constant current source of the described first image electric current circuit,
Form the second image electric current circuit and its grid and drain electrode with described driving transistors and be connected to the 2nd N-MOS transistor on described driving N-MOS transistor grid,
Its source electrode is connected on the grid of described driving transistors and described the 2nd N-MOS transistor drain and receives second sensing and starts clock Φ
SN2The 2nd P-MOS transistor,
Form, be used for second constant current source by the 4th P-MOS transistor that is connected on described the 2nd P-MOS transistor drain by its grid reception bias voltage Vbias and its source electrode as the constant current source of the described second image electric current circuit; And
Receive drive controlling clock Φ
EN, and its source ground and drain electrode be connected to the 3rd N-MOS transistor on the described drive transistor gate,
Described first and second image electric current circuit of sequence starting so sensing drive signal Φ LA whereby
NHas the bilinearity slope.
16, sense amplifier driving circuit as claimed in claim 15 is characterized in that: be input to the transistorized bias voltage of third and fourth P-MOS as the described first and second image electric current circuit constant current sources and remain on the constant level into the intermediate level of external voltage Vcc and ground voltage Vss.
17, as any one described sense amplifier driving circuit in claim 15 and 16, it is characterized in that: the electric current of the described first image electric current circuit is set to littler than the electric current of the described second image electric current circuit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR7388/90 | 1990-05-23 | ||
| KR1019900007388A KR920010346B1 (en) | 1990-05-23 | 1990-05-23 | Semiconductor memory sensor amp drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1056763A true CN1056763A (en) | 1991-12-04 |
| CN1023623C CN1023623C (en) | 1994-01-26 |
Family
ID=19299314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN91103355A Expired - Lifetime CN1023623C (en) | 1990-05-23 | 1991-05-20 | Sense amplifier driving circuit for semiconductor memory device |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5130580A (en) |
| JP (1) | JP2607309B2 (en) |
| KR (1) | KR920010346B1 (en) |
| CN (1) | CN1023623C (en) |
| DE (1) | DE4023640C2 (en) |
| FR (1) | FR2662536A1 (en) |
| GB (1) | GB2246005B (en) |
| IT (1) | IT1246334B (en) |
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| US4038646A (en) * | 1976-03-12 | 1977-07-26 | Intel Corporation | Dynamic mos ram |
| US4694205A (en) * | 1985-06-03 | 1987-09-15 | Advanced Micro Devices, Inc. | Midpoint sense amplification scheme for a CMOS DRAM |
| US4873673A (en) * | 1986-12-03 | 1989-10-10 | Hitachi, Ltd. | Driver circuit having a current mirror circuit |
| US4888503A (en) * | 1987-10-13 | 1989-12-19 | Intel Corporation | Constant current biased common gate differential sense amplifier |
| KR900008436B1 (en) * | 1987-12-08 | 1990-11-20 | 삼성반도체통신 주식회사 | Dual-stope waveform generating circuitry |
| KR910002033B1 (en) * | 1988-07-11 | 1991-03-30 | 삼성전자 주식회사 | Sense amp driving circuit for memory cell |
| KR920001325B1 (en) * | 1989-06-10 | 1992-02-10 | 삼성전자 주식회사 | Sense amp driver of memory device |
-
1990
- 1990-05-23 KR KR1019900007388A patent/KR920010346B1/en not_active IP Right Cessation
- 1990-07-11 US US07/550,997 patent/US5130580A/en not_active Expired - Lifetime
- 1990-07-25 DE DE4023640A patent/DE4023640C2/en not_active Expired - Fee Related
- 1990-08-27 FR FR9010674A patent/FR2662536A1/en active Pending
- 1990-11-23 IT IT04851090A patent/IT1246334B/en active IP Right Grant
- 1990-11-29 JP JP2336945A patent/JP2607309B2/en not_active Expired - Lifetime
-
1991
- 1991-05-20 GB GB9110880A patent/GB2246005B/en not_active Expired - Fee Related
- 1991-05-20 CN CN91103355A patent/CN1023623C/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104956441A (en) * | 2013-02-25 | 2015-09-30 | 美光科技公司 | Apparatus, sense circuits, and methods for compensating for a wordline voltage increase |
| CN104956441B (en) * | 2013-02-25 | 2018-06-08 | 美光科技公司 | For compensating the increased equipment of word line voltage, sensing circuit and method |
| CN108428466A (en) * | 2017-02-02 | 2018-08-21 | 桑迪士克科技有限责任公司 | For inhibiting the sequence of the wordline of the first reading problem to cancel selection |
| CN111010147A (en) * | 2019-12-04 | 2020-04-14 | 南京轨道交通系统工程有限公司 | IGBT gate driver of double-slope peak suppression analog circuit |
| CN111010147B (en) * | 2019-12-04 | 2023-06-16 | 南京轨道交通系统工程有限公司 | IGBT gate driver of double-slope peak suppression analog circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| KR920010346B1 (en) | 1992-11-27 |
| DE4023640C2 (en) | 2000-02-17 |
| IT9048510A1 (en) | 1991-11-24 |
| GB2246005B (en) | 1994-08-31 |
| CN1023623C (en) | 1994-01-26 |
| GB9110880D0 (en) | 1991-07-10 |
| JP2607309B2 (en) | 1997-05-07 |
| FR2662536A1 (en) | 1991-11-29 |
| IT9048510A0 (en) | 1990-11-23 |
| IT1246334B (en) | 1994-11-17 |
| US5130580A (en) | 1992-07-14 |
| DE4023640A1 (en) | 1991-11-28 |
| JPH0430389A (en) | 1992-02-03 |
| GB2246005A (en) | 1992-01-15 |
| KR910020727A (en) | 1991-12-20 |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C15 | Extension of patent right duration from 15 to 20 years for appl. with date before 31.12.1992 and still valid on 11.12.2001 (patent law change 1993) | ||
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Expiration termination date: 20110520 Granted publication date: 19940126 |