CN105655486A - Phase transition storage unit and formation method thereof - Google Patents
Phase transition storage unit and formation method thereof Download PDFInfo
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- CN105655486A CN105655486A CN201410658849.8A CN201410658849A CN105655486A CN 105655486 A CN105655486 A CN 105655486A CN 201410658849 A CN201410658849 A CN 201410658849A CN 105655486 A CN105655486 A CN 105655486A
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Abstract
The invention relates to a phase transition storage unit and a formation method thereof. The formation method comprises: a semiconductor substrate is provided and a first interlayer dielectric layer and an interconnection layer are formed on the semiconductor substrate; a second interlayer dielectric layer is formed on the first interlayer dielectric layer and the interconnection layer; a through hole is formed in the second interlayer dielectric layer; a tunneling insulating layer is formed on the second interlayer dielectric layer and the side wall and bottom of the through hole; a bottom electrode material is formed on the tunneling insulating layers in the through hole; and grinding is carried out to remove the tunneling insulating layer and the bottom electrode material that are higher than the second interlayer dielectric layer and the rest of bottom electrode material in the through hole is used as a bottom electrode. According to the scheme, with the tunneling insulating layer, conduction of an active device on the semiconductor substrate with grinding fluid can be prevented and thus the grinding fluid is not electrified; the bottom electrode material immersed into the grinding fluid is protected from electrochemical corrosion, so that the upper surface of the bottom electrode is flush with the upper surface of the second interlayer dielectric layer; and on the basis of the good contact and electric connection, a phase transition material layer can be heated effectively by the bottom electrode, so that the state can be changed.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly a kind of phase transition storage and forming method thereof.
Background technology
Phase transition storage (PCRAM) is as a kind of emerging nonvolatile storage technologies, read or write speed,The very fast flash memories of all many-sides such as read-write number of times, data hold time, cellar area, many-valued realization(FLASH) all there is larger superiority, become the focus of current non-volatile memory technology research.
Phase transition storage utilizes the resistance difference of phase-change material under crystalline state and amorphous state to store data, itMainly utilize the control of curtage impulse wave to complete to write, wipe, read operation. Conventionally, oneIndividual phase-changing memory unit from top to bottom comprises: top electrode, phase-change material layers and hearth electrode, three's contactElectrical connection. In the time of write operation, between top electrode and hearth electrode, apply a short time and relatively high(reset) voltage that resets, make the phase-change material layer segment that contact with hearth electrode heat up fusing and quick cooling andTransfer amorphous state to by crystalline state. For example, because amorphous phase-change material has higher resistance (105～107 EuropeNurse), assignment is " 1 " conventionally, in the time carrying out read operation, provides a reading current can obtain high level.In the time of erase operation, provide a long period and relatively low set voltage so that amorphous phase-change materialThe temperature of layer segment is raised under fusion temperature, on crystallization temperature, keep afterwards a period of time to impel crystalline substanceNucleus growth, makes Amorphous Phase change material layer partially crystallizable and is converted into crystalline state from amorphous state. Due to crystalline statePhase-change material has lower resistance (for example 102～104Ohm), assignment is " 0 " conventionally, is readingWhen extract operation, provide a reading current can obtain low level. Therefore, phase transition storage is to utilize to work as phase transformationThe resistance difference of material layer in the time of crystalline state or amorphous state is carried out the nonvolatile memory of writing/reading data.
The formation method of existing a kind of phase transition storage comprises:
With reference to Fig. 1, Semiconductor substrate 1 is provided, in Semiconductor substrate 1, be formed with active device (in figure notIllustrate); In Semiconductor substrate 1, be also formed with interlayer dielectric layer 2, be arranged in the interconnection of interlayer dielectric layer 2Layer 3, interconnection layer 3 is electrically connected with the active device of below.
With reference to Fig. 2, in interlayer dielectric layer 2, form through hole 4, through hole 4 is communicated with interconnection layer 3.
With reference to Fig. 3, deposition tungsten layer 5, tungsten layer 5 covers interlayer dielectric layer 2 and fills full through hole 4 (with reference to Fig. 2).
With reference to Fig. 4, cmp tungsten layer 5 (with reference to Fig. 3), removes the tungsten higher than interlayer dielectric layer 2Layer, in through hole 4 (with reference to Fig. 3), remaining tungsten layer part is as hearth electrode 6. Afterwards, at interlayer dielectric layerOn 2, form and contact the phase-change material layers of electrical connection with hearth electrode 6 and form and phase transformation on phase-change material layersThe top electrode of material layer electrical connection.
But the phase transition storage performance that uses prior art to form is not good.
Summary of the invention
The problem that the present invention solves is that the phase transition storage performance that uses prior art to form is not good.
For addressing the above problem, the invention provides a kind of formation method of phase transition storage, this phase change memoryThe formation method of device comprises:
Semiconductor substrate is provided, in described Semiconductor substrate, is formed with the first interlayer dielectric layer and is positioned at instituteState the interconnection layer in the first interlayer dielectric layer;
On described the first interlayer dielectric layer and interconnection layer, form the second interlayer dielectric layer;
In described the second interlayer dielectric layer, form through hole, described through hole is communicated with interconnection layer;
On described the second interlayer dielectric layer, tunneling insulation layer is formed on through-hole side wall and bottom;
On described tunneling insulation layer He in through hole, form hearth electrode material, described hearth electrode material is filled fullThrough hole;
Grind tunneling insulation layer and the hearth electrode material removed higher than described the second interlayer dielectric layer, described logicalResidue hearth electrode material in hole is as hearth electrode.
Alternatively, the material of described tunneling insulation layer is tunnelling metal oxide.
Alternatively, the formation method of described tunneling insulation layer is chemical vapour deposition (CVD) or physical vapour deposition (PVD).
Alternatively, described tunnelling metal oxide is: Ta2O5、TiO2Or Al2O3。
Alternatively, described physical vapour deposition (PVD) is Ionized metallic plasma sputter, described tunnelling goldGenus oxide is Ta2O5；
In described Ionized metallic plasma sputter procedure, parameter arranges as follows: described sputterPower bracket is 630W～770W, and the pressure range in reaction chamber is 4.5mTorr～5.5mTorr.
Alternatively, described tunnelling metal oxide is Ta2O5，Ta2O5Thickness range 1.5nm～4nm.
Alternatively, also comprise:
On described the second interlayer dielectric layer and hearth electrode, form the 3rd interlayer dielectric layer;
In described the 3rd interlayer dielectric layer, form phase-change material layers, described phase change layer is electrically connected with hearth electrode;
On described the 3rd interlayer dielectric layer and phase-change material layers, form the 4th interlayer dielectric layer;
In described the 4th interlayer dielectric layer, form top electrode, described top electrode is electrically connected with phase-change material layers.
Alternatively, described hearth electrode material is W, TiN, TaN, TiC or TiCN.
The present invention also provides a kind of phase transition storage, and this phase transition storage comprises:
Semiconductor substrate;
Be arranged in the first interlayer dielectric layer in described Semiconductor substrate and be positioned at described the first interlayer dielectric layerInterconnection layer;
Be positioned at the second interlayer dielectric layer on described the first interlayer dielectric layer and interconnection layer;
Be arranged in the through hole of described the second interlayer dielectric layer, described through hole is communicated with interconnection layer;
Be positioned at the tunneling insulation layer of described through-hole side wall and bottom;
The hearth electrode that is arranged in described through hole and surrounds for described tunneling insulation layer, fills full through hole.
Alternatively, the material of described tunneling insulation layer is tunnelling metal oxide.
Alternatively, described tunnelling metal oxide is: Ta2O5、TiO2Or Al2O3。
Alternatively, described tunnelling metal oxide is Ta2O5，Ta2O5Thickness range 1.5nm～4nm.
Alternatively, also comprise:
Be positioned at the 3rd interlayer dielectric layer on described the second interlayer dielectric layer, tunneling insulation layer and hearth electrode;
Be arranged in the phase-change material layers of described the 3rd interlayer dielectric layer, be electrically connected with hearth electrode;
Be positioned at the 4th interlayer dielectric layer on described the 3rd interlayer dielectric layer and phase-change material layers;
Be arranged in the top electrode of described the 4th interlayer dielectric layer, be electrically connected with phase-change material layers.
Alternatively, described hearth electrode material is W, TiN, TaN, TiC or TiCN.
Compared with prior art, technical scheme of the present invention has the following advantages:
Fill hearth electrode material in through hole before, be formed with tunneling insulation layer at through-hole side wall and bottom.Like this, grinding hearth electrode material when exposing the second interlayer dielectric layer, the hearth electrode material in through hole andTunneling insulation layer upper surface is all dipped in lapping liquid, but tunneling insulation layer by interconnection layer and hearth electrode material everyOpen, tunneling insulation layer has insulating properties, and resistance is very large, can block the active device in Semiconductor substrateConducting between part and lapping liquid and make lapping liquid not charged, the hearth electrode material infiltrating in lapping liquid can notSuffer electrochemical corrosion. This can guarantee grind after hearth electrode upper surface and the second interlayer dielectric layer on showFace maintains an equal level, and can not produce pit. Phase-change material layers can form good contact with hearth electrode and be electrically connected,While writing with obliterated data to phase-change material layers, good contact electrical connection can guarantee that hearth electrode is to phase transformationMaterial layer carries out effectively heating to change its state. And, writing, wiping and reading at phase transition storageVoltage when extract operation can impel tunneling insulation layer generation tunnel-effect, realizes tunnelling conducting, guarantees phaseThe sensitivity of transition storage is higher, and performance is better.
Brief description of the drawings
Fig. 1～Fig. 4 is that the phase transition storage of prior art is in the cross-section structure signal in each stage of forming processFigure;
Fig. 5～Fig. 8, Figure 11～Figure 16 are that the phase transition storage of the specific embodiment of the invention is in forming processThe cross-sectional view in each stage;
Fig. 9 is Ta2O5While there is tunnel-effect, the curve map of relation between its thickness and tunnelling voltage;
The Ta that Figure 10 is is 2nm to thickness2O5Apply respectively magnitude of voltage for+5V and-when 5V, its resistanceAnd the schematic diagram of the relation between temperature.
Detailed description of the invention
The problem that inventor exists for prior art is analyzed, and finds: with reference to Fig. 2, Fig. 3, due toIn interlayer dielectric layer 2, there is the reason of through hole 4, in deposition tungsten layer 5 processes, corresponding through hole 4 positionsTungsten layer part lower than the tungsten layer part on interlayer dielectric layer 2. In conjunction with reference to Fig. 4, due to above reason,Grind the process of tungsten layer and be roughly divided into two steps: the first step, grind and remove higher than interlayer dielectric layer 2Tungsten layer part, in this process, because the tungsten layer part of lead to the hole site is lower than on other interlayer dielectric layersTungsten layer part, and lapping liquid is substantially indiscriminate to the grinding rate of tungsten layer various piece, thereforeWhen one step stops, the thickness of the tungsten layer part in through hole can be lower than the degree of depth of through hole; Second step, crosses and grindsInterlayer dielectric layer to tungsten layer and interlayer dielectric layer in through hole remains basically stable. But, in second step process,In active device in Semiconductor substrate, in two metal-oxide-semiconductors of cmos circuit, adjacent source electrodeAnd between drain electrode, have electrical potential difference, source electrode is electrically connected by interconnection layer 3 and the tungsten layer in through hole respectively with drain electrodeConnect, because tungsten layer partial wetting is in lapping liquid, the electromotive force official post between source electrode and drain electrode makes lapping liquid bandElectricity, because the tungsten layer upper surface in through hole is exposed in lapping liquid, causes infiltrating the tungsten layer in lapping liquidWith water generates electrochemical reaction, tungsten layer upper surface suffers electrochemical corrosion. With reference to Fig. 4, the final end formingElectrode 6 upper surfaces are formed with pit 6'(with reference to dotted line frame region), pit causes the phase transformation material of follow-up formationBetween the bed of material and hearth electrode for not exclusively to contact. This can increase the risk that the transmission of phase transition storage signal is interrupted,Cause phase-change material layers not to be heated and change its crystalline state or amorphous state, causing phase transition storage sensitivityDecline, can not normally read and write data, performance is not good.
To this, inventor once attempted replacing the acid solution in traditional handicraft with acid lapping liquidGrind tungsten layer, but can not improve greatlyr the problem of tungsten layer corrosion, also once attempted the spy by increasing hearth electrodeLevy size and avoid tungsten layer to suffer the corrosion of thicker degree, but this can increase manufacturing cost. Therefore, inventionPeople, through creative work, has proposed a kind of formation method of new phase transition storage. Use the method,Before forming hearth electrode material, on the first interlayer dielectric layer, through-hole side wall and bottom be pre-formed oneLayer tunneling insulation layer, in the time of cmp hearth electrode material, this tunneling insulation layer is capable of blocking logical like thisBeing electrically connected between the hearth electrode material in hole and interconnection layer, owing to not having electrical potential difference, lapping liquid and the endBetween electrode material, can there is not electrochemical reaction, and then avoid forming pit on hearth electrode surface.
For above-mentioned purpose of the present invention, feature and advantage can more be become apparent, below in conjunction with accompanying drawingSpecific embodiments of the invention are described in detail.
With reference to Fig. 5, Semiconductor substrate 10 is provided, in Semiconductor substrate 10, be formed with active device (figureIn not shown), cover Semiconductor substrate 10 and active device the first interlayer dielectric layer 11, be positioned at firstInterconnection layer 12 in interlayer dielectric layer 11, interconnection layer 12 is electrically connected with active device, and its upper surface exposes.
In Fig. 5, interconnection layer 12 is conductive plunger, contacts with the active device in Semiconductor substrate 10Be electrically connected or be electrically connected with active device by other interconnection layer parts. The formation method of this conductive plungerComprise: first in the first interlayer dielectric layer 11, form contact hole, the interconnection layer of through hole and its below or haveSource device is communicated with; Then, deposits conductive material is as tungsten, aluminium or copper, and conductive material is filled full contact hole alsoCover the first interlayer dielectric layer 11; Afterwards, by cmp or time etching technics, removal exceedsThe conductive plunger material of the first interlayer dielectric layer 11 upper surfaces, in contact hole, remaining conductive material is as leadingElectric plug.
In the present embodiment, interconnection layer 12 is conductive plunger, is only example. As example, interconnection layer 12Also can be the interconnecting metal layer being electrically connected with conductive plunger.
In the present embodiment, Semiconductor substrate 10 can be silicon substrate, can be also germanium, germanium silicon, arsenicGallium substrate or silicon-on-insulator substrate. Those skilled in the art can select substrate as required, thereforeThe type of substrate should not limit the scope of the invention. Semiconductor substrate 10 in the present embodiment is selected siliconSubstrate, because implement the technical program than implement this technical side on above-mentioned other substrates on silicon substrateThe cost of case is low.
With reference to Fig. 6, on the first interlayer dielectric layer 11 and interconnection layer 12, form the second interlayer dielectric layer 13.The material of the second interlayer dielectric layer 13 is silicon nitride or silica, or the second interlayer dielectric layer 13 comprisesThe silicon nitride layer stacking together and silicon oxide layer, can use chemical vapor deposition method to form.
With reference to Fig. 7, in the second interlayer dielectric layer 13, form through hole 14, through hole 14 is communicated with interconnection layer 12,And exposed portions serve interconnection layer 12. The method that forms through hole 14 in the second interlayer dielectric layer 13 comprises:
On the second interlayer dielectric layer 13, form patterned mask layer, as patterned photoresist layer, figureThe position of the mask layer definition through hole of shape;
Taking patterned mask layer as mask, etching the second interlayer dielectric layer 13 to interconnection layer 12 exposes,Form through hole 14;
Remove patterned mask layer.
With reference to Fig. 8, on the second interlayer dielectric layer 13, tunneling insulation layer is formed on through hole 14 sidewalls and bottom15, tunneling insulation layer 15 plays the insulating effect between follow-up hearth electrode and interconnection layer 12.
In the present embodiment, the material of tunneling insulation layer 15 is Ta2O5, specifically use chemical vapour deposition (CVD)Or physical gas-phase deposition forms. Wherein, chemical vapor deposition method is selected low-pressure chemical vapor deposition(LowPressureChemicalVaporDeposition, LPCVD) utilizes in LPCVD processTa(OC2H5)5For raw material. Ta (OC2H in this process5)5Be decomposed into Ta2O5And volatile materials, itsMiddle Ta2O5Be deposited on the second interlayer dielectric layer 13, through hole 14 sidewalls and bottom, the volatility thing of generationMatter is discharged from reaction chamber. In this LPCVD process, the temperature range in reaction chamber is 369 DEG C～451 DEG C,The temperature of the present embodiment is 410 DEG C.
In the present embodiment, physical gas-phase deposition is selected sputter, for example Ionized metal plasmaBody sputter. In addition, also can adopt radio-frequency sputtering and magnetron sputtering. Than radio-frequency sputtering, ionThe sedimentation rate of metallic plasma (IonedMentalPlasma, the IMP) sputter of changing is higher, especiallyBe can cover well have between through hole 14 sidewalls of high-aspect-ratio and through-hole side wall and bottom betweenGap. In IMP process, the present embodiment forms Ta in sputter2O5Process can be: at sputter TaIn process, in reaction chamber, pass into O2，O2React with Ta and generate Ta2O5, in this process, use ArAs sputter gas, Ionized high energy Ar ionic drive Ta target sputters Ta atom; Can also be:First sputter forms Ta layer, then Ta layer is carried out to oxidation processes to form Ta2O5. At this Ionized goldBelonging to plasma sputtering process provides dc source, the power bracket providing between 630W～770W,Pressure range in reaction chamber is 4.5mTorr～5.5mTorr, can obtain preferably sedimentation rate.
In the time phase transition storage being write, read with erase operation, interconnection layer 12 need to be with follow-up logicalHearth electrode conducting in hole, to pass into electric current to phase-change material layers, therefore must ensure tunneling insulation layer 15Can be by tunnelling. With reference to Fig. 9, Fig. 9 is Ta2O5Occur when tunnel-effect, its thickness and tunnelling voltage itBetween the curve map of relation, wherein Ta2O5Near thickness 2nm time, required tunnelling magnitude of voltage is less;And Ta2O5Thickness while being greater than 4nm required tunnelling magnitude of voltage higher, and increase required tunnelling with thicknessMagnitude of voltage increases. Therefore, the thickness range of the tunneling insulation layer 15 of the present embodiment is 1.5nm～4nm. ?Write " 1 " to phase transition storage, between top electrode and hearth electrode, apply the reset voltage of high value, energyEnough make tunneling insulation layer tunnelling 15 within a short period of time conduction, to impel phase-change material layers within a short period of timeMore than being heated to fusing point; In the time wiping the high level of storing in phase transition storage, although the set electricity providingPress lowlyer, but the required tunnelling voltage of tunneling insulation layer 15 is also lower, and set voltage can make tunneling insulation layer15 tunnelling conductings, wipe the high level of phase-change material layers storage to realize. In the time of reading out data, provideCan make tunneling insulation layer 15 tunnelling conductings once lower reading current. In addition, when phase transition storage is not switched onTime, tunneling insulation layer 15 plays good insulating effect, to avoid phase transition storage data to run off. Therefore,Tunneling insulation layer 15, in this above-mentioned thickness range, can guarantee that phase transition storage normally works, and notCan reduce the sensitivity of phase transition storage.
Except Ta2O5Outward, tunneling insulation layer 15 also can be selected other tunnelling metal oxides, as TiO2OrAl2O3. For traditional tunnelling SiO2, its dielectric constant is lower, and the high integration of integrated circuit is wantedAsk the thinner thickness of tunneling insulation layer, but use existing semiconductor technology to be difficult to obtain very thin tunnellingSiO2. By contrast, tunnelling metal oxide and existing semiconductor technology compatibility are good, thinner thickness,And dielectric constant is high. To the different materials of tunneling insulation layer 15, can obtain its thickness according to its tunnelling voltageScope. But than TiO2Or Al2O3，Ta2O5Tunnelling voltage lower, corresponding phase transition storageSensitivity is higher. And, Ta2O5And between the second interlayer dielectric layer 13 (with reference to Fig. 8), have goodAdhesion, can not become flexible easily, peel off.
In addition, with reference to Figure 10, the Ta that Figure 10 is is 2nm to thickness2O5Applying respectively magnitude of voltage is+5VDuring with-5V, the relation between its resistance and temperature, as we know from the figure: on the one hand, raise with temperature, Ta2O5Resistance also raise, but the amplification of resistance is less; On the other hand ,+5V and-5V under, Ta2O5ElectricityResistance is not more big changes substantially. Hence one can see that, Ta2O5Thermal conductivity (thermalconductivity)Low. In the time that phase transition storage writes with obliterated data, the phase-change material layer segment contacting with hearth electrode can quiltHeating, although it is different to apply magnitude of voltage while writing with erase operation, and the temperature of phase-change material layers is very high,But surround the Ta of hearth electrode2O5Substantially can significantly not heat up, just substantially can be by phase-change material layer segment yetHeat is passed to interconnection layer, avoid phase-change material layers heat loss and cause lost efficacy.
With reference to Figure 11, on tunneling insulation layer 15 and in through hole 14 (with reference to Fig. 8), form hearth electrode material16, hearth electrode material 16 is filled full through hole 14. In the present embodiment, hearth electrode material 16 is tungsten, canUse physical gas-phase deposition forms. Except tungsten, hearth electrode material 16 also can be selected other materials, asTiN, TaN, TiC or TiCN.
With reference to Figure 12, use cmp, remove the tunnelling insulation higher than the second interlayer dielectric layer 13Layer and hearth electrode material part, in through hole 14 (with reference to Fig. 8), remaining hearth electrode material is as end electricityThe utmost point 17.
Chemical mechanical planarization process can be divided into three steps:
The first step, grinds hearth electrode material and exposes to tunneling insulation layer 15, now hearth electrode material and tunnellingInsulating barrier 15 is all dipped in lapping liquid, but tunneling insulation layer 15 separates interconnection layer 12 and hearth electrode material,Tunneling insulation layer 15 has insulating properties, and resistance is very large, can block active in Semiconductor substrate 10Between device and lapping liquid, form path, lapping liquid can be not charged, infiltrates the hearth electrode material in lapping liquidMaterial can not produce electrochemical corrosion;
Second step, grinds tunneling insulation layer 15 and hearth electrode material, exposes to the second interlayer dielectric layer 13;
The 3rd step, crosses grinding tunneling insulation layer 15 and hearth electrode material, to the hearth electrode 17 in through hole 14Upper surface and the second interlayer dielectric layer 13 upper surfaces remain basically stable, in this process, due to tunneling insulation layer15 insulating properties, can there is not electrochemical corrosion in hearth electrode 17 upper surfaces, and hearth electrode 17 upper surfaces can notProduce pit, more smooth. Like this, follow-up phase-change material layers can form good contact with hearth electrode 17Electrical connection, it is unobstructed that this can ensure that the signal of phase transition storage transmits, guarantee in the time writing with obliterated data,Can carry out effectively heating to change its state to phase-change material layers, and the sensitivity of phase transition storage is higher,Performance is better.
With reference to Figure 13, on the second interlayer dielectric layer 13, tunneling insulation layer 15 and hearth electrode 17, formThree interlayer dielectric layers 18, specifically use chemical vapour deposition (CVD).
With reference to Figure 14, in the 3rd interlayer dielectric layer 18, form phase-change material layers 19, phase-change material layers 19Contact electrical connection with hearth electrode 17, also contact with tunneling insulation layer 15, the material of phase-change material layers 19 isGe-Sb-Te alloy (GeSbTe is abbreviated as GST), because GST is in the resistivity phase of amorphous state and crystalline statePoor larger, approximately differ three orders of magnitude, make to be easier to the state of identification and definite current storage, phaseBetween change material layer 19 and hearth electrode 17, can form good contact, after phase-change material layers 19 is heatedCan form good signal transmission with hearth electrode 17, and hearth electrode 17 upper surfaces are comparatively smooth,When phase-change material layers writes with obliterated data, the phase-change material part contacting with hearth electrode 17 can be by fullyHeating, to avoid phase-change material layers 19 to lose efficacy. The method that forms phase-change material layers 19 comprises: first existIn the 3rd interlayer dielectric layer 18, form through hole, through hole exposes the upper table of hearth electrode 17 and tunneling insulation layer 15The upper surface of face and part the 3rd interlayer dielectric layer 18; Afterwards, sediment phase change material, phase-change material coversCover the 3rd inter-level dielectric 18 and fill full through hole; Then, planarization phase-change material, to the phase transformation in through holeMaterial layer material and the 3rd interlayer dielectric layer 18 remain basically stable, and in through hole, remaining phase-change material is as phase transformationMaterial layer.
With reference to Figure 15, on the 3rd interlayer dielectric layer 18 and phase-change material layers 19, form the 4th inter-level dielectricLayer 20;
With reference to Figure 16, in the 4th interlayer dielectric layer 20, form top electrode 21, top electrode 21 and phase transformation materialThe bed of material 19 contact electrical connections.
The present invention also provides a kind of phase transition storage, and with reference to Figure 16, this phase transition storage comprises:
Semiconductor substrate 10;
Be positioned at the first interlayer dielectric layer 11 in Semiconductor substrate 10 and be positioned at the first interlayer dielectric layer 11In interconnection layer 12;
Be positioned at the second interlayer dielectric layer 13 on the first interlayer dielectric layer 11 and interconnection layer 12;
The through hole 14 (please refer to Fig. 8) that is arranged in the second interlayer dielectric layer 13, through hole 14 is communicated with interconnection layer12；
Be positioned at the tunneling insulation layer 15 of through hole 14 sidewalls and bottom;
The hearth electrode 17 that is arranged in through hole 14 and surrounds for tunneling insulation layer 15, hearth electrode 17 is filled fullThrough hole 14, and the upper surface of its upper surface and the second interlayer dielectric layer 13 maintains an equal level;
Be positioned at the 3rd inter-level dielectric on the second interlayer dielectric layer 13, tunneling insulation layer 15 and hearth electrode 17Layer 18;
Be arranged in the phase-change material layers 19 of the 3rd interlayer dielectric layer 18, contact electrical connection with hearth electrode 17;
Be positioned at the 4th interlayer dielectric layer 20 on the 3rd interlayer dielectric layer 18 and phase-change material layers 19;
Be arranged in the top electrode 21 of the 4th interlayer dielectric layer 20, contact electrical connection with phase-change material layers 19.
In the present embodiment, the material of tunneling insulation layer 15 is tunnelling metal oxide, as Ta2O5、TiO2Or Al2O3. Wherein, tunnelling metal oxide is Ta2O5Time, its thickness range is 1.5nm～4nm.
In the present embodiment, hearth electrode 17 materials are W, TiN, TaN, TiC or TiCN.
Although the present invention discloses as above, the present invention is not defined in this. Any those skilled in the art,Without departing from the spirit and scope of the present invention, all can make various changes or modifications, therefore guarantor of the present inventionThe scope of protecting should be as the criterion with claim limited range.
Claims (14)
1. a formation method for phase transition storage, is characterized in that, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, is formed with the first interlayer dielectric layer and is positioned at instituteState the interconnection layer in the first interlayer dielectric layer;
On described the first interlayer dielectric layer and interconnection layer, form the second interlayer dielectric layer;
In described the second interlayer dielectric layer, form through hole, described through hole is communicated with interconnection layer;
On described the second interlayer dielectric layer, tunneling insulation layer is formed on through-hole side wall and bottom;
On described tunneling insulation layer He in through hole, form hearth electrode material, described hearth electrode material is filled fullThrough hole;
Grind tunneling insulation layer and the hearth electrode material removed higher than described the second interlayer dielectric layer, described logicalResidue hearth electrode material in hole is as hearth electrode.
2. the formation method of phase transition storage as claimed in claim 1, is characterized in that, described tunnelling insulationThe material of layer is tunnelling metal oxide.
3. the formation method of phase transition storage as claimed in claim 2, is characterized in that, described tunnelling insulationThe formation method of layer is chemical vapour deposition (CVD) or physical vapour deposition (PVD).
4. the formation method of phase transition storage as claimed in claim 3, is characterized in that, described tunnelling metalOxide is: Ta2O5、TiO2Or Al2O3。
5. the formation method of phase transition storage as claimed in claim 4, is characterized in that, described physical vaporBe deposited as Ionized metallic plasma sputter, described tunnelling metal oxide is Ta2O5；
In described Ionized metallic plasma sputter procedure, parameter arranges as follows: described sputterPower bracket is 630W～770W, and the pressure range in reaction chamber is 4.5mTorr～5.5mTorr.
6. the formation method of phase transition storage as claimed in claim 4, is characterized in that, described tunnelling metalOxide is Ta2O5，Ta2O5Thickness range 1.5nm～4nm.
7. the formation method of phase transition storage as claimed in claim 1, is characterized in that, also comprises:
On described the second interlayer dielectric layer and hearth electrode, form the 3rd interlayer dielectric layer;
In described the 3rd interlayer dielectric layer, form phase-change material layers, described phase change layer is electrically connected with hearth electrode;
On described the 3rd interlayer dielectric layer and phase-change material layers, form the 4th interlayer dielectric layer;
In described the 4th interlayer dielectric layer, form top electrode, described top electrode is electrically connected with phase-change material layers.
8. the formation method of phase transition storage as claimed in claim 1, is characterized in that, described hearth electrode materialMaterial is W, TiN, TaN, TiC or TiCN.
9. a phase transition storage, is characterized in that, comprising:
Semiconductor substrate;
Be arranged in the first interlayer dielectric layer in described Semiconductor substrate and be positioned at described the first interlayer dielectric layerInterconnection layer;
Be positioned at the second interlayer dielectric layer on described the first interlayer dielectric layer and interconnection layer;
Be arranged in the through hole of described the second interlayer dielectric layer, described through hole is communicated with interconnection layer;
Be positioned at the tunneling insulation layer of described through-hole side wall and bottom;
The hearth electrode that is arranged in described through hole and surrounds for described tunneling insulation layer, fills full through hole.
10. phase transition storage as claimed in claim 9, is characterized in that, the material of described tunneling insulation layer isTunnelling metal oxide.
11. phase transition storages as claimed in claim 10, is characterized in that, described tunnelling metal oxide is:Ta2O5、TiO2Or Al2O3。
12. phase transition storages as claimed in claim 11, is characterized in that, described tunnelling metal oxide isTa2O5，Ta2O5Thickness range 1.5nm～4nm.
13. phase transition storages as claimed in claim 9, is characterized in that, also comprise:
Be positioned at the 3rd interlayer dielectric layer on described the second interlayer dielectric layer, tunneling insulation layer and hearth electrode;
Be arranged in the phase-change material layers of described the 3rd interlayer dielectric layer, be electrically connected with hearth electrode;
Be positioned at the 4th interlayer dielectric layer on described the 3rd interlayer dielectric layer and phase-change material layers;
Be arranged in the top electrode of described the 4th interlayer dielectric layer, be electrically connected with phase-change material layers.
14. phase transition storages as claimed in claim 9, is characterized in that, described hearth electrode material be W, TiN,TaN, TiC or TiCN.
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