CN105629587A - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置 Download PDF

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CN105629587A
CN105629587A CN201610179793.7A CN201610179793A CN105629587A CN 105629587 A CN105629587 A CN 105629587A CN 201610179793 A CN201610179793 A CN 201610179793A CN 105629587 A CN105629587 A CN 105629587A
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display panel
oriented
array substrate
display
electrode district
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范宇光
李京鹏
李建
覃一锋
李伟
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1337Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/13378Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation
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    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
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    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
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    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/4757After-treatment
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1337Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133711Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by organic films, e.g. polymeric films
    • G02F1/133723Polyimide, polyamide-imide

Abstract

本发明提供一种显示面板及其制备方法和显示装置,属于显示技术领域,其可解决现有的显示面板中取向层的周边容易产生明显的摩擦痕、影响显示效果的问题。本发明的显示面板的制备方法包括以下步骤:在阵列基板上方涂覆取向材料,涂覆的区域包括阵列基板的显示区和位于显示区外围的电极区;对取向材料进行取向;将取向后的阵列基板与取向后的彩膜基板进行对盒;切割对盒后的阵列基板与彩膜基板,形成显示面板单元,每一显示面板单元中,阵列基板的电极区未被彩膜基板覆盖;去除阵列基板的电极区上方覆盖的取向材料,露出电极区。上述显示面板的制备方法可明显减少取向层上的摩擦痕,提高显示面板的显示效果。

Description

显示面板及其制备方法、显示装置
技术领域
[0001] 本发明属于显示技术领域,具体设及一种显示面板的制备方法W及采用该方法制 备的显示面板和显示装置。
背景技术
[0002] 目前,液晶显示屏是使用最广泛的显示屏之一。液晶显示屏包括对盒设置的阵列 基板和彩膜基板,W及位于阵列基板与彩膜基板之间的液晶层。阵列基板的显示区设置有 多个薄膜晶体管,薄膜晶体管相应连接控制电极,通过控制电极引入扫描信号和数据信号, W实现液晶偏转的控制,实现光的透过与否和透过量的控制;为控制电极引入信号的控制 电路通常设置于阵列基板的非显示区。
[0003] 同时,为了实现液晶初始角度的错定,彩膜基板和阵列基板的显示区均分别设置 取向层。其中,现有技术中制备阵列基板的取向层的方法,通常先在基板的显示区涂覆聚酷 亚胺材料,然后采用棉布或纤维布对涂覆的聚酷亚胺材料进行取向,从而形成取向层。发明 人发现现有技术中至少存在如下问题:
[0004] 为保证控制电路区域的裸露,通常仅在阵列基板的显示区涂覆聚酷亚胺材料,然 后通过取向工艺形成取向层。然而,由于涂覆工艺的限制,取向材料在显示区与非显示区交 界的区域通常会出现缺陷,取向后容易因取向材料表面受到损伤而在周边区域产生明显的 摩擦痕(R址ibing Mura)。取向层的摩擦痕,将导致显示画面出现波纹,影响显示效果。
[0005] 因此,设计一种能够使显示面板内的取向层具有较少摩擦痕甚至不具有摩擦痕, 从而提高显示效果的结构或方法,运是目前亟待解决的技术问题。
发明内容
[0006] 本发明针对现有的上述的问题,提供一种显示面板及其制备方法和显示装置。其 中,显示面板的制备方法能够使显示面板中最终形成的取向层具有较少甚至不具有摩擦 痕,从而提局显不效果。
[0007] 本发明为解决上述技术问题提供的技术方案为:一种显示面板的制备方法,包括 W下步骤:
[000引在阵列基板上方涂覆取向材料,涂覆的区域包括阵列基板的显示区和位于显示区 外围的电极区;
[0009] 对取向材料进行取向;
[0010] 将取向后的阵列基板与取向后的彩膜基板进行对盒;
[0011] 切割对盒后的阵列基板与彩膜基板,形成显示面板单元,每一显示面板单元中,阵 列基板的电极区未被彩膜基板覆盖;
[0012] 去除阵列基板的电极区上方覆盖的取向材料,露出电极区。
[0013] 优选的是,所述在阵列基板上方涂覆取向材料的步骤中,所述取向材料为聚酷亚 胺材料。
[0014] 优选的是,所述去除阵列基板的电极区上方覆盖的取向材料的步骤,包括采用离 子刻蚀法去除电极区上方覆盖的取向材料,其中:所述离子刻蚀法的工程参数包括:功率范 围:220-280胖;4'流速范围:3-1化9111;02流速范围:0.028-0.03514)111;处理时长范围:15- 25Sec〇
[0015] 优选的是,所述离子刻蚀法的工程参数采用:功率:220W; Ar流速:7Lpm;化流速: 0.035Lpm;处理时长:15Sec。
[0016] 优选的是,所述去除阵列基板的电极区上方覆盖的取向材料的步骤,包括采用化 学刻蚀法刻蚀电极区上方覆盖的取向材料。
[0017] 优选的是,所述采用化学刻蚀法刻蚀电极区上方覆盖的取向材料的步骤之前,还 包括:采用封胶的方式或吸盘的方式覆盖所述阵列基板的显示区。
[0018] 优选的是,所述化学刻蚀法中的刻蚀溶液包含阱类物质或者氨氧化溶液。
[0019] 优选的是,所述在阵列基板上方涂覆取向材料的步骤,包括采用凸版印刷法、喷射 印刷法或丝网印刷法中任一种方法涂覆取向材料。
[0020] 优选的是,所述对取向材料进行取向的步骤,包括采用摩擦取向工艺或光取向工 艺对取向材料取向。
[0021] 本发明提供的另一种技术方案:一种显示面板,采用上述任一种显示面板的制备 方法制备,所述阵列基板的电极区未被所述彩膜基板覆盖。
[0022] 本发明提供的另一种技术方案:一种显示装置,包括上述显示面板。
[0023] 本发明提供的显示面板及其制备方法和显示装置,首先,通过全涂覆的形式在阵 列基板的显示区W及电极区的上方均涂覆取向材料;然后,采用离子刻蚀法或者化学刻蚀 法去除掉电极区上方涂覆的取向材料,从而形成取向层,并使电极区中的电极能够适用于 后续的电极检测工作,进而完成显示面板的其他组装工作。运样,可明显减少取向层上的摩 擦痕,进而减少显示画面内的波纹缺陷,提高显示面板的显示效果。
附图说明
[0024] 图1为本发明的实施例1的显示面板的制备方法的流程图;
[0025] 图2为本发明的实施例1的待涂覆取向材料的阵列基板的俯视图;
[00%]其中,附图标记为:
[0027] 1、显示区;2、电极区。
具体实施方式
[0028] 为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方 式对本发明作进一步详细描述。
[0029] 本发明的构思在于:首先,通过全涂覆的形式在阵列基板的显示区W及电极区的 上方均涂覆取向材料;然后,去除掉电极区上方涂覆的取向材料,形成最终的取向层,可明 显减少取向层的摩擦痕。
[0030] 实施例1:
[0031] 本实施例提供一种显示面板的制备方法,该显示面板的制备方法中,采用了离子 刻蚀法去除掉电极区上方涂覆的取向材料,形成最终的取向层、并完全显露出电极区内的 电极。
[0032] 图1为本实施例的显示面板的制备方法的流程图,如图1所示,该显示面板的制备 方法包括W下步骤:
[0033] S1:在阵列基板上方涂覆取向材料,涂覆的区域包括阵列基板的显示区和位于显 示区外围的电极区。
[0034] 图2为待涂覆取向材料的阵列基板的俯视图,如图2所示,待涂覆取向材料的阵列 基板包括显示区1和位于显示区1外围的电极区2,其中,电极区2内设置有电极。
[0035] 在步骤S1中,涂覆取向材料的区域包括阵列基板的显示区1和电极区2,运里的取 向材料优选为聚酷亚胺材料。
[0036] 涂覆取向材料的方法可采用凸版(APR版)印刷法、喷射印刷法或丝网印刷法中任 一种方法,不仅可W按照加工环境灵活选择涂覆方法,而且工艺成熟、涂覆效果较好。
[0037] 此外,本发明的制备方法中,因为在阵列基板的显示区1和电极区2均涂覆取向材 料,所W,相比于现有技术中只在阵列基板的显示区1涂覆取向材料,本发明的制备方法能 够明显地避免阵列基板周边区域的涂覆缺陷,提高了涂覆质量,从源头上消除了产生摩擦 痕的苗头。
[0038] S2:对取向材料进行取向。
[0039] 在步骤S2中,对涂覆在阵列基板上方的取向材料进行取向,取向的方法可采用摩 擦取向工艺(Rubbing工艺)或者光取向工艺(0A工艺),其中,从设备成本W及取向难度考 虑,优选RiAbing工艺,可降低设备成本和取向难度。
[0040] S3:将取向后的阵列基板与取向后的彩膜基板进行对盒。
[0041] 在步骤S3中,将取向后的阵列基板与已经制备完成的彩膜基板进行对盒,运里采 用工艺成熟的常规对盒方式即可,彩膜基板也可采用常规的技术工艺加工。
[0042] S4:切割对盒后的阵列基板与彩膜基板,形成显示面板单元,每一显示面板单元 中,阵列基板的电极区未被彩膜基板覆盖。
[0043] 在步骤S4中,采用常规的切割方式将对盒后的阵列基板与彩膜基板(也即母板)切 割成多个显示面板单元。并且,每一显示面板单元中,阵列基板的电极区未被彩膜基板覆 盖,也就是说,彩膜基板与阵列基板的显示区正对设置、且二者面积相等,因此,阵列基板的 电极区与彩膜基板没有重叠、也未被彩膜基板遮挡。运样,为后续去除电极区上方覆盖的取 向材料创造了有利的结构条件。
[0044] S5:去除阵列基板的电极区上方覆盖的取向材料,露出电极区。
[0045] 在步骤S5中,去除电极区上方覆盖的取向材料具体采用离子刻蚀法。
[0046] 经过多次试验测定,在不同的功率、Ar通入速率、〇2通入速率W及处理时长的条件 下,测出了对应残留的聚酷亚胺材料(PI)的厚度,具体试验统计结果如下表所示:
[0047]
Figure CN105629587AD00061
[0049]由上表可知,离子刻蚀法的工程参数设定在W下范围内,可较为彻底地去除电极 区上方覆盖的取向材料,形成最终的取向层,并完全显露出电极区内的电极,即使残留的聚 酷亚胺材料(PI)的厚度为0 A:功率范围:220-280W;Ar流速范围:3-l:3Lpm;〇2流速范围: 0.028-0.035Lpm;处理时长范围:15-25Sec。
[0050] 其中,考虑到取向效率和加工成本,优先选用功率较低和处理时长较短的工程参 数,比如说,按照上表,离子刻蚀法的工程参数采用:功率:220W; Ar流速:7Lpm;化流速: 0.035Lpm;处理时长:15Sec。
[0051] 运样,在保证彻底去除电极区上方覆盖的聚酷亚胺材料的情况下,选用的功率最 低(220W),需要的处理时长也最短(15Sec),可显著降低功耗、节省加工时间,提高经济效 益。
[0052] 本实施例的显示面板的制备方法,对于显示区与非显示区的取向层的边界形状无 严格要求,只要保证电极区裸露W便于测试和焊接即可。采用上述的制备方法,既能获得较 佳的取向层,又能有效保证电极区的裸露、W便于测试和焊接,还保证了良好的显示效果。
[0053] 相应的,本实施例还提供一种显示面板,该显示面板为采用本实施例的制备方法 制备而成的显示面板,该显示面板的电极区未被彩膜基板覆盖。
[0054] 本实施例还提供一种显示装置,该显示装置包括上述显示面板。
[0055] 本实施例提供的显示面板及其制备方法和显示装置,首先,通过全涂覆的形式在 阵列基板的显示区W及电极区的上方均涂覆取向材料;然后,采用离子刻蚀法彻底去除掉 电极区上方涂覆的取向材料,从而形成最终的取向层,并完全显露出电极区中的电极,使电 极能够适用于后续的电极检测和焊接工作,进而完成显示面板的其他组装工作。运样,可明 显减少取向层上的摩擦痕,减少显示画面内的波纹缺陷,提高显示面板的显示效果。
[0化6] 实施例2:
[0057] 本实施例提供一种显示面板的制备方法,该显示面板的制备方法与实施例1中显 示面板的制备方法类似,其与实施例1的区别在于,本实施例提供的显示面板的制备方法 中,采用了化学刻蚀法去除掉电极区上方涂覆的取向材料,形成最终的取向层、并完全显露 出电极区内的电极。
[0058] 具体的,去除阵列基板的电极区上方覆盖的取向材料的步骤包括采用化学刻蚀法 刻蚀电极区上方覆盖的取向材料。
[0059] 其中,在采用化学刻蚀法刻蚀电极区上方覆盖的取向材料的步骤之前,还包括:采 用封胶的方式或吸盘的方式覆盖阵列基板的显示区。原因在于,刻蚀取向材料所用的强碱 性溶液只需要刻蚀掉电极区上方的取向材料,不需要刻蚀掉显示区上方的取向材料,所W, 采用封胶的方式或吸盘的方式将显示区保护起来,避免显示区上方的取向材料被强碱性溶 液刻蚀,同时还能保证阵列基板的显示区的厚度和平整程度。
[0060] 运里的化学刻蚀法中的刻蚀溶液为强碱性溶液,该强碱性溶液PH含13,该强碱性 溶液包含阱类物质或者氨氧化溶液(例如Na0H、K0H),W提高刻蚀效率。
[0061] 本实施例的显示面板的制备方法的其他步骤与实施例1中相同,运里不再寶述。
[0062] 本实施例还提供一种显示面板,该显示面板为采用本实施例的制备方法制备而成 的显示面板。该显示面板的电极区未被彩膜基板覆盖。
[0063] 本实施例还提供一种显示装置,该显示装置包括上述显示面板。
[0064] 本实施例提供的显示面板及其制备方法和显示装置,采用化学刻蚀法彻底去除掉 电极区上方涂覆的取向材料,从而形成最终的取向层,并完全显露出电极区中的电极,同样 可W明显减少取向层上的摩擦痕,提高显示面板的显示效果。
[0065] 可W理解的是,W上实施方式仅仅是为了说明本发明的原理而采用的示例性实施 方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精 神和实质的情况下,可W做出各种变型和改进,运些变型和改进也视为本发明的保护范围。

Claims (11)

1. 一种显示面板的制备方法,其特征在于,包括以下步骤: 在阵列基板上方涂覆取向材料,涂覆的区域包括阵列基板的显示区和位于显示区外围 的电极区; 对取向材料进行取向; 将取向后的阵列基板与取向后的彩膜基板进行对盒; 切割对盒后的阵列基板与彩膜基板,形成显示面板单元,每一显示面板单元中,阵列基 板的电极区未被彩膜基板覆盖; 去除阵列基板的电极区上方覆盖的取向材料,露出电极区。
2. 根据权利要求1所述的显示面板的制备方法,其特征在于,所述在阵列基板上方涂覆 取向材料的步骤中,所述取向材料为聚酰亚胺材料。
3. 根据权利要求2所述的显示面板的制备方法,其特征在于,所述去除阵列基板的电极 区上方覆盖的取向材料的步骤,包括采用离子刻蚀法去除电极区上方覆盖的取向材料,其 中:所述离子刻蚀法的工程参数包括:功率范围:220-280W;Ar流速范围:3-13Lpm;0 2流速范 围:0.028-0.035Lpm;处理时长范围:15-25Sec。
4. 根据权利要求3所述的显示面板的制备方法,其特征在于,所述离子刻蚀法的工程参 数采用:功率:220W; Ar流速:7Lpm; 02流速:0.035Lpm;处理时长:15Sec。
5. 根据权利要求2所述的显示面板的制备方法,其特征在于,所述去除阵列基板的电极 区上方覆盖的取向材料的步骤,包括采用化学刻蚀法刻蚀电极区上方覆盖的取向材料。
6. 根据权利要求5所述的显示面板的制备方法,其特征在于,所述采用化学刻蚀法刻蚀 电极区上方覆盖的取向材料的步骤之前,还包括:采用封胶的方式或吸盘的方式覆盖所述 阵列基板的显示区。
7. 根据权利要求5所述的显示面板的制备方法,其特征在于,所述化学刻蚀法中的刻蚀 溶液包含肼类物质或者氢氧化溶液。
8. 根据权利要求1-7任一所述的显示面板的制备方法,其特征在于,所述在阵列基板上 方涂覆取向材料的步骤,包括采用凸版印刷法、喷射印刷法或丝网印刷法中任一种方法涂 覆取向材料。
9. 根据权利要求1-7任一所述的显示面板的制备方法,其特征在于,所述对取向材料进 行取向的步骤,包括采用摩擦取向工艺或光取向工艺对取向材料取向。
10. -种显示面板,其特征在于,采用权利要求1-9任一所述的显示面板的制备方法制 备,所述阵列基板的电极区未被所述彩膜基板覆盖。
11. 一种显示装置,其特征在于,包括权利要求10所述的显示面板。
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