CN105609497A - System-level packaging technology for VGA/YPbPr-to-HDMI interface module - Google Patents
System-level packaging technology for VGA/YPbPr-to-HDMI interface module Download PDFInfo
- Publication number
- CN105609497A CN105609497A CN201511006363.7A CN201511006363A CN105609497A CN 105609497 A CN105609497 A CN 105609497A CN 201511006363 A CN201511006363 A CN 201511006363A CN 105609497 A CN105609497 A CN 105609497A
- Authority
- CN
- China
- Prior art keywords
- ypbpr
- vga
- technology
- hdmi interface
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
The invention relates to a system-level packaging technology for a VGA/YPbPr-to-HDMI interface module, and aims to reduce the size of the finished VGA/YPbPr-to-HDMI interface module, reinforce signal transmission, improve thermal property and electrical performance, and save cost by adopting the system-level packaging technology. The adopted technical scheme for solving the technical problems is as follows: the system-level packaging technology is adopted; a wire bond technology and SMT patch technology are combined; necessary modules and resistor and capacitor devices in a VGA/YPbPr-to-HDMI interface chip are arranged in a chip to be packaged and moulded in a stacked or tiled manner, so that the overall system function is realized thorough the single chip. The system-level packaging technology has the technical characteristics of capabilities of realizing multi-chip stacking and packaging, passive device packaging, and signal connection in the wire bond and SMT patch connecting ways.
Description
Technical field
The present invention relates to semiconductor packaging, more specifically, relate to a kind of system in package technology that turns HDMI interface module with VGA/YPbPr that is suitable for.
Background technology
VGA/YPbPr turns HDMI interface module in order to reach better laser propagation effect at present, conventionally need to be equipped with 1 main control chip, 1 SDRAM transmits data as FrameBuffer, 1 crystal oscillator is as start-oscillation circuit, 1 LDO chip and 1 DC2DC chip, as power supply supply, also need some capacitance resistance wares as peripheral components.
Under single-chip package technology, in a packing forms, only contain 1 nude film, VGA/YPbPr turns HDMI module needs multiple functions to realize, these functions cannot realize on a nude film, therefore need many nude films to encapsulate respectively, need a larger PCB version of area to realize the signal processing between multiple chips. It is larger that the VGA/YPbPr having encapsulated like this turns HDMI functional module interface volume, be unfavorable for carrying, and cost is higher.
It is single-chip package substantially that VGA/YPbPr turns the chip using in HDMI interface module, and employing integrated level is lower, the comparatively simple surrounding Flat type packaged form of technology. This packing forms utilizes wirebond routing mode, and single-chip is positioned in single packaging body, and routing technology is comparatively simple, and connected mode is also comparatively simple. Adopt this packing forms combination to realize VGA/YPbPr and turn HDMI interface module, system set is not high, and signal conductive performance is unstable. Every chips all needs independent encapsulation process, and cost is corresponding higher.
Summary of the invention
The object of the invention is to adopt system in package technology (SIP), reach and reduce VGA/YPbPr and turn HDMI interface module finished size, strengthen signal transmission, promote hot property and electrical property, cost-effective object.
To achieve these goals, the present invention proposes a kind of system in package technology, and the method is achieved like this:
Adopt system in package technology, utilize BGA substrate technology, combined leads bonding (wirebond) technology and SMT mount technology, VGA/YPbPr is turned to module and capacitance resistance ware indispensable in HDMI interface chip and be emitted on encapsulated moulding in a chips in mode stacking or tiling, realize the function of whole system with the form of single chips.
VGA/YPbPr provided by the invention turns HDMI interface module system in package technical characterstic, comprising:
Multi-chip stacked package: multi-chip stack technology is divided into tiling type system in package, the encapsulation of pile system level and 3D system in package;
What VGA/YPbPr turned the employing of HDMI interface chip system in package is tiling type system in package, and, on same base plate for packaging, chip is laid on substrate with two-dimensional approach. Based on the consideration of chip itself, all chips be all tiling put with substrate on, do not adopt the mode of lamination;
Passive device encapsulation: in the integration of complete machine or whole system, often some passive-type components and parts also can be sealed in system in package simultaneously. Such Passive components is substantially all to occur with finished product form, is mostly to carry out SMT paster when practical application, need to carry out equally SMT paster in system in package. In a very limited space, both having completed the encapsulation of nude film and chip, and also will complete the SMT paster of passive device, is a break-through point of system in package technology;
Signal mode of connection: wirebond connects and is connected with SMT paster. Realize VGA/YPbPr and turn HDMI interface module stacked package and both adopted traditional wirebond routing technology, also have the mounting technology of capacitance resistance ware. Nude film in stacked package and capacitance resistance ware are together in series various signals by copper cash and pcb board, reach corresponding fuction output.
Advantage and good effect that the present invention has are: VGA/YPbPr turns HDMI interface module finished product and adopts folded encapsulation technique, reaches the object of dwindling chip finished size; Adopt BGA encapsulation technology, make VGA/YPbPr turn HDMI interface chip and there is better heat-conductive characteristic; Substrate reasonably connects all signals, and when PCB size reduction, connecting path shortens, and the device that VGA/YpbPr is turned in HDMI interface module has good electrical property and signal transitivity; System in package is compared existing packaged type, has reduced the link of circulation, saves more human cost and material cost.
Brief description of the drawings
Fig. 1 is that VGA/YPbPr of the present invention turns HDMI interface module system in package technical schematic diagram;
Fig. 2 is that VGA/YPbPr of the present invention turns the folded envelope of HDMI interface module system in package technology diagrammatic side view;
Fig. 3 is that VGA/YPbPr of the present invention turns the folded envelope of HDMI interface module system in package technology diagrammatic top view.
Detailed description of the invention
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated. Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
VGA/YPbPr of the present invention turns the process of HDMI interface module system in package technology, and it comprises the steps:
S1: Wafer Thinning: adopt the mode of machinery or chemical machinery to grind from the disk back side, the thickness by Wafer Thinning to suitable encapsulation;
S2: disk cutting: after Wafer Thinning, can carry out scribing, chip is carried out to cutting according to the size of design;
S3: chip attach: by the chip attach having cut to the middle pad in framework. The size of pad need to be mated with die size;
S4: Bonding: be mainly with gold thread or copper cash, the PAD of chip is drawn to signal to PCB substrate by the mode of Wirebond routing;
S5: capacitance resistance ware mounts: capacitance resistance ware is mounted;
S6: plastic packaging injecting glue: mounted and can carry out the injection of plastic packaging material, protected whole chip;
S7: lettering is printed: character and the mark of stamping design on chip carrier;
S8: chip separates: in order to enhance productivity and to save material, most systems level encapsulation assembling is all to carry out in the mode of array combination, completes after encapsulation, be divided into single during.
Claims (5)
1. a system in package technology, is characterized in that, is applicable to VGA/YPbPr and turns the system in package technology of HDMI interface module.
2. system in package technology according to claim 1, is characterized in that, reduces VGA/YPbPr and turns HDMI interface module finished size, strengthens signal transmission, promotes hot property and electrical property.
3. system in package technology according to claim 2, is characterized in that, realizes VGA/YPbPr turn HDMI interface system function with the form of single chips.
4. system in package technology according to claim 3, it is characterized in that, adopt system in package technology, utilize BGA substrate technology, combined leads bonding (wirebond) technology and SMT mount technology, turn module and capacitance resistance ware indispensable in HDMI interface chip by VGA/YPbPr and be emitted on encapsulated moulding in a chips in mode stacking or tiling.
5. according to the system in package technology described in claim 3 or 4, it is characterized in that, possess multi-chip stacked package, passive device encapsulation, signal adopts the technical characterstic of wirebond connection and SMT paster connected mode.
Priority Applications (1)
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CN201511006363.7A CN105609497A (en) | 2015-12-29 | 2015-12-29 | System-level packaging technology for VGA/YPbPr-to-HDMI interface module |
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CN201511006363.7A CN105609497A (en) | 2015-12-29 | 2015-12-29 | System-level packaging technology for VGA/YPbPr-to-HDMI interface module |
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CN105609497A true CN105609497A (en) | 2016-05-25 |
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CN201511006363.7A Pending CN105609497A (en) | 2015-12-29 | 2015-12-29 | System-level packaging technology for VGA/YPbPr-to-HDMI interface module |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111106016A (en) * | 2019-12-25 | 2020-05-05 | 华天科技(西安)有限公司 | Solid state disk packaging method |
Citations (3)
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CN202077127U (en) * | 2011-05-05 | 2011-12-14 | 北京彩讯科技股份有限公司 | Video signal format conversion circuit |
US20120162531A1 (en) * | 2010-12-24 | 2012-06-28 | Hon Hai Precision Industry Co., Ltd. | Hdmi and vga compatible interface circuit |
KR20130134104A (en) * | 2012-05-30 | 2013-12-10 | 주식회사 한신정보기술 | Transmitting and receiving apparatus for hdmi or vga signal with usb port |
-
2015
- 2015-12-29 CN CN201511006363.7A patent/CN105609497A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120162531A1 (en) * | 2010-12-24 | 2012-06-28 | Hon Hai Precision Industry Co., Ltd. | Hdmi and vga compatible interface circuit |
CN202077127U (en) * | 2011-05-05 | 2011-12-14 | 北京彩讯科技股份有限公司 | Video signal format conversion circuit |
KR20130134104A (en) * | 2012-05-30 | 2013-12-10 | 주식회사 한신정보기술 | Transmitting and receiving apparatus for hdmi or vga signal with usb port |
Non-Patent Citations (1)
Title |
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JOHN LIU: "《Macrosilicon Technology Co.》", 24 June 2013 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111106016A (en) * | 2019-12-25 | 2020-05-05 | 华天科技(西安)有限公司 | Solid state disk packaging method |
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