CN105573402A - Current mirror amplifier layout structure and voltage regulator - Google Patents
Current mirror amplifier layout structure and voltage regulator Download PDFInfo
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- CN105573402A CN105573402A CN201410548949.5A CN201410548949A CN105573402A CN 105573402 A CN105573402 A CN 105573402A CN 201410548949 A CN201410548949 A CN 201410548949A CN 105573402 A CN105573402 A CN 105573402A
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Abstract
The invention provides a current mirror amplifier layout structure and a voltage regulator. The current mirror amplifier layout structure comprises a substrate and a trap region formed in the substrate. The trap region comprises a current mirror amplifier layout region. The current mirror amplifier layout region comprises a plurality of semiconductor units. A plurality of idle semiconductor units are formed between the current mirror amplifier layout region and the edge of the trap region. The plurality of idle semiconductor units in the current mirror amplifier layout region are connected to form a current mirror amplifier through interconnecting lines. The structure makes the semiconductor units the current mirror amplifier used prevent influence of trap proximity effect. Through uniform distribution of the semiconductor units on input and output ends, matching is further improved, harmful effect generated by different distribution positions is reduced, so that an actual amplification coefficient meets the design requirement. Output voltage of the voltage regulator which uses the current amplifier meets predicted output voltage, so as to provide stabilized voltage for a device.
Description
Technical field
The invention belongs to field of semiconductor manufacture, relate to a kind of current mirror amplifier layout structure and source of stable pressure.
Background technology
Current mirror (CurrentMirror) is also referred to as mirror current source, and when inputting a reference current at its input end, output size and Orientation is all equaled the output current of reference current by output terminal.The effect of current mirror to input the current copy of branch road to output branch road, to provide electric current to other subsystems.Current mirror principle is that so channel current is also identical if the gate source voltage of two identical metal-oxide-semiconductors is equal.By the metal-oxide-semiconductor number of change current mirror input end and the metal-oxide-semiconductor number of output terminal, input current can be amplified and export, obtain current mirror amplifier.
Band-gap reference (Bandgapvoltagereference) also simply can become band gap (Bandgap), utilize the voltage be directly proportional to temperature and diode drop sum, the two temperature coefficient is cancelled out each other, and realizes temperature independent voltage reference.Because the band gap voltage of its reference voltage and silicon is similar, be thus called band-gap reference.What in fact utilize is not band gap voltage.Now some bandgap structure output voltage and band gap voltage also inconsistent.Mimic channel extensively comprises reference voltage source and reference current source.This benchmark is DC quantity, and the relation of it and power supply and technological parameter is very little, but determines with the relation of temperature.
Reference current source refers to the high precision of the current reference being used as other circuit in Analogous Integrated Electronic Circuits, the current source of low-temperature coefficient.Current source, as the Key Circuit unit of Analogous Integrated Electronic Circuits, is widely used in operational amplifier, A/D converter, D/A converter.The design of bias current sources is copying based on a canonical reference current source existed, and then exports to other modules of system.Therefore, the precision of current source directly has influence on the precision and stability of whole system.
Along with process node is more and more less, under 55 nanometer technology nodes, NTO (newtapeout, new product rolls off the production line) just suffers bandgap current mirror amplifier output voltage and the inconsistent problem of predicted value.Such as, source of stable pressure requires output voltage 0.3V, and simulation result (predicted value) can reach the requirement of 0.3V, but actual silicon test result is 0.46V, is 150% of predicted value.In this source of stable pressure, have employed band gap current reference and two current mirror amplifiers, first current mirror amplifier is used for the output current of band gap current reference to amplify twice, the output current of the first current mirror is amplified twice by second current mirror amplifier further, thus obtain 4 times to the output current of initial current, this output current flows through a resistance, and the voltage-to-ground of this resistance is the output voltage of source of stable pressure.Nano-probe data show, and resistance is normal, second current mirror amplifier silicon test time result (silicondata) also consistent with simulation result, problem goes out on first current mirror.Refer to Fig. 1, be shown as the circuit layout of above-mentioned first current mirror amplifier, wherein MN1-5 and MN1-6 is two NMOS tube of current mirror amplifier input end, MN2-1, MN2-2, MN2-3 and MN2-4 are four NMOS tube of output terminal, MN3-1 and MN3-2 is the component units of other function element.MN1-5, MN1-6, MN2-1, MN2-2, MN2-3, MN2-4, MN3-1 and MN3-2 are all arranged in the well area 102 of substrate 101.Refer to Fig. 2, the drain saturation current recording input end MN1-5 and MN1-6 wants specific output to hold the drain saturation current of MN2-1, MN2-2, MN2-3 and MN2-4 little by about 40%, thus cause the enlargement factor of first current mirror to be about 3, and the enlargement factor of second current i ng is still 2, final enlargement factor is 3 × 2=6, and nonanticipating 4, thus create the result that source of stable pressure output voltage is predicted value 150%.
By analyzing discovery further, it is that it is all positioned at the fringe region of well area 102 that two NMOS tube MN1-5 and MN1-6 of input end show abnormal reason, such as, is 0.270 micron, there is trap proximity effect with the distance at well area 102 edge.And the distance at MN2-1, MN2-2, MN2-3 and MN2-4 of acting normally and well area 102 edge is respectively 1.860 microns, 1.770 microns, from well area edge relatively away from.
Therefore, a kind of current mirror amplifier layout structure and source of stable pressure is provided to be necessary with the problem solving actual enlargement factor and output voltage values and predicted value inconsistent.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of current mirror amplifier layout structure and source of stable pressure, changing for solving the unreasonable so that amplification coefficient of current mirror amplifier layout structure in prior art, causing source of stable pressure actual output voltage value and the inconsistent problem of predicted value.
For achieving the above object and other relevant objects, the invention provides a kind of current mirror amplifier layout structure, the well area comprising a substrate and be formed in described substrate, described well area comprises current mirror amplifier layout areas, described current mirror amplifier layout areas comprises some semiconductor units, be formed with some idle semiconductor units between described current mirror amplifier layout areas and described well area edge, the some semiconductor units in described current mirror amplifier layout areas connect into current mirror amplifier by interconnection line.
Alternatively, in described current mirror amplifier layout areas, the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed.
Alternatively, described semiconductor unit is PMOS or NMOS tube.
Alternatively, described current mirror amplifier comprises first group of NMOS tube and second group of NMOS tube, the grid of described first group of NMOS tube and second group of NMOS tube is interconnected, and is connected to the drain electrode of described first group of NMOS tube, the source grounding of described first group of NMOS tube and second group of NMOS tube; The drain electrode of described first group of NMOS tube is as the input end of current mirror amplifier, and the drain electrode of described second group of NMOS tube is as the output terminal of current mirror amplifier.
Alternatively, described first group of NMOS tube comprises m NMOS tube parallel with one another, and described second group of NMOS tube comprises n NMOS tube parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.
Alternatively, described current mirror amplifier comprises first group of PMOS and second group of PMOS, the grid of described first group of PMOS and second group of PMOS is interconnected, and being connected to the drain electrode of described first group of PMOS, the source electrode of described first group of PMOS and second group of PMOS is all connected to external power supply; The drain electrode of described first group of PMOS is as the input end of current mirror amplifier, and the drain electrode of described second group of PMOS is as the output terminal of current mirror amplifier.
Alternatively, described first group of PMOS comprises m PMOS parallel with one another, and described second group of PMOS comprises n PMOS parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.
The present invention also provides a kind of source of stable pressure, described source of stable pressure comprises a band gap current reference and adopts the Current amplifier mirror of layout structure described in above-mentioned any one, and the input end of described band gap current reference is connected with an external power supply, output terminal is connected with the input end of described current mirror amplifier.
Alternatively, described source of stable pressure comprises the first current mirror amplifier and the second current mirror amplifier, and the component units of described first current mirror amplifier is NMOS tube, and the component units of described second current mirror amplifier is PMOS; The input end that the input end of described first current mirror amplifier is connected to the output terminal of described band gap current reference, output terminal is connected to described second current mirror amplifier; The output terminal of described second current mirror amplifier is connected to the first resistance and the second resistance and ground connection successively; There is between described first resistance and the second resistance the output terminal of an exit as source of stable pressure.
As mentioned above, current mirror amplifier layout structure of the present invention and source of stable pressure, there is following beneficial effect: between (1) current mirror amplifier layout areas and well area edge, be formed with some idle semiconductor units, the semiconductor unit that current mirror amplifier is adopted avoids the impact of trap proximity effect (WellProximityeffect, WPE); (2) in current mirror amplifier layout areas, the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed, further improve the matching of current mirror amplifier input/output terminal, reduce the harmful effect that distributing position difference produces.The actual amplification coefficient of current mirror amplifier can be made to meet designing requirement by above measure, consistent with scale-up coefficient, meanwhile, make to adopt the output voltage of the source of stable pressure of this current amplifier also to meet prediction output voltage, for device provides stable voltage.
Accompanying drawing explanation
Fig. 1 is shown as circuit layout's schematic diagram of current mirror amplifier in prior art.
Fig. 2 is shown as the leakage current Id of current mirror amplifier input end and output terminal NMOS tube in prior art and the relation curve of drain voltage Vd.
Fig. 3 is shown as circuit layout's schematic diagram of current mirror amplifier of the present invention.
Fig. 4 is shown as the leakage current Id of input end in current mirror amplifier of the present invention, output terminal NMOS tube and idle NMOS tube and the relation curve of drain voltage Vd.
Fig. 5 is shown as the circuit diagram of source of stable pressure of the present invention.
Element numbers explanation
101,201 substrates
102,202 well areas
203 current mirror amplifier layout areas
204 semiconductor units
205 idle semiconductor units
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this instructions can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this instructions also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Refer to Fig. 3 to Fig. 5.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
The invention provides a kind of current mirror amplifier layout structure, refer to Fig. 3, be shown as circuit layout's schematic diagram of this current mirror amplifier, comprise a substrate 201 and be formed at the well area 202 (in Fig. 3 shown in dotted line frame) in described substrate 201, described well area 202 comprises current mirror amplifier layout areas 203, described current mirror amplifier layout areas 203 comprises some semiconductor units 204, some idle semiconductor units 205 are formed between described current mirror amplifier layout areas 202 and described well area 202 edge, some semiconductor units 204 in described current mirror amplifier layout areas 203 connect into current mirror amplifier by interconnection line.
Concrete, described substrate 201 includes but not limited to the conventional semiconductor substrates such as Si, Ge, SiGe, SOI, and described well area 202 is P trap or N trap.Described semiconductor unit 204 is PMOS or NMOS tube.Some semiconductor units 204 in described current mirror amplifier layout areas 203 connect into current mirror amplifier (in Fig. 3 not shown interconnection line) by interconnection line.
Concrete, described current mirror amplifier comprises first group of NMOS tube and second group of NMOS tube, the grid of described first group of NMOS tube and second group of NMOS tube is interconnected, and is connected to the drain electrode of described first group of NMOS tube, the source grounding of described first group of NMOS tube and second group of NMOS tube; The drain electrode of described first group of NMOS tube is as the input end of current mirror amplifier, and the drain electrode of described second group of NMOS tube is as the output terminal of current mirror amplifier.
Concrete, described first group of NMOS tube comprises m NMOS tube parallel with one another, and described second group of NMOS tube comprises n NMOS tube parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.This employing NMOS tube is p as the enlargement factor of the current mirror amplifier of semiconductor unit.
In another embodiment, described current mirror amplifier comprises first group of PMOS and second group of PMOS, the grid of described first group of PMOS and second group of PMOS is interconnected, and being connected to the drain electrode of described first group of PMOS, the source electrode of described first group of PMOS and second group of PMOS is all connected to external power supply; The drain electrode of described first group of PMOS is as the input end of current mirror amplifier, and the drain electrode of described second group of PMOS is as the output terminal of current mirror amplifier.
Concrete, described first group of PMOS comprises m PMOS parallel with one another, and described second group of PMOS comprises n PMOS parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.In like manner, this employing PMOS is also p as the enlargement factor of the current mirror amplifier of semiconductor unit.
As shown in Figure 3, in current mirror amplifier of the present invention, be formed with some idle semiconductor units 205 between described current mirror amplifier layout areas 202 and described well area 202 edge, described idle semiconductor unit 205 can be PMOS or NMOS tube.Idle semiconductor unit MN3-1, MN3-2, MN3-3 and MN3-4 of current mirror amplifier layout areas about 202 both sides have been shown in Fig. 3, and also there are some idle semiconductor units (non-label) described current mirror amplifier layout areas 202 left and right sides.According to the change of semiconductor unit number in described current mirror amplifier layout areas 201, the number of described idle semiconductor unit also can adjust accordingly.Exemplarily, in the present embodiment, described current mirror amplifier first group of NMOS tube comprises 2 NMOS tube MN1-1 parallel with one another and MN1-2, and second group of NMOS tube comprises 4 NMOS tube MN2-1 parallel with one another, MN2-2, MN2-3 and MN2-4, comprises altogether 6 NMOS tube.
The idle semiconductor unit of described current mirror amplifier layout areas 202 surrounding can ensure the marginal portion of the semiconductor unit for making current mirror amplifier away from described well area 202, thus avoids trap proximity effect (WellProximityeffect).
Refer to Fig. 4, be shown as the leakage current Id of input end in current mirror amplifier of the present invention, output terminal NMOS tube and idle NMOS tube and the relation curve of drain voltage Vd.As shown in the figure, the Id-Vd relation curve of input end and output terminal NMOS tube MN1 and MN2 overlaps, namely the NMOS tube of input end and the NMOS tube characteristic of output terminal identical, can matched well, namely the enlargement factor determined can be obtained by the NMOS tube number changing input end and output terminal, consistent with predicted value; And the drain saturation current of idle NMOS tube MN3 near well area edge is than the NMOS tube MN1 of current mirror amplifier layout areas and MN2 slow about 40%, be not suitable for the component units as current mirror amplifier.Also the distance showing idle semiconductor unit MN3-1 and well area 202 edge in Fig. 3 is 0.270 micron, there is trap proximity effect.And the distance at semiconductor unit in current mirror magnifier layout areas and well area 202 edge is respectively 1.860 microns, 1.770 microns, can avoid this impact.
In fact, described idle semiconductor unit 205 not truly idle, described idle semiconductor unit 205 also may be used for the lower device of other accuracy requirement.
Especially, in described current mirror amplifier layout areas 203, the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed.It should be noted that, described herein being uniformly distributed refers to that the number that the semiconductor unit of input end and the semiconductor unit of output terminal distribute up and down in current mirror amplifier layout areas 203 is even.Exemplarily, current mirror amplifier comprises 6 NMOS tube as shown in Figure 3, wherein two NMOS tube MN1-1 and MN1-2 of input end lay respectively at the upper left corner and the lower right corner of current mirror amplifier layout areas 203, and four NMOS tube MN2-1 of output terminal, MN2-2, MN2-3 and MN2-4 lay respectively at the upper right corner, left, the right and lower left corner.Being uniformly distributed like this, effectively can reduce current mirror amplifier input end semiconductor unit and the position difference of output terminal semiconductor unit in well area, make the semiconductor unit matched well of input end and output terminal, and amplification coefficient is stablized.Current mirror amplifier is comprised to the situation of the semiconductor unit of other number, flexible arrangement can be carried out based on above principle, substantially be uniformly distributed, should too not limit the scope of the invention herein.
In current mirror amplifier layout structure of the present invention, some idle semiconductor units are formed between current mirror amplifier layout areas and well area edge, the semiconductor unit that current mirror amplifier is adopted avoids the impact of trap proximity effect (WellProximityeffect, WPE); And in current mirror amplifier layout areas, the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed, and further improve the matching of current mirror amplifier input/output terminal, reduce the harmful effect that distributing position difference produces.The actual amplification coefficient of current mirror amplifier can be made to meet designing requirement by above measure, consistent with scale-up coefficient.
The current mirror amplifier of current mirror amplifier layout structure of the present invention is adopted to be applied to source of stable pressure, for device provides the burning voltage of at particular voltage level.Refer to Fig. 5, be shown as the circuit diagram of source of stable pressure of the present invention, as shown in the figure, this source of stable pressure comprises a band gap current reference BGR (BandGapReference) and adopts the Current amplifier mirror of above-mentioned layout structure, and the input end of described band gap current reference BGR is connected with an external power supply (for 3.3V), output terminal is connected with the input end of described current mirror amplifier.
Exemplarily, described source of stable pressure comprises two current mirror amplifiers, is respectively the first current mirror amplifier and the second current mirror amplifier.The component units of described first current mirror amplifier is NMOS tube, and the component units of described second current mirror amplifier is PMOS; The input end that the input end of described first current mirror amplifier is connected to the output terminal of described band gap current reference, output terminal is connected to described second current mirror amplifier; The output terminal of described second current mirror amplifier is connected to the first resistance R1 and the second resistance R2 and ground connection successively; There is between described first resistance R1 and the second resistance R2 the output terminal of an exit PTAT8 as source of stable pressure.
Exemplarily, described first current mirror amplifier comprises 6 NMOS tube NOD33LL, wherein the NMOS tube quantity M=2 of input end, the NMOS tube quantity M=4 of output terminal, enlargement factor is 2, this 6 NMOS tube measure-alike, and breadth length ratio is W/L=1/5 (um).The grid of the NMOS tube of input end NMOS tube and output terminal is interconnected, the wherein NMOS tube quantity M=2 of input end, the NMOS tube quantity M=4 of output terminal, enlargement factor is 2, and be connected to the drain electrode of described input end NMOS tube, the source grounding of input end NMOS tube and output terminal NMOS tube; The drain electrode of input end NMOS tube as the input end of current mirror amplifier, export collect together NMOS tube drain electrode as the output terminal of the first current mirror amplifier.The output current I2 of the first current mirror amplifier is the twice of input current I1.
Exemplarily, the second described current mirror amplifier comprises 6 PMOS P12LL, wherein the PMOS quantity M=2 of input end, the PMOS quantity M=4 of output terminal, enlargement factor is 2, this 6 NMOS tube measure-alike, and breadth length ratio is W/L=2/2 (um).The grid of input end PMOS and output terminal PMOS is interconnected, and is connected to the drain electrode of input end PMOS, and the source electrode of input end PMOS and output terminal PMOS is all connected to external power supply (for 1.2V); The drain electrode of input end PMOS is as the input end of the second current mirror amplifier, and the drain electrode of output terminal PMOS is as the output terminal of current mirror amplifier.The output current I3 of the second current mirror amplifier is the twice of input current I2, is four times of the first current mirror input current I1, i.e. I3=2 × I2=4 × I1.
The voltage-to-ground of the PTAT8 of source of stable pressure shown in Fig. 5 and the output voltage of source of stable pressure, its simulation result is 0.3V, and actual silicon test result is also 0.3V, with predict the outcome consistent.Illustrate and adopt the output voltage of the source of stable pressure of current amplifier of the present invention can meet prediction output voltage, for device provides stable voltage.
It may be noted that; be the current mirror amplifier of 2 for enlargement factor, in the present embodiment, the semiconductor unit quantity of input end and output terminal is 2/4; but in other embodiments; input end and output terminal semiconductor unit quantity also can be 3/6,4/8 etc., input end and output terminal semiconductor unit quantity more; current mirror amplifier is more stable; but corresponding volume also can become large, can carry out corresponding choice, should too not limit the scope of the invention according to device specific requirement herein.
In sum, current mirror amplifier layout structure of the present invention and source of stable pressure, there is following beneficial effect: between (1) current mirror amplifier layout areas and well area edge, be formed with some idle semiconductor units, the semiconductor unit that current mirror amplifier is adopted avoids the impact of trap proximity effect (WellProximityeffect, WPE); (2) in current mirror amplifier layout areas, the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed, further improve the matching of current mirror amplifier input/output terminal, reduce the harmful effect that distributing position difference produces.The actual amplification coefficient of current mirror amplifier can be made to meet designing requirement by above measure, consistent with scale-up coefficient, meanwhile, make to adopt the output voltage of the source of stable pressure of this current amplifier also to meet prediction output voltage, for device provides stable voltage.So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (9)
1. a current mirror amplifier layout structure, the well area comprising a substrate and be formed in described substrate, described well area comprises current mirror amplifier layout areas, described current mirror amplifier layout areas comprises some semiconductor units, it is characterized in that: be formed with some idle semiconductor units between described current mirror amplifier layout areas and described well area edge, the some semiconductor units in described current mirror amplifier layout areas connect into current mirror amplifier by interconnection line.
2. current mirror amplifier layout structure according to claim 1, is characterized in that: in described current mirror amplifier layout areas, and the semiconductor unit of current mirror amplifier input end and the semiconductor unit of output terminal are uniformly distributed.
3. current mirror amplifier layout structure according to claim 1, is characterized in that: described semiconductor unit is PMOS or NMOS tube.
4. current mirror amplifier layout structure according to claim 3, it is characterized in that: described current mirror amplifier comprises first group of NMOS tube and second group of NMOS tube, the grid of described first group of NMOS tube and second group of NMOS tube is interconnected, and be connected to the drain electrode of described first group of NMOS tube, the source grounding of described first group of NMOS tube and second group of NMOS tube; The drain electrode of described first group of NMOS tube is as the input end of current mirror amplifier, and the drain electrode of described second group of NMOS tube is as the output terminal of current mirror amplifier.
5. current mirror amplifier layout structure according to claim 4, is characterized in that: described first group of NMOS tube comprises m NMOS tube parallel with one another, and described second group of NMOS tube comprises n NMOS tube parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.
6. current mirror amplifier layout structure according to claim 3, it is characterized in that: described current mirror amplifier comprises first group of PMOS and second group of PMOS, the grid of described first group of PMOS and second group of PMOS is interconnected, and being connected to the drain electrode of described first group of PMOS, the source electrode of described first group of PMOS and second group of PMOS is all connected to external power supply; The drain electrode of described first group of PMOS is as the input end of current mirror amplifier, and the drain electrode of described second group of PMOS is as the output terminal of current mirror amplifier.
7. current mirror amplifier layout structure according to claim 6, is characterized in that: described first group of PMOS comprises m PMOS parallel with one another, and described second group of PMOS comprises n PMOS parallel with one another, wherein, and n=p × m, 1≤m≤8, p >=2.
8. a source of stable pressure, it is characterized in that: described source of stable pressure comprises a band gap current reference and adopts the current mirror amplifier of layout structure described in claim 1 ~ 7 any one, and the input end of described band gap current reference is connected with an external power supply, output terminal is connected with the input end of described current mirror amplifier.
9. source of stable pressure according to claim 8, it is characterized in that: described source of stable pressure comprises the first current mirror amplifier and the second current mirror amplifier, the component units of described first current mirror amplifier is NMOS tube, and the component units of described second current mirror amplifier is PMOS; The input end that the input end of described first current mirror amplifier is connected to the output terminal of described band gap current reference, output terminal is connected to described second current mirror amplifier; The output terminal of described second current mirror amplifier is connected to the first resistance and the second resistance and ground connection successively; There is between described first resistance and the second resistance the output terminal of an exit as source of stable pressure.
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| CN111474980A (en) * | 2020-05-14 | 2020-07-31 | 华大半导体有限公司 | Current mirror circuit |
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Application publication date: 20160511 |