CN105549901B - Spaceborne synthesization mass data storage and playback apparatus - Google Patents
Spaceborne synthesization mass data storage and playback apparatus Download PDFInfo
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- CN105549901B CN105549901B CN201510892022.8A CN201510892022A CN105549901B CN 105549901 B CN105549901 B CN 105549901B CN 201510892022 A CN201510892022 A CN 201510892022A CN 105549901 B CN105549901 B CN 105549901B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0608—Saving storage space on storage systems
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
- G06F11/2094—Redundant storage or storage space
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
- G06F3/0623—Securing storage systems in relation to content
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
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Abstract
A kind of spaceborne synthesization mass data storage disclosed by the invention and playback apparatus, integrated data interface module carries out time attitude data and management and control information exchange by frequency standard signal connector, fiber optic Ethernet connector and comprehensive number pipe computer, synthesization data transfer is carried out by optical fiber integrated data connector and imaging sensor, under uniform protocol control, imaging sensor, microwave aperture and load data source are subjected to synthesization pretreatment and storage；Comprehensive storage control module is controlled storage device switching on and shutting down OC instructions, malfunction monitoring and dynamic refresh；Mass data storage module receives the control instruction of comprehensive storage control module transmission by FPGA, and report health, state and fault message to comprehensive storage control module, integrated data from integrated data interface module is received by high-speed interface unit, and realize that ECC encoding and decoding, equalization algorithm and bad block are rejected by data pre-processing unit, data are stored into solid-state memory array.
Description
Technical field
The present invention relates to a kind of spaceborne synthesization mass data storage and playback apparatus, belong to spaceborne data acquisition and storage
Field.
Background technology
Since China's land resources are limited, it is difficult to substantial amounts of grounded receiving station is set abroad, for satellite overseas
Data can only store on star, again by data readback when satellite passes by, so there is an urgent need to a kind of capacity is big, access speed is fast,
Spaceborne data storage device small, low in energy consumption；Again since space flight storage device is related to space exploration or in-orbit test data
It can intactly preserve, and reliably reach in the hand of ground experiment personnel, and then determine the performance of space science task, because
And spaceborne storage system is the important component of space travel platform clectronic system, its property relationship space travel task
Success or failure, with the development and raising of technology and mission requirements, spaceborne storage system completes logger task, storage management, memory
Outside the functions such as playback, it is also necessary to severe space environment is adapted to, can synthesization storage and playback to a variety of mass data sources
Device requirement is more aobvious urgent.
Traditional spaceborne storage system builds system by elementary cell of each standalone module, and this system is more for specific
Based on the design of being customized of data type, design Storage such as is carried out for image, voice data, is not possessed unifying, comprehensive
The design Storage theory and thought of combination, and most of storage devices continue to use aviation storage system, do not consider that space environment is prevented
Shield ability, often results in and fails in severe space environment, causes irredeemable application and economic loss, and this system
Once building up, do not possess lasting extension, upgrading, business growth ability, and module interface, based on customizing, species is various, interface
Speed is low, and information interface is complicated and unintelligible, and resource utilization is weak, cause capacity is low, volume is big, weight is high, power consumption is big, operation
The problems such as property is poor, failsafe link is more, expensive, makes Practical Project model task face excessive risk.Actual work based on more than
The active demand of Cheng Yingyong, at present, has carried out corresponding research both at home and abroad, but more satellite applications for gigabit capacity are put down
Platform, fundamental design idea are designed, interface rate and chip using veneer even single-chip as core around single data type
Limited performance, it is difficult to meet the functional parameter demand of large-scale task, do not possess directive significance to large-scale space mission.
Space industry begins one's study large capacity solid-state memory from the 1990s in the world, starts within 1996 to put into business
Industry is used.As VCI companies and the JPL laboratories in the U.S. cooperate, DRAM classes chip is used to be ground for the Cassini spacecraft designs of NASA
A tentative solid-state memory has been made, has used solid-state memory of the 4Mbits DRAM designs capacity for 2Gbits.It is same with this
When, Hubble space telescopes etc. also begin to progressively replace the magnetic tape station installed and used in the past with solid-state memory, make its storage
Capacity once rises to 12Gbits, improves nearly 10 times more in the past, reliability also obtains larger raising.The in the 21st century, second generation
Large capacity solid-state memory comes out.Fairchild company of the U.S. have developed the solid-state storage plate for ATHENA remote sensing satellites using SRAM
Card.The data transmission system of U.S.'s F-16 fighter planes selected SRAM type memory, and maintains data with battery.2005
The CRYOSAT satellites manufactured by European Astrium companies of transmitting, also carry the solid-state of a 288Gbits based on SRAM
Memory module, but above state peripheral storage device is deposited that synthesization date storage method is limited, storage capacity is small, it is unified big not possess
Capacity storage management function, space environment preventive means are single, it is impossible to realize that multiple data sources carry out in same storage system
Record and playback, system composition is independent, scattered, limited to the enabling capabilities of high-performance, extensive space mission.
Domestic aspect, Application No. 201510180494.0 it is disclosed《A kind of expansible spaceborne large capacity of capacity is deposited
Storage system》A kind of spaceborne mass-storage system is proposed, but the spaceborne mass-storage system is irredundant prevents with space environment
Shield design, when single-particle inversion occurs phenomena such as when, will cause storage device to fail, and the patent application in addition does not have polymorphic type
The integrated data storage tube of sensor and reason function, storage that can not be to data carry out management and control of overall importance with retaking of a year or grade,
Data are stored need to rely on each module complete independently with retaking of a year or grade, single particle effect detection with recovering function, and integrated level is poor, in causing
Between link it is excessive, the problem of failsafe link increase, the in addition patent application is carried out logical between multimode using MLVDS bus interface
Letter, since MLVDS interfaces limit the harsh of module and backboard cabling, signal integrity with required in electric property it is high,
Reliability reduces in aerospace project, and data design Storage of the patent application without synthesization, low to electric load utilization rate,
Thus actually use and be limited in large-scale space platform, engineer application is poor.
From the foregoing, it will be observed that from the practical application request of satellite, spaceborne mass-memory unit application both at home and abroad at present
Limitation is concentrated mainly on the following aspects：
1st, the synthesization storage management ability of multivariate data is lacked；2nd, data record and playback rate are relatively low；3rd, storage is held
Measure limited；3rd, do not possess more complete a variety of space environment preventive means and ability.
The content of the invention
In order to overcome the above-mentioned deficiencies of the prior art, the present invention provides a kind of high integration, low-power consumption, highly reliable, no
Additional hardware resources are taken, the synthesization storage management ability with multivariate data, data record playback rate is high, memory capacity
Big spaceborne synthesization mass data storage and playback apparatus.To solve, existing spaceborne electronic storage device interface is various, function
Independent and autgmentability difference problem.
The technical solution adopted in the present invention is：A kind of spaceborne synthesization mass data storage and playback apparatus, including, Gu
Integrated data interface module, comprehensive storage control module, mass data storage module, the secondary power supply module being scheduled on backboard
And cabinet connector, it is characterised in that：Using one piece of internal circuit 1:The FPGA boards composition secondary power supply module of 1 redundancy, is adopted
With 1:Two pieces of CPU+FPGA boards composition integrated data interface module of 1 redundancy backup, using 1:Two pieces of aerospace of 1 redundancy backup
The comprehensive storage control module of level CPU+FPGA board compositions；Integrated data interface module by frequency standard signal connector, optical fiber with
Too net connector carries out time attitude data and management and control information exchange with comprehensive number pipe computer, is patched by optical fiber integrated data
Part carries out synthesization data transfer with imaging sensor, microwave aperture, payload, under unified protocol integrated test system, by image
Sensor, microwave aperture and load data source carry out synthesization pretreatment and storage；Comprehensive storage control module provides renewal and deposits
The field programmable gate array of each module of equipment and the configuration file of processor are stored up, storage device switching on and shutting down OC instructions are controlled
System, malfunction monitoring and dynamic refresh；Mass data storage module is pre- with CAN interface unit, board dispensing unit, data respectively
Processing unit, the field programmable gate array connection of high-speed interface unit connection；Wherein, field programmable gate array passes through CAN
Interface unit receives the control instruction that comprehensive storage control module is sent, and reports health, state to comprehensive storage control module
With fault message, the program that the global configuration unit transmission in comprehensive storage control module is received by board dispensing unit loads
With failure refresh data, the integrated data from integrated data interface module is received by high-speed interface unit, and pass through data
Pretreatment unit realizes that ECC encoding and decoding, equalization algorithm and bad block are rejected, and data are stored into solid-state memory array, comprehensive
Data pre-processing unit custom protocol in field programmable gate array built in data interface module, respectively to image sensing
Device, microwave aperture and 16 bit width initial data of payload output in satellite are cached, are rearranged, fill data bit
And packaging operation, and export 64 bit width integrated datas to mass data storage mould high-speed interface unit 2 in the block and deposited
Storage.
The present invention has the advantages that compared with prior art.
The present invention changes tradition for the global design of space technology and special application field technical field storage device
Spaceborne storage system builds design method and thinking by elementary cell of each standalone module, using multivariate data synthesization
Storage system, designs a kind of spaceborne synthesization mass data storage and playback apparatus, its advantage and is presented as：
It is high integration, low-power consumption, highly reliable, it is not take up additional hardware resources.The present invention uses 1:Two pieces of 1 redundancy backup
FPGA boards form mass data storage module；Using one piece of internal circuit 1:The FPGA boards composition of 1 redundancy is secondary
Power module, using 1:Two pieces of CPU+FPGA boards composition integrated data interface module of 1 redundancy backup, using 1:1 redundancy is standby
The comprehensive storage control module of two pieces of aerospace level CPU+FPGA boards composition of part；CPU uses the internal resource of FPGA on plate to realize,
It is not take up additional hardware resources.Theory based on modularized design, reduces assembling and is adapted to difficulty with interface, reduces middle ring
Section, improves reliability, reduces engineering risk.Cabinet is reinforced using Space VPX boards, realizes that multivariate data synthesization records
Designed with playback, reduce module number, reduce number of devices and redundant interface, meet spatial complex application environment and various
Experiment condition, while there is high integration, low-power consumption, highly reliable, strong autgmentability.
Synthesization storage management ability with multivariate data.Integrated data interface module of the present invention is connect by frequency standard signal
Plug-in unit, fiber optic Ethernet connector and comprehensive number pipe computer carry out time attitude data and management and control information exchange, pass through optical fiber
Integrated data connector carries out synthesization data transfer with imaging sensor, microwave aperture, payload, in unified agreement control
Under system, by imaging sensor, microwave aperture and load data source carry out synthesization pretreatment and storage, improve load utilization rate with
Standardization level；Synthesization storage management ability with multivariate data.
Data record playback rate is high.The data in field programmable gate array built in integrated data interface module are located in advance
Unit custom protocol is managed, it is original to imaging sensor, microwave aperture and 16 bit widths of payload output in satellite respectively
Data are cached, rearranged, filling data bit and packaging operation, and export 64 bit width integrated datas to Large Volume Data
High-speed interface unit 2 in memory module is stored, and more complete aggregation of data management is realized under unified framework
It is high with control function, data record playback rate.
Memory capacity is big.Mass data storage module field programmable gate array is received by CAN interface unit and integrated
The control instruction that storage control module is sent, and health, state and fault message are reported to comprehensive storage control module, pass through plate
Card dispensing unit receives program loading and the failure refresh data that the global configuration unit in comprehensive storage control module is sent, and leads to
Cross high-speed interface unit and receive the integrated data from integrated data interface module, and ECC is realized by data pre-processing unit
Encoding and decoding, equalization algorithm and bad block are rejected, and data are stored into solid-state memory array, and the synthesis designed by synthesization is deposited
Storage control module realizes health control and fault recovery function to each module in each storage device.Solves the spaceborne electricity of the prior art
Sub- storage device interface is various, functional independence and autgmentability difference problem.
It the composite can be widely applied to the synthesization mass data storage field of large-scale space travel platform and electric load.
Brief description of the drawings
Fig. 1 is the spaceborne synthesization mass data storage of the present invention and playback apparatus structure diagram.
Fig. 2 is that each unit connects block diagram in Fig. 1 integrated data interface modules.
Fig. 3 is each unit connection block diagram in Fig. 1 synthesis storage control modules.
Fig. 4 is that each unit connects block diagram in Fig. 1 mass data storage modules.
Fig. 5 is the self-defined framing format of Fig. 1 integrated data interface module integrated datas.
Fig. 6 is the spaceborne synthesization mass data storage of the present invention and playback workflow block diagram.
Embodiment
With reference to specific embodiment, the present invention is described in detail.Following embodiments will be helpful to the technology of this area
Personnel further understand the present invention, but the invention is not limited in any way.It should be pointed out that the ordinary skill to this area
For personnel, without departing from the inventive concept of the premise, various modifications and improvements can be made.These belong to the present invention
Protection domain.The present invention is further described below in conjunction with the accompanying drawings.
Refering to Fig. 1.A kind of spaceborne synthesization mass data storage and playback apparatus, including, the synthesis being fixed on backboard
Data interface module, comprehensive storage control module, mass data storage module, secondary power supply module and cabinet connector.Adopt
With one piece of internal circuit 1:The FPGA boards composition secondary power supply module of 1 redundancy, using 1:Two pieces of CPU+FPGA of 1 redundancy backup
Board forms integrated data interface module, using 1:The comprehensive storage of two pieces of aerospace level CPU+FPGA boards composition of 1 redundancy backup
Control module；Wherein：Each module interconnects realization by backboard and interconnects.Each module meets 6U dimensional standards in storage device,
Meet Space VPX electrical standards.Secondary power supply module will be converted into 5V all the way by 100V direct currents primary power source input voltage all the way
With 28V direct voltage outputs all the way, wherein first via 5V direct current outputs supply for CAN interface unit in each module in storage device
Electricity, the second road 28V direct current outputs are connect for each module power circuit power supply, comprehensive storage control module in storage device by CAN
Mouth unit controls each module of magnetic latching relay progress of each module in storage device plus goes electrically operated.CAN interface unit is adopted
With the bus marco chip and 82C250 drivers of model SJA1000.Integrated data interface module is patched by frequency standard signal
Part, fiber optic Ethernet connector and comprehensive number pipe computer carry out time attitude data and management and control information exchange, comprehensive by optical fiber
Close data connector and carry out synthesization data transfer with imaging sensor, microwave aperture, payload；Secondary power supply module passes through
Power connector provides exterior 100V plant-grid connections backboard to 5V, 12V DC voltage for each module in system；Comprehensive storage control
Molding block provides the support to each module unified management in system, is responsible for updating storage the field-programmable gate array of each module of equipment
The configuration file of row and processor, and realize control, malfunction monitoring and dynamic refresh work(to storage device switching on and shutting down OC instructions
Energy.Backboard is integrated data interface module, comprehensive storage control module, mass data storage module, secondary power supply module carry
For physical interconnections resource.
Refering to Fig. 2.Integrated data interface module is by 1:Two pieces of CPU+FPGA boards composition of 1 redundancy backup, redundancy backup
Two pieces of aerospace level CPU+FPGA boards in the antifuse frameworks that use of FPGA1 carry out highly reliable Integration Design, two boards
State is mutually detected by the FPGA1 heartbeats realized between card, carries out board active-standby switch, the interface form of heartbeat is same
The communication bus SPI of step.Wherein, to be not take up additional hardware resources, CPU uses on-site programmable gate array FPGA 1 on plate
Internal resource is realized；On-site programmable gate array FPGA 1 by integrated data interface unit be electrically connected frequency standard signal interface unit,
Gigabit ethernet interface unit, the first board dispensing unit and data buffer unit, the second board dispensing unit, CAN interface list
Member, high-speed interface unit are connected on on-site programmable gate array FPGA 1, wherein, field programmable gate array passes through comprehensive number
According to interface unit, the data of imaging sensor, microwave aperture, payload are cached, and by imaging sensor, microwave hole
Footpath, the data read-out of payload, are parsed, and realize the reception of integrated data.On-site programmable gate array FPGA 1 passes through thousand
Mbit ethernet interface unit is connected with fiber optic Ethernet connector, receives parameter, control instruction that comprehensive number pipe computer is sent
With upper note program, the satellite time, frequency and the appearance that are sent from comprehensive number pipe computer are received by frequency standard signal interface unit
State information, the control instruction that comprehensive storage control module sends is received by CAN interface unit, and to comprehensive storage control module
Report health, state and fault message.Under the domination of comprehensive storage control module, on-site programmable gate array FPGA 1 passes through
Integrated data is distributed in mass data storage module and is stored by high-speed interface unit, and on comprehensive number pipe computer
Report the remote measurement amount such as health, state and fault message of each module in storage device.
On-site programmable gate array FPGA 1 uses a piece of Xilinx Virtex6 XCVSX315T-2 FF1759 chips, uses
In by integrated data interface unit, the data of imaging sensor, microwave aperture, payload are cached, and by image
Sensor, microwave aperture, the data read-out of payload, are parsed, and realize the reception of integrated data, for being stored comprehensive
Integrated data is distributed to by mass data storage mould high quick access in the block by high-speed interface unit 1 under the domination of control module
Mouth unit 2.High-speed interface unit utilizes high speed serialization transceiver stone GTX built-in in field programmable gate array 1 to realize, will
Parallel data is converted to high-speed serial data, can be configured to 1 ×, 2 × with 4 × Three models, realize respectively 3.125Gbps,
6.25Gbps and tri- kinds of effective transmission speeds of 12.5Gbps；Data buffer unit is by 8 model MT41K512M4DA-125's
DDR3 chips are formed with the DDR3 controllers realized in programmable gate array 1 at the scene, capacity 16Gbits；Board configuration is single
Member is made of 2 nonvolatile storage XCF32P chips, and the loading for completing configuration file is stored with curing；Integrated data connects
Pre-processing image data unit in mouth unit is made of 3 model DS90CR288A chips, is completed Camera Link is low
Pressure differential serial signals switch to parallel data and clock signal is exported to field-programmable gate array 1, and by may be programmed at the scene
View data is cached, rearranged, filling data bit, packaging operation by the custom protocol that gate array 1 is realized, will be defeated respectively
The 14 bit width vision sensor datas entered are changed and export 64 bit width vision sensor datas, pass through high-speed interface unit 1
Integrated data is distributed to mass data storage mould high-speed interface unit 2 in the block.Image pre-processing unit is realized all the way
The Camera Link interfaces of FULL pattern configurations, imaging sensor output size are 512*512*14bits*60 frames, during pixel
Clock is the view data of 80MHz；Microwave pore size data pretreatment unit in integrated data interface unit is by 21 TI
10 bit resolutions of ADC10D1500,1.5GSPS sample rate modulus conversion chips are connected to field programmable gate array 1 and form, and adopt
Carried out data transmission with JEDS 204B agreements, use custom protocol in programmable gate array 1 at the scene by transformed data
High-speed interface unit 1 is sent into, is sent to high-speed interface unit 2；Payload data pretreatment in integrated data interface unit
Unit utilizes high speed serialization transceiver stone GTX built-in in field programmable gate array 1 to realize, converts parallel data into height
Fast serial data, can be configured to 1 ×, 2 × with 4 × Three models, realize 3.125Gbps, 6.25Gbps and 12.5Gbps respectively
Three kinds of effective transmission speeds, send load data into high-speed interface unit 1, send to high-speed interface unit 2.
Integrated data interface module shown in present embodiment Fig. 2 is connect by on-site programmable gate array FPGA 1, integrated data
Mouth unit, frequency standard signal interface unit, data buffer unit, board dispensing unit, gigabit ethernet interface unit, CAN interface
Unit, high-speed interface unit 1 form.On-site programmable gate array FPGA 1 connects with integrated data interface unit, frequency standard signal respectively
Mouthful unit, data buffer unit, board dispensing unit, gigabit ethernet interface unit, board dispensing unit, CAN interface unit,
High-speed interface unit 1 connects；
Refering to Fig. 3.On-site programmable gate array FPGA 2 built in comprehensive storage control module and storage device failure processing are single
Member, is made of the CAN interface unit of electrical connection on-site programmable gate array FPGA 2, global configuration unit and aerospace level CPU；It is existing
Field programmable gate array FPGA2 is connected with CAN interface unit, global configuration unit respectively, and storage device failure processing unit leads to
Cross storage device global configuration bus and detect each module dispensing unit state, it is determined whether single-particle inversion, bolt-lock effect occurs,
Communicated by the local bus of field programmable gate array with storage device global configuration unit.Storage device global configuration
Unit is realized to each module on-site programmable gate array FPGA 2 and CPU in storage device by storage device global configuration bus
Configuration, failure monitoring and management, and under the control of storage device failure processing unit, complete the dynamic to can configure device
Refresh function, realizes that single-particle inversion recovers function.
On-site programmable gate array FPGA 2 uses a piece of Xilinx Virtex-4QV XQR4VFX140-10 CF1509 spaces
Boat level chip is connected with CAN interface unit, global configuration unit respectively；Wherein, field programmable gate array is used to connect by CAN
Mouthful unit each module into storage device sends control instruction, and collect each module reports in storage device health, state with
Fault message, for being loaded by global configuration unit to other modules in storage device into line program, power detecting and control,
Realize the long-range renewal to configuration file retaking of a year or grade detection and configuration file, realize to the field-programmable gate array in malfunctioning module
Row are reconfigured, and carry out self- recoverage control；
Refering to Fig. 4.Mass data storage module is by the solid-state storage that is electrically connected around on-site programmable gate array FPGA 3
Device array, high-speed interface unit, CAN interface unit, board dispensing unit and be built in FPGA3 data pre-processing units composition.
The on-site programmable gate array FPGA 3 respectively with CAN interface unit, board dispensing unit, data pre-processing unit, high speed
Interface unit connects.On-site programmable gate array FPGA 3 receives the control of comprehensive storage control module transmission by CAN interface unit
System instruction, health, state and fault message are reported to comprehensive storage control module；Comprehensive storage is received by board dispensing unit
The program loading and failure refresh data that global configuration unit in control module is sent；Received and come from by high-speed interface unit
The integrated data of integrated data interface module, and realize that ECC encoding and decoding, equalization algorithm, bad block pick by data pre-processing unit
Except function, data are stored into solid-state memory array.On-site programmable gate array FPGA 3 uses three pieces Xilinx
Virtex6 XCVSX315T-2 FF1759 chips, for receiving what comprehensive storage control module was sent by CAN interface unit
Control instruction, and health, state and fault message are reported to comprehensive storage control module, for being received by board dispensing unit
The program loading and failure refresh data that global configuration unit in comprehensive storage control module is sent, for passing through high-speed interface
Unit receives the integrated data from integrated data interface module, and realizes ECC encoding and decoding, equilibrium by data pre-processing unit
Algorithm, bad block removing function, data are stored into solid-state memory array.Solid-state memory array uses 48 monolithic density
For 512Gbits, the NAND FLASH chips of depth 8bits, model MT29F512G08AUCBBH8-6, composition is effectively deposited
The large capacity solid-state memory array of the common 24Tbits of capacity is stored up, will be comprehensive under the control of Multi-ported Data storage control unit
Close data to write in the mass data storage module of three pieces of common 72Tbits available capacities, complete the record operation of integrated data.
64 bit width vision sensor datas of the data pre-processing unit reception from the transmission of integrated data interface module,
176 bit width microwave pore size datas, 64 bit width payload datas, progress can realize error checking and correct wrong technology
Memory ECC encoding and decoding, equalization algorithm, bad block reject operation, realize and the triplication redundancy for the critical data that prestores entangled with Hamming
Miscoding operates, and the data storage of large capacity using modified RS codings (256,252), the detection of quasi- loop error and is corrected
EDAC encoding operations, realize space environment safeguard function, and by complete pretreatment 64 bit width vision sensor datas, 176
Bit width microwave pore size data, 64 bit width payload datas are respectively sent to view data storage control interface unit, micro-
Ripple pore size data storage control interface unit, payload data storage control interface unit.
The view data storage control interface unit of mass data storage module is received to be sent out from data pre-processing unit
The 64 bit width vision sensor datas sent, produce the initial address of simultaneously output access large capacity integrated data buffer unit, and
View data is write into large capacity integrated data buffer unit.
Mass data storage module microwave pore size data stores control interface unit, and reception comes from data pre-processing unit
The 176 bit width microwave pore size datas sent, produce the initial address of simultaneously output access large capacity integrated data buffer unit, and
Microwave pore size data is write into large capacity integrated data buffer unit.
The payload data storage control interface unit of mass data storage module, reception come from data prediction list
The 64 bit width payload datas that member is sent, produce the initial address of simultaneously output access large capacity integrated data buffer unit,
And payload data is write into large capacity integrated data buffer unit.
The large capacity integrated data cache interface unit of mass data storage module, receives from view data storage control
Interface unit processed, microwave pore size data storage control interface unit, payload data storage control interface unit output it is comprehensive
Data and read/write address are closed, and integrated data is stored in solid-state memory array.
The Multi-ported Data storage control unit of mass data storage module, connects with view data storage control respectively
Mouth unit, microwave pore size data storage control interface unit, payload data storage control interface unit and large capacity synthesis
Data cache interface unit connects, and passes through the Read-write Catrol to large capacity integrated data buffer unit；Multiport memory controls
Device realizes view data storage control interface unit and large capacity integrated data cache interface unit by way of concurrent working
Between, microwave pore size data storage control interface unit and large capacity integrated data cache interface unit between, payload number
According to storage control interface unit and large capacity integrated data cache interface unit between, processor interface unit and large capacity synthesis
Integrated data transmission between data cache interface unit.
The processor interface unit of mass data storage module realizes that CPU is stored with Multi-ported Data by AXI buses
Communication between controller unit, and deposited by the First Input First Output FIFO in mass data storage module with Large Volume Data
The field programmable gate array of storage module carries out data transmission.
Refering to Fig. 5.On-site programmable gate array FPGA 4 in integrated data interface module, which has, passes through custom protocol,
The data exported to full color image sensor, infrared image sensor, high score imaging sensor are cached, rearranged, filled out
Data bit, packaging operation are filled, the 14 bit width vision sensor datas inputted respectively, which are changed and export 64 bit width images, to be passed
The pre-processing image data unit of sensor data.And by custom protocol, 8 bit widths collected to modulus switching device
Microwave pore size data is cached, rearranged, filling data bit, packaging operation, the 8 bit width microwave apertures that will be inputted respectively
Data conversion simultaneously exports the microwave pore size data pretreatment unit of 176 bit width microwave pore size datas and by custom protocol,
The 16 bit width payload datas exported to payload in satellite are cached, rearranged, filling data bit, packing behaviour
Make, the 16 bit width payload datas inputted respectively are changed and export the payload number of 64 bit width payload datas
Data preprocess unit.Custom protocol form is made of frame with wrapping for unit, and each flag bit is controlled in K characters from 8b/10b and selected
Take, wherein a frame length is 521bytes, frame head 2bytes, postamble 2bytes, frame number 2bytes, data source types
For 2bytes, reserved frame is 1bytes, and effective data packets position is 512bytes, and frame head flag bit is K28.0+K28.2, postamble mark
Will position is K28.0+K28.5, and frame number flag bit is produces using counter, total length 2^32-1, when counting down to 2^32-1
Counter O reset, data source types use 16 bit identifications, and xA1 represents view data, and xA2 represents aperture synthesis data, and xA3 is represented
Load data；A wherein packet length is 512bytes, and packet header 2bytes, bag tail is 2bytes, and clock corrects character and is
2bytes, passage binding character are 2bytes, and data bit 504bytes, packet header mark is K28.1+K28.5, and bag tail tag will is
K28.2+K28.5, it is K28.5+K28.5 that clock, which corrects character denotation, and passage binding character denotation is K28.5+K28.5.
Refering to Fig. 6, the step of mass data record, includes：
Step S1：The operating mode instruction that spaceborne synthesization mass data storage is sent with playback apparatus according to earth station,
Exterior 100V direct-current input power supplyings are opened, and secondary power supply module is the aerospace level cpu power power supply of comprehensive storage control module, comprehensive
The instruction that storage control module aerospace level CPU sends earth station is closed to be parsed and judge operating mode；
Step S2：Comprehensive number pipe computer prioritizing selection synthesis storage control module aerospace level CPU work, in the control of CPU
Under system, the power supply of operational module is opened：Mass data storage modules A, mass data storage module B and integrated data interface
Module；
Step S3：After the completion of power supply power supply, comprehensive storage control module carries out configuration file loading to other operational modules,
Each module Configuration file is loaded as concurrent working mode；
Step S4：Comprehensive storage control module judges whether the field programmable gate array of operational module and CPU load into
Work(, if unsuccessful, re-starts loading；If the loading of two secondary programs is all unsuccessful, it is switched to corresponding backup plate and carries out
Electricity and program loading.
Step S5：Storage device carries out System self-test survey, by state information report to comprehensive number pipe computer, and enters accurate
Standby working status, to reduce power consumption, under the control of storage main control module, the power supply of each backup plate is off state.If solution
Instruction after analysis is logging mode, then enters step S6, if playback mode, then enter step S10, if not logging mode is with returning
One kind in mode playback, then into S1；
Step S6：Storage device enters logging mode, starts integrated data interface unit, from pre-processing image data unit
Receive vision sensor data；Start integrated data interface unit, microwave aperture is received from microwave pore size data pretreatment unit
Data；Start integrated data interface unit, payload data is received from payload data pretreatment unit；
Step S7：CPU control images data pre-processing unit in comprehensive storage control module, microwave pore size data are located in advance
Unit, effect load data pretreatment unit and Multi-ported Data storage control unit is managed to integrate integrated data write-in large capacity
Data buffer storage unit；S8 is gone to step after complete integrated data write-in large capacity integrated data buffer unit is wrapped；
Step S8：CPU control processors interface unit in comprehensive storage control module is cached from large capacity integrated data
Read integrated data in unit, and control and write Multi-ported Data storage control unit in mass data storage module by number
According to write-in solid-state memory array；
Step S9：Repeat step S6 to step S8, until all data solid-state memory arrays, terminates the comprehensive number of record
According to process.
Step S10：Reverse execution step S9 to step S3, until all data all export respectively from solid-state memory array
To imaging sensor, microwave aperture, payload, terminate the process of playback integrated data.
Claims (8)
1. a kind of spaceborne synthesization mass data storage and playback apparatus, including, the integrated data interface mould being fixed on backboard
Block, comprehensive storage control module, mass data storage module, secondary power supply module and cabinet connector, it is characterised in that：Adopt
With one piece of internal circuit 1:The FPGA boards composition secondary power supply module of 1 redundancy, using 1:Two pieces of CPU+FPGA of 1 redundancy backup
Board forms integrated data interface module, using 1:The comprehensive storage of two pieces of aerospace level CPU+FPGA boards composition of 1 redundancy backup
Control module；Integrated data interface module passes through frequency standard signal connector, fiber optic Ethernet connector and comprehensive number pipe computer
Time attitude data and management and control information exchange are carried out, by optical fiber integrated data connector and imaging sensor, microwave aperture, is had
Imitate load and carry out synthesization data transfer, on-site programmable gate array FPGA 4 senses full color image by custom protocol
Device, infrared image sensor, the data of high score imaging sensor output are cached, rearranged, filling data bit, packing behaviour
Make, the 14 bit width vision sensor datas inputted respectively are changed and export the picture number of 64 bit width vision sensor datas
Data preprocess unit, the 8 bit width microwave pore size datas collected to modulus switching device are cached, rearranged, filled
Data bit, packaging operation, the 8 bit width microwave pore size datas inputted respectively are changed and export 176 bit width microwave aperture numbers
According to microwave pore size data pretreatment unit and by custom protocol, 16 bit widths exported to payload in satellite are effective
Load data is cached, rearranged, filling data bit, packaging operation, the 16 bit width payload numbers that will be inputted respectively
According to changing and export the payload data pretreatment unit of 64 bit width payload datas, under unified protocol integrated test system,
Imaging sensor, microwave aperture and load data source are subjected to synthesization pretreatment and storage；Comprehensive storage control module provides
The field programmable gate array of each module of equipment and the configuration file of processor are updated storage, storage device switching on and shutting down OC is instructed
It is controlled, malfunction monitoring and dynamic refresh；Mass data storage module respectively with CAN interface unit, board dispensing unit,
Data pre-processing unit, the field programmable gate array connection of high-speed interface unit connection；Wherein, field programmable gate array leads to
Cross CAN interface unit and receive the control instruction that comprehensive storage control module is sent, and to comprehensive storage control module report health,
State and fault message, the program of the global configuration unit transmission in comprehensive storage control module is received by board dispensing unit
Loading and failure refresh data, the integrated data from integrated data interface module is received by high-speed interface unit, and is passed through
Data pre-processing unit realizes that ECC encoding and decoding, equalization algorithm and bad block are rejected, and data are stored into solid-state memory array,
Wherein, it is 24Tbits that large capacity, which refers to single mass data storage module,.
2. spaceborne synthesization mass data storage according to claim 1 and playback apparatus, it is characterised in that：Integrated data
Data pre-processing unit custom protocol in field programmable gate array built in interface module, respectively to imaging sensor,
In microwave aperture and satellite 16 bit width initial data of payload output cached, rearranged, fill data bit and
Packaging operation, and export 64 bit width integrated datas to mass data storage mould high-speed interface unit 2 in the block and stored.
3. spaceborne synthesization mass data storage according to claim 1 and playback apparatus, it is characterised in that：Secondary power supply
Module will be converted into 5V all the way and 28V direct voltage outputs all the way by 100V direct currents primary power source input voltage all the way, wherein the
5V direct current outputs are powered for CAN interface unit in each module in storage device all the way, and the second road 28V direct current outputs set for storage
Standby interior each module power circuit power supply, comprehensive storage control module control each module in storage device by CAN interface unit
It is that magnetic latching relay carries out each module plus go electrically operated.
4. spaceborne synthesization mass data storage according to claim 1 and playback apparatus, it is characterised in that：Scene can compile
Journey gate array FPGA 1 uses a piece of Xilinx Virtex6 XCVSX315T-2 FF1759 chips, for being connect by integrated data
Mouthful unit, the data of imaging sensor, microwave aperture, payload are cached, and by imaging sensor, microwave aperture,
The data read-out of payload, is parsed, and realizes the reception of integrated data, under the domination of comprehensive storage control module
Integrated data is distributed to by mass data storage mould high-speed interface unit 2 in the block by high-speed interface unit 1.
5. spaceborne synthesization mass data storage according to claim 1 and playback apparatus, it is characterised in that：High-speed interface
Unit utilizes high speed serialization transceiver stone GTX built-in in field programmable gate array 1 to realize, converts parallel data into height
Fast serial data, configuration 1 ×, 2 × with 4 × Three models, realize tri- kinds of 3.125Gbps, 6.25Gbps and 12.5Gbps respectively
Effective transmission speed.
6. spaceborne synthesization mass data storage according to claim 1 and playback apparatus, it is characterised in that：Integrated data
Pre-processing image data unit in interface unit is made of 3 model DS90CR288A chips, by Camera Link low pressure
Differential serial signals switch to parallel data and clock signal is exported to field programmable gate array 1, and by may be programmed at the scene
View data is cached, rearranged, filling data bit, packaging operation by the custom protocol that gate array 1 is realized, by respectively
14 bit width vision sensor datas of input are changed and export 64 bit width vision sensor datas, pass through high-speed interface unit
Integrated data is distributed to mass data storage mould high-speed interface unit 2 in the block by 1.
7. spaceborne synthesization mass data storage according to claim 3 and playback apparatus, it is characterised in that comprehensive storage
On-site programmable gate array FPGA 2 built in control module and storage device failure processing unit, by electrical connection field programmable gate
CAN interface unit, global configuration unit and the aerospace level CPU compositions of array FPGA2；On-site programmable gate array FPGA 2 is distinguished
It is connected with CAN interface unit, global configuration unit, storage device failure processing unit is examined by storage device global configuration bus
Survey each module dispensing unit state, it is determined whether single-particle inversion, bolt-lock effect occurs, passes through the office of field programmable gate array
Portion's bus communicates with storage device global configuration unit.
8. spaceborne synthesization mass data storage according to claim 3 and playback apparatus, it is characterised in that large capacity number
According to memory module by the solid-state memory array, high-speed interface unit, CAN that are electrically connected around on-site programmable gate array FPGA 3
Interface unit, board dispensing unit and be built in FPGA3 data pre-processing units composition, wherein, the field programmable gate
Array FPGA3 is connected with CAN interface unit, board dispensing unit, data pre-processing unit, high-speed interface unit respectively, this is existing
Field programmable gate array FPGA3 receives the control instruction of comprehensive storage control module transmission by CAN interface unit, is deposited to synthesis
Storage control module reports health, state and fault message；Received by board dispensing unit complete in comprehensive storage control module
The program loading and failure refresh data that office's dispensing unit is sent；Received by high-speed interface unit and come from integrated data interface mould
The integrated data of block, and ECC encoding and decoding, equalization algorithm, bad block removing function are realized by data pre-processing unit, data are deposited
Storage is into solid-state memory array.
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| US20180285732A1 (en) * | 2017-03-30 | 2018-10-04 | Intel Corporation | Selective noise tolerance modes of operation in a memory |
| CN108375971A (en) * | 2018-03-18 | 2018-08-07 | 哈尔滨工程大学 | Integrated Electronic System health control module and health control method for moonlet |
| CN109246331A (en) * | 2018-09-19 | 2019-01-18 | 郑州云海信息技术有限公司 | A kind of method for processing video frequency and system |
| CN111367850B (en) * | 2020-02-11 | 2021-06-04 | 国电南瑞科技股份有限公司 | Rapid communication method between FPGA and MCU |
| CN112181866B (en) * | 2020-08-27 | 2024-03-26 | 航天东方红卫星有限公司 | Data transmission subsystem based on satellite on-orbit payload data processing |
| CN112486422B (en) * | 2020-12-24 | 2021-10-15 | 成都成电光信科技股份有限公司 | FC network data monitoring system based on disk array and storage method |
| CN113436055A (en) * | 2021-06-25 | 2021-09-24 | 山东航天电子技术研究所 | Miniaturized onboard high-speed image storage and processing system |
| CN117251117B (en) * | 2023-11-15 | 2024-01-26 | 中国科学院国家空间科学中心 | Satellite-borne solid-state storage system based on serial bus polling management |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102622191A (en) * | 2012-02-24 | 2012-08-01 | 北京经纬恒润科技有限公司 | High-speed mass storage plate |
| CN102945217A (en) * | 2012-10-11 | 2013-02-27 | 浙江大学 | Triple modular redundancy based satellite-borne comprehensive electronic system |
| CN104750437A (en) * | 2014-12-19 | 2015-07-01 | 中国航天科技集团公司第五研究院第五一三研究所 | Expandable capacity type satellite-borne large-capacity storage system |
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2015
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102622191A (en) * | 2012-02-24 | 2012-08-01 | 北京经纬恒润科技有限公司 | High-speed mass storage plate |
| CN102945217A (en) * | 2012-10-11 | 2013-02-27 | 浙江大学 | Triple modular redundancy based satellite-borne comprehensive electronic system |
| CN104750437A (en) * | 2014-12-19 | 2015-07-01 | 中国航天科技集团公司第五研究院第五一三研究所 | Expandable capacity type satellite-borne large-capacity storage system |
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