CN105518800A - 半导体存储器装置及其ecc方法 - Google Patents
半导体存储器装置及其ecc方法 Download PDFInfo
- Publication number
- CN105518800A CN105518800A CN201380077420.3A CN201380077420A CN105518800A CN 105518800 A CN105518800 A CN 105518800A CN 201380077420 A CN201380077420 A CN 201380077420A CN 105518800 A CN105518800 A CN 105518800A
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- CN
- China
- Prior art keywords
- error correction
- data
- nonvolatile memory
- write data
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
提供了一种半导体存储器装置及其ECC方法,所述半导体存储器装置包括:第一非易失性存储器;第二非易失性存储器,具有与第一非易失性存储器的类型不同的类型;控制器;第一纠错电路,被构造成纠正在第一非易失性存储器进行编程的第一写数据的错误;和第二纠错电路,包括在控制器中并被构造成基于与第一纠错电路的纠错算法不同的纠错算法纠正第一写数据的错误或在第二非易失性存储器进行编程的第二写数据的错误。根据第一写数据的属性使用第一纠错电路和第二纠错电路中的一个产生用于纠正第一写数据的错误的纠错数据。
Description
PCT国内申请,说明书已公开。
Claims (15)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/IB2013/054868 WO2014199199A1 (zh) | 2013-06-14 | 2013-06-14 | 半导体存储器装置及其ecc方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105518800A true CN105518800A (zh) | 2016-04-20 |
CN105518800B CN105518800B (zh) | 2018-11-30 |
Family
ID=52021708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201380077420.3A Active CN105518800B (zh) | 2013-06-14 | 2013-06-14 | 半导体存储器装置及其ecc方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20160132388A1 (zh) |
CN (1) | CN105518800B (zh) |
WO (1) | WO2014199199A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110069357A (zh) * | 2018-01-22 | 2019-07-30 | 三星电子株式会社 | 集成电路存储器装置及其操作方法 |
CN116431382A (zh) * | 2023-06-12 | 2023-07-14 | 深圳大普微电子科技有限公司 | 纠错单元管理方法、存储控制芯片及闪存设备 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015135156A1 (zh) * | 2014-03-12 | 2015-09-17 | 中国科学院微电子研究所 | 一种对磁多畴态进行调控的方法 |
US10897273B2 (en) | 2018-06-27 | 2021-01-19 | Western Digital Technologies, Inc. | System-level error correction coding allocation based on device population data integrity sharing |
US10802908B2 (en) * | 2018-07-31 | 2020-10-13 | Western Digital Technologies, Inc. | Data dependent allocation of error correction resources |
KR20200034420A (ko) * | 2018-09-21 | 2020-03-31 | 삼성전자주식회사 | 복수의 에러 정정 기능을 갖는 메모리 장치 및 메모리 시스템과 그 동작 방법 |
KR20200100309A (ko) * | 2019-02-18 | 2020-08-26 | 삼성전자주식회사 | 메모리 장치 및 시스템 |
US20220300374A1 (en) * | 2021-03-17 | 2022-09-22 | Micron Technology, Inc. | Redundant array management techniques |
US20230317158A1 (en) * | 2022-03-30 | 2023-10-05 | Crossbar, Inc. | Error correction for identifier data generated from unclonable characteristics of resistive memory |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100211851A1 (en) * | 2009-02-17 | 2010-08-19 | Robert William Dixon | Data storage system with non-volatile memory for error correction |
CN102142282A (zh) * | 2011-02-21 | 2011-08-03 | 北京理工大学 | 一种NAND Flash存储芯片ECC校验算法的识别方法 |
US20110283166A1 (en) * | 2010-05-14 | 2011-11-17 | Samsung Electronics Co., Ltd | Storage device having a non-volatile memory device and copy-back method thereof |
CN102969028A (zh) * | 2012-10-18 | 2013-03-13 | 记忆科技(深圳)有限公司 | 一种ecc动态调整方法、系统及闪存 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008310896A (ja) * | 2007-06-15 | 2008-12-25 | Spansion Llc | 不揮発性記憶装置、不揮発性記憶システムおよび不揮発性記憶装置の制御方法 |
JP2009087509A (ja) * | 2007-10-03 | 2009-04-23 | Toshiba Corp | 半導体記憶装置 |
US20090125790A1 (en) * | 2007-11-13 | 2009-05-14 | Mcm Portfolio Llc | Method and Apparatus of Automatically Selecting Error Correction Algorithms by a NAND Flash Controller |
JP4856110B2 (ja) * | 2008-03-01 | 2012-01-18 | 株式会社東芝 | チェンサーチ装置およびチェンサーチ方法 |
US8413015B2 (en) * | 2009-09-21 | 2013-04-02 | Sandisk Technologies Inc. | Nonvolatile memory controller with scalable pipelined error correction |
-
2013
- 2013-06-14 US US14/895,819 patent/US20160132388A1/en not_active Abandoned
- 2013-06-14 CN CN201380077420.3A patent/CN105518800B/zh active Active
- 2013-06-14 WO PCT/IB2013/054868 patent/WO2014199199A1/zh active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100211851A1 (en) * | 2009-02-17 | 2010-08-19 | Robert William Dixon | Data storage system with non-volatile memory for error correction |
US20110283166A1 (en) * | 2010-05-14 | 2011-11-17 | Samsung Electronics Co., Ltd | Storage device having a non-volatile memory device and copy-back method thereof |
CN102142282A (zh) * | 2011-02-21 | 2011-08-03 | 北京理工大学 | 一种NAND Flash存储芯片ECC校验算法的识别方法 |
CN102969028A (zh) * | 2012-10-18 | 2013-03-13 | 记忆科技(深圳)有限公司 | 一种ecc动态调整方法、系统及闪存 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110069357A (zh) * | 2018-01-22 | 2019-07-30 | 三星电子株式会社 | 集成电路存储器装置及其操作方法 |
CN116431382A (zh) * | 2023-06-12 | 2023-07-14 | 深圳大普微电子科技有限公司 | 纠错单元管理方法、存储控制芯片及闪存设备 |
CN116431382B (zh) * | 2023-06-12 | 2023-09-29 | 深圳大普微电子科技有限公司 | 纠错单元管理方法、存储控制芯片及闪存设备 |
Also Published As
Publication number | Publication date |
---|---|
CN105518800B (zh) | 2018-11-30 |
US20160132388A1 (en) | 2016-05-12 |
WO2014199199A1 (zh) | 2014-12-18 |
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