CN105516158A - Configurable protocol conversion state machine circuit structure and protocol configuration method - Google Patents
Configurable protocol conversion state machine circuit structure and protocol configuration method Download PDFInfo
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- CN105516158A CN105516158A CN201510952590.2A CN201510952590A CN105516158A CN 105516158 A CN105516158 A CN 105516158A CN 201510952590 A CN201510952590 A CN 201510952590A CN 105516158 A CN105516158 A CN 105516158A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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Abstract
The invention particularly relates to a configurable protocol conversion state machine circuit structure and a protocol configuration method. The configurable protocol conversion state machine circuit structure comprises a flash storer, a global reset control module and a protocol conversion state machine. The protocol conversion state machine comprises a register, a state coding module, a state matching module and a state decoding module. The register, the state coding module and the state decoding module are all connected to the state matching module. According to the configurable protocol conversion state machine circuit structure and the protocol configuration method, the chip protocol conversion is realized, so that risks in chip design can be well controlled; verification requirement on protocol details is lowered, so that the whole chip design process is faster, demand on verification resources is lowered accordingly, the circuit structure is simplified, overall, design difficulty of the whole chip system is lowered, and development time is remarkably shortened.
Description
Technical field
The present invention relates to chip design art field, particularly one configurable protocol conversion state machine circuit structure and protocol configuration method.
Background technology
Along with the development of server application, the application demand of high-end server has entered an important stage.Complicated architecture realizes supporting that high-end server system realizes the features such as high performance index, high security, high availability, high reliability.This just needs network control class chip controls multichannel processor system, makes internal system message transmissions reach high efficient and reliable, safety and stability.And the realization of control chip for such, the circuit realiration of protocol status conversion table is the core of this chip system.In this case, the completeness of agreement and the realizability of complexity are the keys of system success.
In view of huge input and the non-alterability of the disposable design of dedicated custom chip, in the process of carrying out chip protocol design, need completeness and the inerrancy of guarantee agreement.But along with the development of technology, various protocol complexity increases increasingly, under limited time and resource situation, need to design a set of complete correct protocol rule and often there is huge risk, the convergence needing the time of cost staggering amount to carry out verifying to ensure to design and completeness.The mode of conventional solution problems has two kinds: (1) carries out system integration project at the system-level protocol emulation software high by price to designed protocol status conversion table, and the large scale emulation of Method at Register Transfer Level is carried out in conjunction with cpu processor simulation model, correctness and the completeness of guarantee agreement design and system is come by the emulation under plenty of time mass data scene; (2) build actual verification platform, in true environment is truly applied, long-time large-scale checking is carried out to protocol status conversion table by large-scale FPGA and CPU processor.
Above two kinds of verification modes can by the guarantee as system correctness and completeness.But this sample loading mode has significant limitation, be limited to the resource of FPGA own and speed, be difficult to huge chip system is carried out to transplanting completely and is consistent, to the local that the checking of circuit can only be and targetedly, instead of the comprehensive checking without dead angle.Meanwhile, because the relation of FPGA speed can only be verified in environment at a slow speed, the working condition of system, and actual chips work is not a kind of checking of crash consistency at high speeds equally.For emulation and system-level checking, due to the restriction of simulation velocity, even there is the gap on the order of magnitude within the limited design verification time all the time with FPGA to the coverage rate of system verification, very difficult comprehensively completely all circuit design can be authenticated to.
Based on the problems referred to above, the present invention devises a kind of configurable protocol conversion state machine circuit structure and protocol configuration method.
Summary of the invention
The present invention, in order to make up the defect of prior art, provides a kind of simple efficient configurable protocol conversion state machine circuit structure and protocol configuration method.
The present invention is achieved through the following technical solutions:
A kind of configurable protocol conversion state machine circuit structure, it is characterized in that: comprise flash memory, Global reset control module and protocol conversion state machine, described protocol conversion state machine comprises register, state encoding module, state matching module and state decoding module, described register, state encoding module and state decoding module are all connected to state matching module;
Described Global reset control module is connected to protocol conversion state machine, and described flash memory is connected to register by the configuration interface that powers on, and described flash memory is connected with the outer read-write interface of sheet;
Described state encoding model calling protocols having message input interface, described state matching module is connected with the outer fetch interface of protocol debugging sheet, and described state decoding module is connected with message distribution processor interface.
The protocol configuration method of the present invention's configurable protocol conversion state machine circuit structure, is characterized in that comprising the following steps:
(1), before first time works on power, to be written in flash memory by new protocol conversion state encoding by the outer read-write interface of the sheet of flash memory and to go, described protocol conversion state encoding is the binary coding comprising current state and NextState;
(2) in the system reset stage, protocol conversion state machine is read needing the protocol conversion state encoding of configuration by the configuration interface that powers on from flash memory, be written in the register of protocol conversion state machine circuit and go, after all successfully writing, notice Global reset control module has write;
(3) after Global reset control module receives write settling signal, system reset terminates, the protocol conversion state encoding of configuration is needed to read from register, enter into state matching module, simultaneously protocol massages carries out coded treatment by the protocol massages input interface coding module that gets the hang of, result after coding gets the hang of the current state codes match of matching module and protocol conversion state machine, after the match is successful, NextState coding is outputted to state decoding module and carries out decoding process, the various Message processing distributions will generated by message distribution processor interface.
In described step (3), when the protocol conversion current state coding occurring mating, when mating unsuccessful, to not output to outside sheet by match protocol value coding by the outer fetch interface of protocol debugging sheet, by system-level analyze and solve, again modifying agreements transformation rule, then gets back to step (1).
In described step (3), if there is no the protocol conversion state encoding occurring mating, then directly get back to step (2).
The invention has the beneficial effects as follows: this configurable protocol conversion state machine circuit structure and protocol configuration method, by configurable state switching circuit and can loading programmable amendment flash memory circuitry, the realizability that chip protocol is changed can change from fixedly becoming, thus good control can be accomplished for the risk in chip design process, checking for Details Of Agreement no longer requires very complete, thus whole chip design flow process is accelerated, for the demand also corresponding reduction of checking resource, thus circuit structure is simplified, reduce the difficulty of whole chip system design on the whole, the remarkable minimizing development time.
Accompanying drawing explanation
Accompanying drawing 1 is the present invention's configurable protocol conversion state machine circuit structural representation.
Embodiment
In order to make technical problem to be solved by this invention, technical scheme and beneficial effect clearly understand, below in conjunction with drawings and Examples, the present invention will be described in detail.It should be noted that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
This configurable protocol conversion state machine circuit structure, comprise flash memory, Global reset control module and protocol conversion state machine, described protocol conversion state machine comprises register, state encoding module, state matching module and state decoding module, described register, state encoding module and state decoding module are all connected to state matching module;
Described Global reset control module is connected to protocol conversion state machine, and described flash memory is connected to register by the configuration interface that powers on, and described flash memory is connected with the outer read-write interface of sheet;
Described state encoding model calling protocols having message input interface, described state matching module is connected with the outer fetch interface of protocol debugging sheet, and described state decoding module is connected with message distribution processor interface.
The protocol configuration method of this configurable protocol conversion state machine circuit structure, comprises the following steps:
(1) before working on power for the first time, to be written in flash memory by new protocol conversion state encoding by the outer read-write interface of the sheet of flash memory and to go, described protocol conversion state encoding is the binary coding comprising current state (currentstate) and NextState (nextstate);
(2) in the system reset stage, protocol conversion state machine is read needing the protocol conversion state encoding of configuration by the configuration interface that powers on from flash memory, be written in the register of protocol conversion state machine circuit and go, after all successfully writing, notice Global reset control module has write;
(3) after Global reset control module receives write settling signal, system reset terminates, the protocol conversion state encoding of configuration is needed to read from register, enter into state matching module, simultaneously protocol massages carries out coded treatment by the protocol massages input interface coding module that gets the hang of, result after coding gets the hang of current state (currentstate) codes match of matching module and protocol conversion state machine, after the match is successful, NextState (nextstate) coding is outputted to state decoding module and carries out decoding process, by the various Message processing distributions that message distribution processor interface will generate.
In described step (3), when protocol conversion current state (currentstate) coding occurring mating, when mating unsuccessful, to not output to outside sheet by match protocol value coding by the outer fetch interface of protocol debugging sheet, by system-level analyze and solve, again modifying agreements transformation rule, then gets back to step (1).
In described step (3), if there is no protocol conversion current state (currentstate) coding occurring mating, then directly get back to step (2).
Because protocol conversion state machine circuit is configurable, the protocol application scene complicated especially consideration much more especially it goes without doing is covered with checking.When having emerging complex application context in chip testing process, by the outer fetch interface of protocol debugging sheet, this scene is preserved output, through system-level agreement correction, recompile, in write flash memory (non-volatile memory medium), then be re-loaded in the protocol conversion circuitry of real work and go, the flexible configuration of chip protocol can be realized.
The protocol configuration method of this configurable protocol conversion state machine circuit structure is a kind of security mechanism of Protocol Design.After adopting this protocol configuration method, checking work only needs the test and validation mainly laying particular emphasis on common function and application, and the solution of these application functions seldom related to is left in chip real work goes, and significantly can reduce the development time.Simultaneously, due to this configurable characteristic of chip protocol flexibly, when system respective upgrades time, to a certain extent, can not need to redesign chip, the mode directly configured by chip protocol carries out the upgrade job of simple functions, can increase the life cycle of chip product itself to a certain extent, save a large amount of production and development costs and development time.
In sum, adopt this configurable protocol conversion state machine circuit structure, significantly can increase the flexibility of Protocol Design, reduce difficulty and the completeness guarantee of Protocol Design, thus significantly reduce the risk in chip design process.And then accelerate whole chip design flow process, Optimization Design of Electronic Circuits resource, simplify circuit structure, alleviate the complexity of chip rear end design, reduce whole chip system design complexities on the whole.
Claims (4)
1. a configurable protocol conversion state machine circuit structure, it is characterized in that: comprise flash memory, Global reset control module and protocol conversion state machine, described protocol conversion state machine comprises register, state encoding module, state matching module and state decoding module, described register, state encoding module and state decoding module are all connected to state matching module;
Described Global reset control module is connected to protocol conversion state machine, and described flash memory is connected to register by the configuration interface that powers on, and described flash memory is connected with the outer read-write interface of sheet;
Described state encoding model calling protocols having message input interface, described state matching module is connected with the outer fetch interface of protocol debugging sheet, and described state decoding module is connected with message distribution processor interface.
2. the protocol configuration method of configurable protocol conversion state machine circuit structure according to claim 1, is characterized in that comprising the following steps:
(1), before first time works on power, to be written in flash memory by new protocol conversion state encoding by the outer read-write interface of the sheet of flash memory and to go, described protocol conversion state encoding is the binary coding comprising current state and NextState;
(2) in the system reset stage, protocol conversion state machine is read needing the protocol conversion state encoding of configuration by the configuration interface that powers on from flash memory, be written in the register of protocol conversion state machine circuit and go, after all successfully writing, notice Global reset control module has write;
(3) after Global reset control module receives write settling signal, system reset terminates, the protocol conversion state encoding of configuration is needed to read from register, enter into state matching module, simultaneously protocol massages carries out coded treatment by the protocol massages input interface coding module that gets the hang of, result after coding gets the hang of the current state codes match of matching module and protocol conversion state machine, after the match is successful, NextState coding is outputted to state decoding module and carries out decoding process, the various Message processing distributions will generated by message distribution processor interface.
3. the protocol configuration method of configurable protocol conversion state machine circuit structure according to claim 2, it is characterized in that: in described step (3), when the protocol conversion current state coding occurring mating, when mating unsuccessful, to not output to outside sheet by match protocol value coding by the outer fetch interface of protocol debugging sheet, by system-level analyze and solve, modifying agreements transformation rule again, then gets back to step (1).
4. the protocol configuration method of configurable protocol conversion state machine circuit structure according to claim 2, is characterized in that: in described step (3), if do not have the protocol conversion state encoding occurring mating, then directly gets back to step (2).
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| CN107391077A (en) * | 2017-07-11 | 2017-11-24 | 苏州顺芯半导体有限公司 | A kind of programmable audio A/D conversion chip and its implementation |
| CN111625075A (en) * | 2020-05-20 | 2020-09-04 | 天津芯海创科技有限公司 | Software configurable reset device and method |
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Application publication date: 20160420 |