CN105448961A - Terminal protection structure of super-junction device - Google Patents
Terminal protection structure of super-junction device Download PDFInfo
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- CN105448961A CN105448961A CN201510786183.9A CN201510786183A CN105448961A CN 105448961 A CN105448961 A CN 105448961A CN 201510786183 A CN201510786183 A CN 201510786183A CN 105448961 A CN105448961 A CN 105448961A
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- 230000007704 transition Effects 0.000 claims abstract description 42
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 69
- 229920005591 polysilicon Polymers 0.000 claims description 69
- 239000011248 coating agent Substances 0.000 claims description 68
- 238000000576 coating method Methods 0.000 claims description 68
- 238000000407 epitaxy Methods 0.000 claims description 54
- 239000002184 metal Substances 0.000 claims description 44
- 230000007306 turnover Effects 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 50
- 230000006872 improvement Effects 0.000 description 22
- 238000000034 method Methods 0.000 description 11
- 239000000758 substrate Substances 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 230000008569 process Effects 0.000 description 6
- 239000000428 dust Substances 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 230000002441 reversible effect Effects 0.000 description 5
- 238000005452 bending Methods 0.000 description 4
- 210000004027 cell Anatomy 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000001413 cellular effect Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
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- 238000001259 photo etching Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
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- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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Abstract
The invention discloses a terminal protection structure of a super-junction device. A P-type column and an N-type column of a super-junction structure of a current flow area are in a bar-shaped structure and are parallel to each other. A part of super-junction structure in the terminal protection structure is formed through extending the P-type column and the N-type column of the current flow area along a length direction. Another part of super-junction structure in the terminal protection structure is formed by alternatively arranging a second P-type column and a second N-type column of the bar-shaped structure, wherein the second P-type column and the second N-type column are parallel to the P-type column and the N-type column of the current flow area. A field plate and a P-type ring are formed in a transition area. A cut-off ring is formed on an outermost end of a voltage bearing area. The P-type column and the N-type column of the super structure of the terminal protection structure are in a long strip shape without turns. An electric leakage characteristic and reliability of the device can be increased and a smallest terminal size can be used to acquire a high breakdown voltage.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit, particularly relate to the terminal protection structure of a kind of superjunction (superjunction) device.
Background technology
Super-junction structure is exactly the N-type post and P type post composition structure that are alternately arranged.If replace vertical double-diffused MOS transistor (VerticalDouble-diffusedMetal-Oxide-Semiconductor with super-junction structure, VDMOS) N-type drift region in device, there is provided conduction path by N-type post in the on-state, during conducting, P type post does not provide conduction path; Jointly bear reversed bias voltage by PN column in the off state, just define superjunction Metal-Oxide Semiconductor field-effect transistor (Metal-Oxide-SemiconductorField-EffectTransistor, MOSFET).Super node MOSFET can, when reverse breakdown voltage is consistent with traditional VDMOS device, by using the epitaxial loayer of low-resistivity, and make the conducting resistance of device significantly reduce.
As shown in Figure 1, be existing superjunction devices vertical view one; General super-junction structure, all comprise flow of charge district, the termination environment of laterally bearing reverse bias voltage and the transition region be between flow of charge district and termination environment, termination environment is surrounded on the periphery in described flow of charge district, Tu1Zhong 1 district represents flow of charge district, 2nd district represent transition region, and 3rd district represent Ye Ji voltage supporting region, termination environment.
1st district comprises the super-junction structure be made up of the P type post 201 be alternately arranged and N-type post 202, and the P type post 201 in Fig. 1 and N-type post 202 are all strip structure.N-type post 202 provides conduction path when in superjunction devices conducting, and P type post 201 and N-type post 202 exhaust mutually when superjunction devices is reverse-biased and jointly bear reverse biased.
2nd district and 3rd district are the terminal in superjunction devices, jointly as the terminal protection structure representing superjunction devices.2nd district described in when break-over of device and 3rd district do not provide electric current, reverse-biased for this voltage of voltage born from the surface of 1 periphery, district unit to device outer-most end surface substrate be lateral voltage and from 1 periphery, district cell surface to this voltage of voltage of substrate be longitudinal voliage.
2nd district and 3rd district are by comprising the super-junction structure be made up of the P type post 203 be alternately arranged and N-type post 204, and P type post 203 and N-type post 204 are all end to end ring type structure, are looped around the periphery in 1st district.
Superjunction devices is made up of the device cellular of the repeated arrangement in flow of charge district, and device cellular comprises the superjunction unit be made up of a N-type post 201 and P type post 202 and the superjunction devices unit formed at superjunction unit top forms.For super-junction MOSFET device, device structure cell is: well region, is formed at the source region in well region, the surface being formed in well region is formed with gate dielectric layer as gate oxide and polysilicon gate, interlayer film, contact hole, front metal layer, draws source electrode and grid after front metal layer is graphical respectively.Be formed with metal layer on back at the back side of silicon substrate, metal layer on back draws drain electrode.
As shown in Figure 1, in termination environment i.e. 3rd district, P type post 203 and N-type post 204 are all end to end ring type structure, and P type post 203 be generally in N-type epitaxy layer, form groove after filling P-type silicon formed, in the technique of trench fill, groove is all easy to occur defect in the position of bending (no matter be right angle or have the bending of some radians), when there is large electric field strength in this region, leakage current characteristic is poor, there iing bending part simultaneously, there will be the charge balance of local, thus high puncture voltage can not be obtained, and cause element leakage poor.In order to solve the problem of partial charge balance, prior art on the corner carries out special design, and as added the P-post of blockage, but this has very large difficulty on technique realizes.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of terminal protection structure of superjunction devices, can improve leakage current characteristic and the reliability of device, can obtain high puncture voltage with minimum terminal size.
For solving the problems of the technologies described above; the terminal protection structure of superjunction devices provided by the invention comprises transition region and voltage supporting region; the zone line of superjunction devices is flow of charge district; terminal protection structure is surrounded on the periphery in flow of charge district, and transition region is between flow of charge district and voltage supporting region.
Current flowing district comprises the Part I super-junction structure be made up of the P type post be alternately arranged be formed in N-type epitaxy layer and the first N-type post.
Overlook on face, a described P type post and described first N-type post all elongated and parallel to each other, each described P type post and described first N-type post all alongst extend in the described voltage supporting region in the outside in described current flowing district and form Part II super-junction structure.
The Part III super-junction structure be made up of the 2nd P type post be alternately arranged be formed in described N-type epitaxy layer and the second N-type post, described Part III hyperstructure extends to described voltage supporting region along the Width of a described P type post from the outside in described current flowing district; Described 2nd P type post and described second N-type post all elongated and parallel to each other, and described 2nd P type post is parallel with a described P type post.
Described Part II super-junction structure together with described Part III super-junction structure makeup ring around the hyperstructure of the described terminal protection structure of the periphery in described current flowing district; make the P type post of the hyperstructure of described terminal protection structure and N-type post be all strip not with turnover, thus improve the leakage current characteristic of described superjunction devices.
Field plate and P type ring is formed, described field plate structure be looped around the periphery in described current flowing district ringwise in described transition region; Described P type annular is formed in described N-type epitaxy layer, described P type ring structure be looped around the periphery in described current flowing district ringwise.
Cut-off ring is formed with, described cut-off ring structure be looped around the periphery of the hyperstructure of described terminal protection structure ringwise in the described N-type epitaxy layer of the outermost end in described voltage supporting region.
Further improvement is, also comprises the 3rd P type post of one article of structure in the form of a ring in the hyperstructure of described terminal protection structure, and the described 3rd P type band of column is around the periphery of described Part II super-junction structure and described Part III super-junction structure.
Further improvement is, the field plate of described transition region is polysilicon field plate, Metal field plate, the combining structure of polysilicon field plate and Metal field plate.
Further improvement is; the described N-type epitaxy layer in described terminal protection structure region is formed with terminal deielectric-coating; described terminal deielectric-coating has a ledge structure; described ledge structure laterally inclined and be arranged in described transition region, from described transition region to direction, described voltage supporting region, the thickness of described ledge structure increases gradually.
The field plate of described transition region includes laterally inclined polysilicon field plate, this laterally inclined polysilicon field plate covers described ledge structure and extends on the described terminal deielectric-coating of described voltage supporting region, and described laterally inclined polysilicon field plate covers the laterally inclined of the position of described ledge structure.
Further improvement is, is formed with Metal field plate at the top of described laterally inclined polysilicon field plate, and this Metal field plate is connected with described laterally inclined polysilicon field plate by contact hole; Or be formed with Metal field plate at the top of described laterally inclined polysilicon field plate, this Metal field plate is not connected with described laterally inclined polysilicon field plate.
Further improvement is, described cut-off ring is made up of the deielectric-coating be formed in the He Gai N+ district of N+ district of described N-type epitaxy layer.
Or; described cut-off ring is made up of the deielectric-coating be formed in the N+ district of described N-type epitaxy layer, this N+ district and the guard ring on this deielectric-coating; described guard ring is contacted with the N+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring.
Or, described cut-off ring is made up of the deielectric-coating be formed in the N+ district of described N-type epitaxy layer, this N+ district, guard ring on this deielectric-coating and polysilicon field plate ring, described guard ring is contacted with the N+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
Further improvement is, bottom the described contact hole that described guard ring contacts with the N+ district of bottom, be formed with P+ district.
Further improvement is, the doping content in described cut-off Huan N+ district is greater than 1e16cm
-3.
Further improvement is, is greater than 1e16cm in the doping content stating the P+ district bottom the described contact hole bottom guard ring
-3.
Further improvement is, described cut-off ring is made up of with the deielectric-coating in this N-type epitaxy layer the described N-type epitaxy layer in described cut-off ring region.
Or described cut-off ring is made up of the deielectric-coating in the described N-type epitaxy layer in described cut-off ring region, this N-type epitaxy layer and the guard ring on this deielectric-coating, and described guard ring is polysilicon protection ring or metal coating ring.
Or described cut-off ring is made up of the deielectric-coating in the described N-type epitaxy layer in described cut-off ring region, this N-type epitaxy layer, guard ring on this deielectric-coating and polysilicon field plate ring, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
Further improvement is, described cut-off ring is made up of the deielectric-coating be formed in the He Gai P+ district of P+ district of described N-type epitaxy layer.
Or; described cut-off ring is made up of the deielectric-coating be formed in the P+ district of described N-type epitaxy layer, this P+ district and the guard ring on this deielectric-coating; described guard ring is contacted with the P+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring.
Or, described cut-off ring is made up of the deielectric-coating be formed in the P+ district of described N-type epitaxy layer, this P+ district, guard ring on this deielectric-coating and polysilicon field plate ring, described guard ring is contacted with the P+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
Further improvement is, the doping content in described cut-off Huan P+ district is greater than 1e16cm
-3.
Further improvement is; along on the Width of a described P type post; the width of the outermost P type post of the hyperstructure of described terminal protection structure is less than the width of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure, and the degree of depth of the outermost P type post of the hyperstructure of described terminal protection structure is less than the degree of depth of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure simultaneously.
Further improvement is, along on the Width of a described P type post, the width being positioned at the P type post of described voltage supporting region of the hyperstructure of described terminal protection structure is less than the width of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure, the degree of depth being positioned at the P type post of described voltage supporting region of the hyperstructure of described terminal protection structure is less than the degree of depth of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure simultaneously.
The present invention can obtain following Advantageous Effects:
Transition region of the present invention and the main hyperstructure of bearing the region of voltage all adopt the P type post be alternately arranged and the N-type post of the strip of single direction; namely the P type post of the hyperstructure of terminal protection structure and N-type post are all the strip not with turnover; relative to existing circulating type structure; the main PN post bearing voltage of the present invention and P type post and N-type post do not have the turning of prior art; avoid the defect of PN post bending place and the problem of charge unbalance, thus the leakage current characteristic of device can be improved.
The present invention is by only designing P type post i.e. the 3rd P type post of the structure that to be alternately arranged around whole PN post at the most peripheral of the PN post of the whole single direction be alternately arranged, ring-shaped P post can ensure the consistency of the distribution of the electric field strength of the P type post of electric charge basal seat area most peripheral, thus can improve the reliability of device.
The present invention is by the junction design field plate of transition region and voltage supporting region, and laterally inclined ledge structure and field plate, can improve the distribution of the electric field strength of device transition region and voltage supporting region, improve the reliability of device.
In addition, the present invention, by adopting high-quality heat oxide film as the terminal deielectric-coating under laterally inclined field plate, can reduce the mobile ion in device, improve consistency and the reliability of device.
The present invention is by adopting cut-off ring; high concentration N-type cut-off ring is particularly adopted namely to form the film layer structure of cut-off Huan N+ district and the metal connected with N-type silicon chip or polysilicon; the weak transoid that the N-type cut-off region of high concentration can avoid device surface to occur; the polysilicon that gets on is connected or metal coating ring can better for device provides the protection of physics and electricity by contact hole; improve the tolerance of device to technical processs such as scribings further, obtain the device of high reliability.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is existing superjunction devices vertical view;
Fig. 2 is the embodiment of the present invention one superjunction devices vertical view;
Fig. 3 is the embodiment of the present invention two superjunction devices vertical view;
Fig. 4 is the profile of the embodiment of the present invention one superjunction devices;
Fig. 5 is the profile of the embodiment of the present invention three superjunction devices;
Fig. 6 is the profile of the embodiment of the present invention four superjunction devices;
Fig. 7 is the profile of the embodiment of the present invention five superjunction devices;
Fig. 8 is the profile of the embodiment of the present invention six superjunction devices;
Fig. 9 is the profile of the embodiment of the present invention seven superjunction devices;
Figure 10 is the profile of the embodiment of the present invention six superjunction devices;
Figure 11 is the profile of the embodiment of the present invention seven superjunction devices.
Embodiment
The embodiment of the present invention one superjunction devices:
As shown in Figure 2, be the embodiment of the present invention one superjunction devices vertical view; In the terminal protection structure of the embodiment of the present invention one superjunction devices; superjunction devices comprises flow of charge district and terminal protection structure; the zone line of superjunction devices is flow of charge district; terminal protection structure is surrounded on the periphery in described flow of charge district; described terminal protection structure comprises transition region and voltage supporting region, and described transition region is between described flow of charge district and described voltage supporting region, and Tu2Zhong 1 district represents flow of charge district; 2nd district represent transition region, and 3rd district represent voltage supporting region.
Described current flowing district comprises the Part I super-junction structure be made up of the P type post 22a be alternately arranged be formed in N-type epitaxy layer and the first N-type post 23a.Described first N-type post 23a in Part I super-junction structure provides conduction path when in superjunction devices conducting, and a P type post 22a and the first N-type post 23a exhausts mutually when superjunction devices is reverse-biased and jointly bears reverse biased.
2nd district and 3rd district are the terminal in superjunction devices, jointly as the terminal protection structure representing superjunction devices.2nd district described in when break-over of device and 3rd district do not provide electric current, reverse-biased for this voltage of voltage born from the surface of 1 periphery, district unit to device outer-most end surface substrate be lateral voltage and from 1 periphery, district cell surface to this voltage of voltage of substrate be longitudinal voliage.
Overlook on face, a described P type post 22a and described first N-type post 23a is elongated and parallel to each other, and each described P type post 22a and described first N-type post 23a alongst extends in the described voltage supporting region in the outside in described current flowing district and forms Part II super-junction structure.
The Part III super-junction structure be made up of the 2nd P type post 22b be alternately arranged be formed in described N-type epitaxy layer and the second N-type post 23b, described Part III hyperstructure extends to described voltage supporting region along the Width of a described P type post 22a from the outside in described current flowing district; Described 2nd P type post 22b and described second N-type post 23b is elongated and parallel to each other, and described 2nd P type post 22b is parallel with a described P type post 22a.
Described Part II super-junction structure together with described Part III super-junction structure makeup ring around the hyperstructure of the described terminal protection structure of the periphery in described current flowing district; make the P type post of the hyperstructure of described terminal protection structure and N-type post be all strip not with turnover, thus improve the leakage current characteristic of described superjunction devices.
Field plate 24 and P type ring 25 is formed, described field plate 24 structure be looped around the periphery in described current flowing district ringwise in described transition region; Described P type ring 25 is formed in described N-type epitaxy layer, described P type ring 25 structure be looped around the periphery in described current flowing district ringwise.
Cut-off ring 21 is formed, described cut-off ring 21 structure be looped around the periphery of the hyperstructure of described terminal protection structure ringwise in the described N-type epitaxy layer of the outermost end in described voltage supporting region.
As shown in Figure 4, be the profile of the embodiment of the present invention one superjunction devices, Fig. 4 is the profile of the EF line along Fig. 2, and superjunction devices is for planar gate superjunction N-type MOSFET element, and the device structure cell being arranged in 1st district is:
The heavily doped silicon substrate 1 of N-type is formed with N-type epitaxy layer, a the first N-type post 3a and P type post 4a is formed in N-type epitaxy layer, first N-type post 3a is the first N-type post 23a in Fig. 2 on vertical view, and a P type post 4a is the P type post 22a in Fig. 2.
Be formed with P trap 7 at the top of a P type post 4a, in P trap 7, be formed with the P trap draw-out area 9 of He You P+ district, source region 8 composition of N+ district composition, be formed with gate dielectric layer on the surface of P trap 7 as gate oxide 5 and polysilicon gate 6.
Also comprise: interlayer film 10, contact hole 11, front metal layer 12, after front metal layer 12 is graphical, draw source electrode and grid respectively.Be formed with metal layer on back 13 at the back side of silicon substrate 1, metal layer on back 13 draws drain electrode.
Because silicon substrate 1 is heavy doping, N-type epitaxy layer is light dope, is formed with the region of concentration transition at the two intersection.
In Fig. 4 E1E2 interface be thinning after the lower surface of silicon substrate 1, interface D1D2 is the top surface of silicon substrate 1, and interface C 1C2 is the bottom interface of super-junction structure, and interface M1M2 is the top surface of N-type epitaxy layer.Thickness between interface E1E2 and interface D1D2 is T00, and the thickness between interface E1E2 and interface M1M2 is the thickness between T10, interface C 1C2 and interface M1M2 is T20, and the thickness between interface D1D2 and interface C 1C2 is T30.
As described in Figure 4,2nd district of the embodiment of the present invention one and the structure in 3rd district are:
In N-type epitaxy layer, be formed with the 2nd P type post 4b and the second N-type post 3b that are alternately arranged, the second N-type post 3b is the N-type post 23b in Fig. 2 on vertical view, and P type post 4b is the P type post 22b in Fig. 2.N-type post 3ab represents a transition N-type post, and the charge balance between structure that is alternately arranged for be alternately arranged structure and a P type post 22a and the first N-type post 23a that make the 2nd P type post 4b and the second N-type post 3b realizes good transition.
The described N-type epitaxy layer in described terminal protection structure region is formed with terminal deielectric-coating 31; described terminal deielectric-coating 31 has a ledge structure; described ledge structure laterally inclined and be arranged in described transition region, from described transition region to direction, described voltage supporting region, the thickness of described ledge structure increases gradually.
The field plate 24 of described transition region covers described ledge structure and extends on the described terminal deielectric-coating 31 of described voltage supporting region, and the field plate 24 of described transition region has inclined side in the described ledge structure position of covering.The field plate 24 of described transition region is polysilicon field plate, Metal field plate, the combining structure of polysilicon field plate and Metal field plate.In the embodiment of the present invention one, the field plate 24 of described transition region is in the combining structure of polysilicon field plate and Metal field plate, the polysilicon field plate 32 be made up of polysilicon 6 that polysilicon field plate and Fig. 4 and polysilicon gate 6 are formed simultaneously, described polysilicon field plate 32 has inclined side in the described ledge structure position of covering, and described polysilicon field plate 32 also covers on the surface of gate oxide 5 in 2nd district; Metal field plate 33 is formed at the top with laterally inclined polysilicon field plate 32, connected by contact hole between this Metal field plate 33 and described laterally inclined polysilicon field plate 32, contact hole have passed through interlayer film 35, and this Metal field plate 33 can as the BUS line of polygate electrodes and bus; Also can not connect between Metal field plate 33 and described laterally inclined polysilicon field plate 32 in other embodiments.The laterally inclined ledge structure of the embodiment of the present invention one and field plate, can improve the distribution of the electric field strength of device transition region and voltage supporting region, improves the reliability of device.
In the embodiment of the present invention one, the composition material of described terminal deielectric-coating 31 is heat oxide film, can reduce the mobile ion in device, improves consistency and the reliability of device.
P well region in 2nd district forms described P type ring 25 corresponding in P type ring and Fig. 2.
In 3rd district; cut-off ring is formed namely corresponding to the cut-off ring 21 in Fig. 2 in the N-type epitaxy layer in the outside be alternately arranged of the 2nd P type post 4b and the second N-type post 3b; described cut-off ring 21 is made up of the deielectric-coating 35 be formed in the N+ district 34 of described N-type epitaxy layer, this N+ district 34 and the guard ring 36 on this deielectric-coating 35; described guard ring 36 is contacted with the N+ district 34 of bottom by contact hole, and guard ring 36 is a metal coating ring.In other embodiments, guard ring 36 also can be polysilicon protection ring; Also can not adopt guard ring 36 in other embodiments, cut-off ring 21 is directly made up of the deielectric-coating 35 be formed in the He Gai N+ district of N+ district 34 34 of described N-type epitaxy layer.Be preferably, the doping content in the N+ district of described cut-off ring 21 is greater than 1e16cm
-3.
With the super node MOSFET of 600 volts, the embodiment of the present invention one can adopt parameter below to realize:
The resistivity of described silicon substrate 1 is 0.001Ohmcm ~ 0.003Ohmcm;
The resistivity of described N-type epitaxy layer is 1Ohmcm ~ 5ohmcm, thickness 50 microns ~ 60 microns;
The width 3 microns ~ 5 microns of P type post and a described P type post 4a or described 2nd P type post 4b, the degree of depth 35 microns ~ 45 microns;
P type tagma (body) the i.e. concentration of P trap 7 is 1e17cm
-3~ 6e17cm
-3;
The thickness of described gate oxide 5 is 500 dust ~ 1500 dusts;
The thickness of described polysilicon gate 6 is 4000 dust ~ 6000 dusts;
The described heat oxide film 31 i.e. thickness of terminal deielectric-coating 31 is 6000 dust ~ 15000 dusts;
The thickness of described interlayer film 10 is 6000 dust ~ 12000 dusts;
The thickness of front metal layer 12 is 20000 dust ~ 60000 dusts;
The width of the P type post in 1st district, 2nd district and 3rd district can width that is identical or different, same n type post can be identical or different, can keep that the electric charge of P type post and the N-type post be alternately arranged is in a basic balance just can meet the demands.
The embodiment of the present invention two superjunction devices:
The embodiment of the present invention two superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention two superjunction devices and the embodiment of the present invention one is:
As shown in Figure 3; the hyperstructure of the described terminal protection structure of the embodiment of the present invention two superjunction devices also comprises the 3rd P type post 22c of one article of structure in the form of a ring, and described 3rd P type post 22c is looped around the periphery of described Part II super-junction structure and described Part III super-junction structure.Ring-shaped P post 22c can ensure the consistency of the distribution of the electric field strength of the P type post of electric charge basal seat area most peripheral, thus can improve the reliability of device.Cross-section structure along the EF place of Fig. 3 is identical with Fig. 4, and wherein the outermost P type post 4b of terminal protection structure corresponds to the 3rd P type post 22c.
The embodiment of the present invention three superjunction devices:
The embodiment of the present invention three superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention three superjunction devices and the embodiment of the present invention one is:
As shown in Figure 5, described cut-off ring 21 also comprises a polysilicon field plate ring 37, and described polysilicon field plate ring 37 is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring 36.Thicknesses of layers on whole cut-off ring adds by polysilicon field plate ring 37, further increases the protective effect of guard ring on device cut-off ring, as reduced the impact of the particle that device brings in scribing processes.
The embodiment of the present invention four superjunction devices:
The embodiment of the present invention four superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention four superjunction devices and the embodiment of the present invention one is:
As shown in Figure 6, also comprise a P+ district 9 in described cut-off ring 21, this P+ district is formed at bottom the described contact hole that described guard ring 36 contacts with the N+ district 34 of bottom, and P+ district 9 injects formed by carrying out P+ in N+ district 34 after contact hole is formed.The doping content in described P+ district 9 is greater than 1e16cm
-3.Contact hole covers P+ district 9 and part N+ district 34.P trap draw-out area 9 in the district of described P+ district 9 and 1 at this place can realize after contact hole technique simultaneously, decreases cost of manufacture.
The embodiment of the present invention five superjunction devices:
The embodiment of the present invention five superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention five superjunction devices and the embodiment of the present invention one is:
As shown in Figure 7; along on the Width of a described P type post 22a; the width of the outermost P type post of the hyperstructure of described terminal protection structure is less than the width of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure, and the degree of depth of the outermost P type post of the hyperstructure of described terminal protection structure is less than the degree of depth of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure simultaneously.
The embodiment of the present invention six superjunction devices:
The embodiment of the present invention six superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention six superjunction devices and the embodiment of the present invention one is:
As shown in Figure 8; along on the Width of a described P type post 22a; the outermost P type post of the hyperstructure of described terminal protection structure and the width of P type post 4c are less than the width of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure and P type post 4a and 4b, and simultaneously the outermost P type post of hyperstructure of described terminal protection structure and the degree of depth of P type post 4c are less than the degree of depth of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure and P type post 4a and 4b.
The embodiment of the present invention seven superjunction devices:
The embodiment of the present invention seven superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention seven superjunction devices and the embodiment of the present invention one is:
As shown in Figure 9, along on the Width of a described P type post 22a, the P type post being positioned at described voltage supporting region of the hyperstructure of described terminal protection structure and the width of P type post 4d are less than the width of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure and P type post 4a and 4b, simultaneously the P type post being positioned at described voltage supporting region of hyperstructure of described terminal protection structure and the degree of depth of P type post 4d are less than the degree of depth of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure and P type post 4a and 4b.Such device by forward bias in reverse bias, the forming process of the depletion region of terminal area is different from the forming process of the depletion region in flow of charge district, improve the non-linear of the change curve of Cds and the Vds of device, improve device individual electromagnetic interference in the application, thus make device be easier to application.
The embodiment of the present invention eight superjunction devices:
The embodiment of the present invention eight superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention eight superjunction devices and the embodiment of the present invention one is:
As shown in Figure 10; described cut-off ring 21 is made up of the deielectric-coating 35 be formed in the P+ district 9 of described N-type epitaxy layer, this P+ district 9 and the guard ring 36 on this deielectric-coating 35; described guard ring 36 is contacted with the P+ district 9 of bottom by contact hole, and guard ring 36 is a metal coating ring.In other embodiments, guard ring 36 also can be polysilicon protection ring; Also can not adopt guard ring 36 in other embodiments, cut-off ring 21 is directly made up of the deielectric-coating 35 be formed in the He Gai P+ district of P+ district 99 of described N-type epitaxy layer.Be preferably, the doping content in the P+ district 9 of described cut-off ring 21 is greater than 1e16cm
-3.Formation can be injected in P trap draw-out area 9 in the district of described P+ district 9 and 1 at this place after contact hole technique simultaneously, does not need extra photoetching process, decreases cost of manufacture.
The embodiment of the present invention nine superjunction devices:
The embodiment of the present invention nine superjunction devices has done further improvement on the basis of the embodiment of the present invention one, and the difference part of the embodiment of the present invention nine superjunction devices and the embodiment of the present invention one is:
As shown in figure 11, described cut-off ring 21 is directly made up of the guard ring 36 on described N-type epitaxy layer, deielectric-coating 35 and this deielectric-coating 35, and described guard ring 36 is contacted with the described N-type epitaxy layer of bottom by contact hole, and guard ring 36 is a metal coating ring.In other embodiments, guard ring 36 also can be polysilicon protection ring; Also can not adopt guard ring 36 in other embodiments, cut-off ring 21 is directly made up of described N-type epitaxy layer and deielectric-coating 35.Owing to there is no the injection of N+ or P+ in cut-off ring 21, make this region there is no extra ion implantation like this, simplify technical process, in the technique further reducing photoetching number of times, there is advantage.
Certainly can also carry out various combination to above-mentioned various technical scheme and obtain new embodiment of the present invention, as the vertical view of the embodiment of the present invention three to nine is all adopted structure shown in Fig. 3, then can obtain corresponding example structure; The width of the field plate in the combination of described cut-off ring 21,2nd district, P type post in 3rd district and the degree of depth are done corresponding adjustment and can obtain other corresponding example structure, will not enumerate here.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (15)
1. the terminal protection structure of a superjunction devices, the zone line of superjunction devices is flow of charge district, terminal protection structure is surrounded on the periphery in described flow of charge district, described terminal protection structure comprises transition region and voltage supporting region, and described transition region is between described flow of charge district and described voltage supporting region; It is characterized in that:
Described current flowing district comprises the Part I super-junction structure be made up of the P type post be alternately arranged be formed in N-type epitaxy layer and the first N-type post;
Overlook on face, a described P type post and described first N-type post all elongated and parallel to each other, each described P type post and described first N-type post all alongst extend in the described voltage supporting region in the outside in described current flowing district and form Part II super-junction structure;
The Part III super-junction structure be made up of the 2nd P type post be alternately arranged be formed in described N-type epitaxy layer and the second N-type post, described Part III hyperstructure extends to described voltage supporting region along the Width of a described P type post from the outside in described current flowing district; Described 2nd P type post and described second N-type post all elongated and parallel to each other, and described 2nd P type post is parallel with a described P type post;
Described Part II super-junction structure together with described Part III super-junction structure makeup ring around the hyperstructure of the described terminal protection structure of the periphery in described current flowing district, make the P type post of the hyperstructure of described terminal protection structure and N-type post be all strip not with turnover, thus improve the leakage current characteristic of described superjunction devices;
Field plate and P type ring is formed, described field plate structure be looped around the periphery in described current flowing district ringwise in described transition region; Described P type annular is formed in described N-type epitaxy layer, described P type ring structure be looped around the periphery in described current flowing district ringwise;
Cut-off ring is formed with, described cut-off ring structure be looped around the periphery of the hyperstructure of described terminal protection structure ringwise in the described N-type epitaxy layer of the outermost end in described voltage supporting region.
2. the terminal protection structure of superjunction devices as claimed in claim 1; it is characterized in that: the 3rd P type post also comprising one article of structure in the form of a ring in the hyperstructure of described terminal protection structure, the described 3rd P type band of column is around the periphery of described Part II super-junction structure and described Part III super-junction structure.
3. the terminal protection structure of superjunction devices as claimed in claim 1, it is characterized in that: in the described N-type epitaxy layer in described terminal protection structure region, be formed with terminal deielectric-coating, described terminal deielectric-coating has a ledge structure, described ledge structure laterally inclined and be arranged in described transition region, from described transition region to direction, described voltage supporting region, the thickness of described ledge structure increases gradually;
The field plate of described transition region covers described ledge structure and extends on the described terminal deielectric-coating of described voltage supporting region, and the field plate of described transition region has inclined side in the described ledge structure position of covering.
4. the terminal protection structure of superjunction devices as claimed in claim 3, is characterized in that: the field plate of described transition region is polysilicon field plate, Metal field plate, the combining structure of polysilicon field plate and Metal field plate.
5. the terminal protection structure of superjunction devices as claimed in claim 4, is characterized in that: the field plate of described transition region is in the combining structure of polysilicon field plate and Metal field plate, and described polysilicon field plate has inclined side in the described ledge structure position of covering;
Be formed with Metal field plate at the top with laterally inclined polysilicon field plate, do not connect between this Metal field plate and described laterally inclined polysilicon field plate or connected by contact hole.
6. the terminal protection structure of superjunction devices as claimed in claim 3, is characterized in that: the composition material of described terminal deielectric-coating is heat oxide film.
7. the terminal protection structure of superjunction devices as claimed in claim 1, is characterized in that: described cut-off ring is made up of the deielectric-coating be formed in the He Gai N+ district of N+ district of described N-type epitaxy layer;
Or, described cut-off ring is made up of the deielectric-coating be formed in the N+ district of described N-type epitaxy layer, this N+ district and the guard ring on this deielectric-coating, described guard ring is contacted with the N+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring;
Or, described cut-off ring is made up of the deielectric-coating be formed in the N+ district of described N-type epitaxy layer, this N+ district, guard ring on this deielectric-coating and polysilicon field plate ring, described guard ring is contacted with the N+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
8. the terminal protection structure of superjunction devices as claimed in claim 7, is characterized in that: bottom the described contact hole that described guard ring contacts with the N+ district of bottom, be formed with P+ district.
9. the terminal protection structure of superjunction devices as claimed in claim 7 or 8, is characterized in that: the doping content in described cut-off Huan N+ district is greater than 1e16cm
-3.
10. the terminal protection structure of superjunction devices as claimed in claim 8, is characterized in that: be greater than 1e16cm in the doping content stating the P+ district bottom the described contact hole bottom guard ring
-3.
The terminal protection structure of 11. superjunction devices as claimed in claim 1, is characterized in that: described cut-off ring is made up of with the deielectric-coating in this N-type epitaxy layer the described N-type epitaxy layer in described cut-off ring region;
Or described cut-off ring is made up of the deielectric-coating in the described N-type epitaxy layer in described cut-off ring region, this N-type epitaxy layer and the guard ring on this deielectric-coating, and described guard ring is polysilicon protection ring or metal coating ring;
Or described cut-off ring is made up of the deielectric-coating in the described N-type epitaxy layer in described cut-off ring region, this N-type epitaxy layer, guard ring on this deielectric-coating and polysilicon field plate ring, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
The terminal protection structure of 12. superjunction devices as claimed in claim 1, is characterized in that: described cut-off ring is made up of the deielectric-coating be formed in the He Gai P+ district of P+ district of described N-type epitaxy layer;
Or, described cut-off ring is made up of the deielectric-coating be formed in the P+ district of described N-type epitaxy layer, this P+ district and the guard ring on this deielectric-coating, described guard ring is contacted with the P+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring;
Or, described cut-off ring is made up of the deielectric-coating be formed in the P+ district of described N-type epitaxy layer, this P+ district, guard ring on this deielectric-coating and polysilicon field plate ring, described guard ring is contacted with the P+ district of bottom by contact hole, and described guard ring is polysilicon protection ring or metal coating ring; Described polysilicon field plate ring is not connected with described guard ring by contact holes contact or described polysilicon field plate ring with described guard ring.
The terminal protection structure of 13. superjunction devices as claimed in claim 12, is characterized in that: the doping content in described cut-off Huan P+ district is greater than 1e16cm
-3.
The terminal protection structure of 14. superjunction devices as claimed in claim 1 or 2; it is characterized in that: along on the Width of a described P type post; the width of the outermost P type post of the hyperstructure of described terminal protection structure is less than the width of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure, and the degree of depth of the outermost P type post of the hyperstructure of described terminal protection structure is less than the degree of depth of other P type post of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure simultaneously.
The terminal protection structure of 15. superjunction devices as claimed in claim 1 or 2, it is characterized in that: along on the Width of a described P type post, the width being positioned at the P type post of described voltage supporting region of the hyperstructure of described terminal protection structure is less than the width of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure, the degree of depth being positioned at the P type post of described voltage supporting region of the hyperstructure of described terminal protection structure is less than the degree of depth of the P type post being positioned at described transition region of the hyperstructure of described terminal protection structure and the P type post of described Part I super-junction structure simultaneously.
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