CN105426316B - A kind of racing track storage chip and its control method based on quota control temperature - Google Patents

A kind of racing track storage chip and its control method based on quota control temperature Download PDF

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Publication number
CN105426316B
CN105426316B CN201510782745.2A CN201510782745A CN105426316B CN 105426316 B CN105426316 B CN 105426316B CN 201510782745 A CN201510782745 A CN 201510782745A CN 105426316 B CN105426316 B CN 105426316B
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racing track
quota
storage
bar
domain
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CN105426316A (en
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孙广宇
张超
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Peking University
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Peking University
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B33/00Constructional parts, details or accessories not provided for in the other groups of this subclass
    • G11B33/14Reducing influence of physical parameters, e.g. temperature change, moisture, dust
    • G11B33/1406Reducing the influence of the temperature
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7209Validity control, e.g. using flags, time stamps or sequence numbers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hall/Mr Elements (AREA)

Abstract

The invention discloses a kind of racing track storage chip and its control method based on quota control temperature.The racing track storage chip of the present invention includes:Substrate, racing track storage bar, packed layer and heat abstractor;The present invention sets mobile quota in a program traffic coverage, disperses so as to carry out focus from the time;Also, a data block is stored in into mutually non-conterminous multiple racing tracks to store on bar, disperseed from focus is spatially carried out.Cause the control method of temperature rising because of moving operation the invention provides a set of racing track memory;The time is considered, the method that focus spatially disperses, the temperature rise of reduction chip that can be as much as possible;Simulative display, performance loss caused by method of the invention averagely only have 5%.

Description

A kind of racing track storage chip and its control method based on quota control temperature
Technical field
The present invention relates to racing track memory technology, more particularly to a kind of racing track storage chip based on quota control temperature and its Control method.
Background technology
Racing track memory (Racetrack Memory), also known as neticdomain wall memory (Domain wall memory), It is a kind of memory based on from gyromagnetic material magnetic domain wall moving characteristic data storage.Racing track storage is close due to the storage of its superelevation Degree and access speed, are increasingly becoming educational circles, the study hotspot of industry at present.Racing track storage, which utilizes, to be stored on strip magnetic material A large amount of magnetic domains carry out data storage.But to support highdensity storage, racing track storage introduces new operation:It is mobile (shift).One racing track storage bar (Racetrack memory Stripe, RS) is divided into multiple isometric domains, and the arrangement in domain claims For domain sequence, and some access ends are uniformly distributed, each access end is responsible for accessing one section of domain.To access in this section of domain Each domain makes, it is necessary to domain to be moved left and right to (relative to RS movement, access end and RS are not moved physically in only domain) on RS The domain accessed required for obtaining is corresponding at access end.In the prior art, moving operation is completed by the movement of neticdomain wall:Magnetic domain Wall moves on nano wire under spinning current driving and eventually stops at anchor region (pinning site).But calculate Show that movement can produce amount of heat, so as to cause the change of storage chip temperature with experiment.High temperature rise can cause Racing track stored electricity parameter change, magnetic domain wall moving speed are drifted about, and storage stability of material declines, and is even resulted in when serious Storage material burns.At present, prior art cannot be guaranteed that temperature is no more than set quota when racing track is stored in normal work, after Without technology it can be controlled to move density.
The content of the invention
In order to overcome the above-mentioned deficiencies of the prior art, the present invention provide it is a kind of for racing track storage moving operation based on The temprature control method of volume;Racing track can be stored by the method for the present invention by moving in the case where having substantially no effect on performance Temperature caused by dynamic operation rises control in rational scope.
It is an object of the present invention to provide a kind of racing track storage chip based on quota control temperature.
The racing track storage chip based on quota control temperature of the present invention includes:Substrate, racing track store bar, packed layer and dissipated Thermal;Wherein, bar is stored as racing track in a plurality of parallel nano wire of Grown;In the gap of nano wire and shape above Into packed layer;Heat abstractor is set on packed layer;Each racing track storage bar is divided into M domain, formative region sequence, and each N number of access end is evenly distributed on individual racing track storage bar, each access end is responsible for accessing one section of domain;The storage of one data block is adopted With focus dispersing mode, i.e. a data block is dispersed on the domain coordinate identical domain in the domain sequence on k racing track storage bar Stored, and this k racing track storage bar is mutually non-conterminous, and the k racing track for common one data block of storage stores bar Set forms a storage bar cluster (group);The position correspondence of the domain sequence in racing track storage bar where each data block A port location register;According to the thermal conductivity factor of chip, the storage racing track bar that the area of heat dissipation region can accommodate is obtained Number be 1/ β, then in unit area shared by same data block racing track storage bar number and heat dissipation region in total magnetic The ratio of bar number is β, wherein, M, N, k and 1/ β are natural number.
N number of access end is distributed for M domain on a racing track storage bar, if M is N multiple, each access end accesses M/N domain, if M is not N multiple, each access end accesses to be rounded on M/N, i.e., [M/N].
Heat dissipation region is a panel region of isothermal body, is typically a decoding arrays in chip.
Substrate uses monocrystalline silicon;Nano wire uses crystalline silicon dioxide, by silicon substrate autoxidation (native Oxidation);Packed layer uses the silica of amorphous state.
It is another object of the present invention to provide a kind of temperature control of the racing track storage chip based on quota control temperature Method processed.
The temprature control method of the racing track storage chip based on quota control temperature of the present invention, comprises the following steps:
1) focus dispersing mode data storage is used:One data block is dispersed in the domain sequence on k racing track storage bar Sequence number identical domain on stored, and this k racing track storage bar is mutually non-conterminous, for one data block of storage jointly K racing track storage bar set formed one storage bar cluster, according to the thermal conductivity factor of chip calculate, obtain the face of heat dissipation region The number for the storage racing track bar that product can accommodate is 1/ β, then the racing track in unit area shared by same data block stores bar The ratio of number and the number of total racing track storage bar in heat dissipation region is β;
2) when a program traffic coverage (period) starts, controller is arranged on can in a program traffic coverage Mobile step number setting is mobile " quota " (quota), and quota and the ratio of program traffic coverage are α;
3) when a request for accessing data block reaches racing track memory, ask to be decoded according to the address of access, Obtain asking the domain coordinate of reference address decoding, each storage bar cluster has a port location register to be used to refer to access Port and the relative position of the domain sequence where storage bar cluster, by the numerical value and request access that compare port position register The domain coordinate of location decoding, drawing needs mobile distance;
4) controller subtracts mobile quota expense from remaining quota, if quota is enough, where storage bar cluster Multiple racing track storage parallel movements of bar can perform read block;If not enough, that accessed data block will be taken as Freeze block, into step 5);
5) marker bit in the label for freezing block is checked, if it is net (clean) data, controller will freeze the mark of block Valid data (valid) position is set to invalid in label, and returns to one fail data (miss) of controller, continues request Stored to next stage and initiate request of data;If dirty (dirty) data, controller will be blocked, to wait next journey The beginning in sort run section.
Wherein, in step 1), heat dissipation region is a panel region of isothermal body, is typically a decoding arrays in chip. According to the bits allocation of data block on k racing track storage bar, the distribution of each bit is on a racing track storage bar.According to The speed of heat conduction and heat production interval carry out calculating β.
In step 2), controller is the logic control element for controlling racing track memory operation.Quota is defined as at one Transportable total step number in program traffic coverage;It is a step that one domain, which is moved to adjacent domain,.When quota is used up, except non-entry Next program traffic coverage, it is impossible to there are more moving operations to be performed again.
Zone of reasonableness (20 degrees Celsius) is risen above for control temperature, α and β products should be not more than 1/40, to ensure heat Stability.Transportable maximum step number (quota) can be expressed as α and be multiplied by program traffic coverage in one program traffic coverage The ratio of time overhead that moves a step of length and shifting.
Quota is divided into two kinds:Net quota of data and dirty data quota.The request of one access net amount evidence can only use net amount According to quota, and the request for accessing dirty data preferentially uses dirty data quota, and net amount evidence can be used when dirty data quota is inadequate Quota.The summation of net quota of data and dirty data quota is identical with mobile quota before, ensure that to temperature controlled consistent Property.Simple to state, the ratio for defining dirty data quota and total quota is γ.When γ is 1, net quota of data is 0, therefore all Moving operation can not all be performed by accessing the request of net amount evidence;And when γ is 0, dirty data quota is 0, and optimization method deteriorates to letter Folk prescription method.
The present invention sets mobile quota in a program traffic coverage, disperses so as to carry out focus from the time;Also, One data block is stored in into mutually non-conterminous multiple racing tracks to store on bar, disperseed from focus is spatially carried out.
Advantages of the present invention:
Cause the control method of temperature rising because of moving operation the invention provides a set of racing track memory;Synthesis is examined The time is considered, the method that focus spatially disperses, the temperature rise of reduction chip that can be as much as possible;Simulative display, Performance loss averagely only has 5% caused by the method for the present invention.
Brief description of the drawings
Fig. 1 is the schematic diagram of the racing track storage chip based on quota control temperature of the present invention;
Fig. 2 is showing for the storage mode of a data block of the racing track storage chip based on quota control temperature of the present invention It is intended to, wherein, (a) is without the schematic diagram using focus dispersing mode, and (b) is the schematic diagram using focus dispersing mode;
Fig. 3 is the flow chart of the temprature control method of the racing track storage chip based on quota control temperature of the present invention.
Embodiment
Below in conjunction with the accompanying drawings, by embodiment, the present invention will be further described.
As shown in figure 1, the racing track storage chip based on quota control temperature of the present embodiment includes:Substrate 1, racing track storage Bar 2, packed layer 3 and heat abstractor 4;Wherein, a plurality of parallel nano wire is grown on substrate 1 stores bar 2 as racing track;Receiving The gap of rice noodles and above formation packed layer 3;Heat abstractor 4 is set on silica.Use in substrate 1 and formed on monocrystalline silicon Silica, it is in turn below packaging environment substrate 01 and pcb board 02;Nano wire 2 uses Co20Fe60B20Nano wire packed layer 3 Using the silica of amorphous state;It is thermal grease between packed layer 3 and heat abstractor 4.
Racing track storage chip is a physical concept, and racing track memory is its logical concept.
The heat of racing track storage bar is mainly the current impulse by promoting magnetic domain wall moving inside nano wire during working condition Caused under joule heating effect, heat is while causing nano wire to heat up, by the packed layer on upper strata and the lining of lower floor Bottom is diffused, and then by the heat exchange action between chip outer layer and fin, finally heat derives to the external world.
Multiple bits can be stored on racing track storage bar, but by all bit storages of same data block in a match It is not efficient on road storage bar.Because this will cause racing track storage bar repeatedly mobile and access.A kind of relatively common efficient number It is that a data block is dispersed on multiple racing track storage bars according to mapping mode, multiple racing track storage bars are simultaneously mobile, so as to simultaneously Row reads data.However, these racing tracks storage bar, which is placed adjacent, can cause hot localised points, because the magnetic of unit area internal heat generation Bar is fewer, then nano wire layer temperature rises fewer.Therefore, the racing track that have mapped same data block is stored into bar in storage array It is middle to place respectively, temperature rise can be reduced, as shown in Figure 2 with increasing heat radiation area.By same data block institute in unit area Total magnetic stripe number in the magnetic stripe number accounted for and region is used for β.Calculated according to the thermal conductivity factor of chip, same dissipate can be regarded as The area of thermal region is only capable of accommodating 8 magnetic stripes.Therefore, β is arranged to 1/8.Counted according to the speed of heat conduction and heat production interval β is calculated, is different under different situations, β is reduced to the spacing+1 of two racing tracks storage bar nearest in same cluster here It is reciprocal.
To realize the control method of the present invention, the present embodiment, should using racing track memory as the last level cache in CPU Level storage is usually that group is connected (set-associative), and each data block includes label and data two parts.One group (set) all data sharing group address in, and be distinguish between with label.Generally, the access of last level cache is first to compare Label, data are visited again after hit.When a request reaches cache controller, ask to be solved according to the address that it is accessed Code, so as to be sent to corresponding group.Multiple labels, which are compared, in group determines whether to hit.Meanwhile the data being hit Need to check validity (validity) and uniformity (coherence) state.The data storage of the present invention ensures the visit of label Ask and do not need moving operation, therefore, compare label and be not related to moving operation.If accessing hit on an effective information, The racing track storage bar of data storage will be moved to specified location, and then corresponding data is performed corresponding read-write operation.Now, If mobile and read-write operation can smoothly complete, caching, which performs this request, to be terminated, and can be that next request services. If result is miss (miss) or data invalid (invalid), request will be sent to next stage storage (based on herein Deposit), follow-up request may be blocked by being cached with, and be completed until this request stores in next stage.Cache controller control match The read operation of road memory.
The temprature control method of the racing track storage chip based on quota control temperature of the present embodiment, comprises the following steps:
1) data block of 32 bits is dispersed in the sequence number identical domain in the domain sequence on 32 racing track storage bars On stored, and this 32 racing tracks storage bar is mutually non-conterminous, is calculated according to the thermal conductivity factor of chip, obtains heat dissipation region The number for the storage racing track bar that area can accommodate is 8, then the racing track in unit area shared by same data block stores bar The ratio of number and the number of total racing track storage bar in heat dissipation region is 1/8.
2) when a program traffic coverage starts, cache controller is arranged in a program traffic coverage and can moved The mobile quota of step number setting, quota and the ratio of program traffic coverage are α;Quota is divided into two kinds:Net quota of data and dirty number According to quota, the ratio for defining dirty data quota and total quota is γ.
3) when a request for accessing data block reaches caching, ask to be decoded according to the address of access, asked The domain coordinate for asking reference address to decode, so as to be sent to corresponding group, in group, multiple labels, which are compared, determines whether to order In, the data being hit need to check validity and coherency state;If accessing hit on an effective information, enter Step 4), if result is miss (miss) or data invalid (invalid), request will be sent to next stage storage (being herein main memory), follow-up request may be blocked by being cached with, and be completed until this request stores in next stage.
4) each storage bar cluster has a port location register to be used to refer to access port and storage bar cluster place Domain sequence relative position, by compare port position register numerical value and request reference address decode domain coordinate, obtain Go out to need mobile distance.
5) cache controller subtracts mobile quota expense from remaining quota, if quota is enough, stores bar cluster institute Multiple racing tracks storage the parallel movement of bar can perform read block;If not enough, accessed that data block will be by As block is freezed, into step 6).
6) marker bit in the label for freezing block is checked, if it is net amount evidence, cache controller will freeze the label of block Middle valid data (valid) position is set to invalid, and one fail data (miss) of return cache controller, allow request after Continue to store to next stage and initiate request of data;If dirty data, cache controller will be blocked, to wait next section Beginning.
It is finally noted that the purpose for publicizing and implementing mode is that help further understands the present invention, but ability The technical staff in domain is appreciated that:Without departing from the spirit and scope of the invention and the appended claims, it is various replacement and Modification is all possible.Therefore, the present invention should not be limited to embodiment disclosure of that, the scope of protection of present invention with The scope that claims define is defined.

Claims (10)

1. a kind of racing track storage chip based on quota control temperature, it is characterised in that the racing track storage chip includes:Lining Bottom, racing track storage bar, packed layer and heat abstractor;Wherein, stored in a plurality of parallel nano wire of Grown as racing track Bar;Form in the gap of nano wire and above packed layer;Heat abstractor is set on packed layer;Each racing track storage bar is divided into M domain, formative region sequence, and N number of access end is evenly distributed on each racing track storage bar, each access end is responsible for access One section of domain;The storage of one data block uses focus dispersing mode, i.e. a data block is dispersed in the domain on k racing track storage bar Stored on domain coordinate identical domain in sequence, and this k racing track storage bar is mutually non-conterminous, for common storage one The set of the k racing track storage bar of data block forms a storage bar cluster;In racing track storage bar where each data block The position correspondence a port location register of domain sequence;According to the thermal conductivity factor of chip, the area institute energy of heat dissipation region is obtained The number of the storage racing track bar of receiving is 1/ β, then in unit area shared by same data block racing track storage bar number and The ratio of total magnetic stripe number in heat dissipation region is β, wherein, M, N, k and 1/ β are natural number;The racing track memory is as in CPU Last level cache, the level storage be usually group be connected, each data block includes label and data two parts.
2. racing track storage chip as claimed in claim 1, it is characterised in that for M domain distribution N on a racing track storage bar Individual access end, if M is N multiple, each access end accesses M/N domain, if M is not N multiple, each access end is visited Ask and rounded on M/N, be i.e. [M/N].
3. racing track storage chip as claimed in claim 1, it is characterised in that the heat dissipation region is a section of isothermal body Domain, it is a decoding arrays in chip.
4. racing track storage chip as claimed in claim 1, it is characterised in that the substrate uses monocrystalline silicon;The nano wire Using crystalline silicon dioxide, by silicon substrate autoxidation;The packed layer uses the silica of amorphous state.
A kind of 5. temprature control method of the racing track storage chip based on quota control temperature, it is characterised in that the controlling party Method comprises the following steps:
1) focus dispersing mode data storage is used:One data block is dispersed in the sequence in the domain sequence on k racing track storage bar Row number identical is stored on domain, and this k racing track storage bar is mutually non-conterminous, for the k of one data block of storage jointly The set of individual racing track storage bar forms a storage bar cluster, is calculated according to the thermal conductivity factor of chip, obtains the area of heat dissipation region The number for the storage racing track bar that can be accommodated is 1/ β, then of the racing track storage bar in unit area shared by same data block Number and the ratio of the number of total racing track storage bar in heat dissipation region are β, wherein, k and 1/ β are natural number;
2) when a program traffic coverage starts, controller is arranged on the step number that can be moved in a program traffic coverage and set Fixed mobile " quota ", quota and the ratio of program traffic coverage are α;
3) when a request for accessing data block reaches racing track memory, ask to be decoded according to the address of access, obtain The domain coordinate of reference address decoding is asked, each storage bar cluster has a port location register to be used to refer to access port With storage bar cluster where domain sequence relative position, by compare port position register numerical value and request reference address solution The domain coordinate of code, drawing needs mobile distance;
4) controller subtracts mobile quota expense from remaining quota, multiple where storage bar cluster if quota is enough The racing track storage parallel movement of bar can perform read block;If not enough, that accessed data block, which will be taken as, to be freezed Block, into step 5);
5) marker bit freezed in the label of block is checked, if it is net amount evidence, controller is by significant figure in the label for freezing block It is set to invalid according to position, and returns to one fail data of controller, continuing request please to next stage storage initiation data Ask;If dirty data, controller will be blocked, and wait the beginning of next program traffic coverage;Wherein, racing track is stored Device is as the last level cache in CPU, and level storage is usually that group is connected, and each data block includes label and data two Point.
6. control method as claimed in claim 5, it is characterised in that in step 1), according to the bits allocation of data block On k racing track storage bar, the distribution of each bit is on a racing track storage bar.
7. control method as claimed in claim 5, it is characterised in that in step 1), according between the speed of heat conduction and heat production Every carrying out calculating β.
8. control method as claimed in claim 5, it is characterised in that in step 2), quota is defined as transporting in a program Transportable total step number in row section;It is a step that one domain, which is moved to adjacent domain,;Quota in one program traffic coverage It is expressed as the ratio for the time overhead that α is multiplied by the length of program traffic coverage and shifting moves a step.
9. control method as claimed in claim 5, it is characterised in that the quota is divided into two kinds:Net quota of data and dirty number According to quota;The request of one access net amount evidence can only use net quota of data, and the request for accessing dirty data preferentially uses dirty number According to quota, net quota of data can be used when dirty data quota is inadequate.
10. control method as claimed in claim 5, it is characterised in that α and β products are not more than 1/40, to ensure thermostabilization Property.
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