CN107239409B - Temperature-based important data distribution method and system - Google Patents

Temperature-based important data distribution method and system Download PDF

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CN107239409B
CN107239409B CN201710316728.9A CN201710316728A CN107239409B CN 107239409 B CN107239409 B CN 107239409B CN 201710316728 A CN201710316728 A CN 201710316728A CN 107239409 B CN107239409 B CN 107239409B
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temperature
lowest temperature
layer
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CN107239409A (en
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王毅
陈炜轩
谢婧雯
林观泉
毛睿
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Shenzhen University
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
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    • G06F11/3058Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations

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Abstract

The invention provides a temperature-based important data distribution method, which is applied to a three-dimensional flash memory, wherein the method comprises the following steps: monitoring the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data; and selecting a preset distribution mode to perform preset important data writing operation according to the monitored uniformity of the temperature distribution of each part of the chip and a preset cooling model of an operating system. The invention also provides a temperature-based important data distribution system. The technical scheme provided by the invention provides 4 different block allocation strategies according to whether the temperature distribution is uniform or not and whether the cooling model is strong or not, so that the physical blocks used for storage under different scenes have higher stability and reliability, and the generation of errors of important data is prevented.

Description

Temperature-based important data distribution method and system
Technical Field
The invention relates to the field of data storage, in particular to a temperature-based important data distribution method and a temperature-based important data distribution system.
Background
The 3D flash memory (Three-dimensional flash memory) is an emerging leading-edge technology and has excellent development prospects. The method breaks through the bottleneck of the traditional two-dimensional plane flash memory (2D/planar flash memory), and is realized by considering stacking more layers without consuming large cost and energy to improve the process technology on the premise of ensuring the capacity and the reliability. The planar NAND flash memory has a Single layer (Single layer) structure, the size of the memory cell is gradually reduced along with the progress of the manufacturing process, the density of the memory cell in a unit area is increased, and the interference between the cells is more and more serious, thereby reducing the reliability of the NAND flash memory product.
The 3D flash memory has a Multi-layer (Multi-layer) three-dimensional structure, and planar layers are stacked together. There is a limit to the number of memory cells that can be placed on a single plane of a flash memory chip, which limits the overall storage capacity of the device. According to the structural characteristics of the 3D flash memory, the 3D flash memory can be divided into a plurality of layers, each layer is provided with a plurality of rows, and each row is provided with a plurality of physical blocks. Based on such a stereoscopic structure, the 3D flash memory allows memory cells to be vertically stacked, so that the capacity of the flash memory device can be exponentially increased, achieving higher capacity in a smaller physical space.
In the existing techniques for physical space allocation, for example, "interference mitigation allocation scheme" (y. -m.chang, y. -h.chang, t. -w.kuo, h. -p.li, and y. -c.li, "a discrete-update scheme for 3D flash memory," in 2013IEEE/ACM International Conference Computer-aid Design (ICCAD), Nov 2013, pp.421-428), and "reliability-enhanced address mapping strategy" (y.wang, z.share, h.chan, l.bathen, and n.dut, "a reliability enhanced address mapping scheme for third-dimension (3-D) NAND flash memory," IEEE transaction mapping scheme, "VLSI, 22, 12, 2, and 2, each of which is not considered. The mapping tables of the physical space and the real address space in the flash memory chip adopt a sequential mapping mode, and the temperature has proximity, so that the problem of mutual interference of adjacent physical blocks exists.
For the physical block allocation operation of important data, the influence of temperature on the flash memory is not well considered in the existing 3D flash memory management technology. The 3D flash memory chip is very sensitive to temperature. In fact, high temperature accelerates the emission and movement of charges, causing a change in the voltage level on the physical block (for example, from 01 to 11), which makes the stored data erroneous. Such errors are fatal to important data like file system metadata and address mapping tables. If the address of the file system cannot be found, it is less likely to load the file system. Therefore, high stability and high integrity are required for the allocation of such important data write blocks. However, the data stability and integrity in this respect is currently generally low in the prior art.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a temperature-based important data allocation method and system, and to solve the problem in the prior art that the stability and integrity of important data are low when the important data is allocated to a physical block.
The invention provides a temperature-based important data distribution method, which is applied to a three-dimensional flash memory, wherein the method comprises the following steps:
monitoring the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data;
and selecting a preset distribution mode to perform preset important data writing operation according to the monitored uniformity of the temperature distribution of each part of the chip and a preset cooling model of an operating system.
In another aspect, the present invention further provides a temperature-based important data distribution system, applied to a three-dimensional flash memory, where the system includes:
the temperature measuring module is used for monitoring the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data;
and the distribution module is used for selecting a preset distribution mode to carry out preset important data writing operation according to the monitored uniformity of the temperature distribution of each part of the chip and a preset cooling model of the operating system.
According to the technical scheme provided by the invention, the temperature of the 3D flash memory chip is dynamically monitored by using the temperature sensor or the thermal camera, and the preset important data is distributed to the block area with low temperature, so that the integrity and the stability of the preset important data are ensured. The technical scheme provided by the invention constructs 4 different block allocation strategies according to whether the temperature distribution is uniform or not and whether the cooling model is strong or not, ensures that physical blocks used for storage under different scenes have higher stability, prevents important data from generating errors, and simultaneously uses the quadtree and the queue data structure to assist in realizing the searching and positioning of the blocks, can position a block area with low temperature, avoids the situation of repeatedly executing write operation in the same area, reduces the heat accumulation and improves the wear balance.
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FIG. 1 is a flow chart of a method for assigning critical data based on temperature according to an embodiment of the present invention;
fig. 2 is a flowchart of a preset important data allocation method in fig. 1 when it is monitored that temperatures of various parts of a chip are uniformly distributed and a preset cooling model is a strong cooling model in an embodiment of the present invention;
fig. 3 is a flowchart of a preset important data allocation method in fig. 1 when it is monitored that temperatures of various parts of a chip are uniformly distributed and a preset cooling model is a weak cooling model in an embodiment of the present invention;
fig. 4 is a flowchart of a preset important data allocation method in fig. 1 when non-uniform distribution of temperatures of each part of a chip is monitored and a preset cooling model is a strong cooling model in an embodiment of the present invention;
fig. 5 is a flowchart of a preset important data allocation method in fig. 1 when non-uniform distribution of temperatures of each part of a chip is monitored and a preset cooling model is a weak cooling model in an embodiment of the present invention;
fig. 6 is a schematic diagram of the internal structure of the important data distribution system 10 based on temperature according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
A method for distributing important data based on temperature according to the present invention will be described in detail below.
Fig. 1 is a flowchart illustrating a method for distributing important data based on temperature according to an embodiment of the present invention.
In this embodiment, the method for allocating important data based on temperature is applied to a Three-dimensional flash memory (Three-dimensional flash memory), where the important data includes preset operating system metadata, an address mapping table, specific and exclusive data, frequently accessed or updated data, and the like.
In step S1, when the operating system of the three-dimensional flash memory issues a request for writing the preset important data, the temperature of each part of the chip in the three-dimensional flash memory is monitored.
In this embodiment, when the operating system issues a request for writing the preset important data, it indicates that important data (e.g., file system metadata, address mapping table, etc.) needs to be written into the three-dimensional flash memory chip, and at this time, the temperature of each portion of the three-dimensional flash memory chip is dynamically monitored by using a temperature sensor or a thermal camera, and then a series of temperature measured values are checked or a thermal image is directly analyzed, so as to allocate the preset important data to a block area with a low temperature, so as to ensure the integrity and stability of the preset important data.
In step S2, a preset distribution mode is selected according to the monitored uniformity of the temperature distribution of each portion of the chip and a preset cooling model of the operating system to perform a preset important data writing operation.
In this embodiment, the uniformity of the temperature distribution of each part of the chip includes uniform temperature distribution and non-uniform temperature distribution, and the cooling model includes a strong cooling model and a weak cooling model, so that 4 different block allocation strategies are constructed according to whether the temperature distribution is uniform or not and whether the cooling model is strong or not, thereby ensuring that the physical blocks used for storage in different scenes have higher stability and preventing preset important data from generating errors.
In this embodiment, in view of the sensitivity of the chip in the three-dimensional flash memory to temperature, high temperature may destroy the stability and integrity of the preset important data, so for some preset important data, such as metadata of a file system, an address mapping file, and the like, it is necessary to adopt some strategies to allocate to a physical block with a lower temperature, so as to ensure the reliability thereof, where the allocation strategies for the preset important data involve the following two data structures:
(1) the quad-tree is based on the structural characteristics of the 3D flash memory chip and is used for storing the data of the 3D flash memory chip, the 3D flash memory can be viewed as a 3D cube containing alpha layer layers, each layer containing beta planes, each of the planes is formed by connecting γ physical blocks (blocks), a layer (e.g., layer _0) in the flash memory chip is selected, divided into 2 × 2 dies, then selects a die (e.g., die _2) with the lowest temperature, continues to divide it into 2 × 2 planes, selects a plane (e.g., plane _1) with the lowest temperature, divides it into 2 × 2 blocks, and finally locates to a block region with the lowest temperature, writes preset important data, according to actual needs, further division can be performed, more layers of subtrees are generated continuously, and the preset important data structure is applied to the condition that the cooling model is weak;
(2) a queue, which is a queue aiming at the temperature proximity of physical blocks, is a 3D flash memory chip adopting charge extraction technology, is very sensitive to temperature, and based on the temperature proximity, adjacent physical blocks always have similar temperature, after the write operation is executed for preset important data, the temperature of the block area can rise, when the write operation is very frequent, the temperature can also rise rapidly, and when the write operation is very frequent, write blocks are distributed to different layers at each time of writing, so that the heat accumulation can be avoided and the wear leveling can be improved, in order to ensure that adjacent N times of write operation are not repeatedly written into the same layer, a queue structure can be adopted, assuming N layers of layers are shared, a queue Q is used for storing the selected layer, the layer can not be selected in the subsequent N-size (Q) distribution, wherein the size (Q) refers to the number of layers contained in the queue Q until all the layers are written, and then the layer is used according to the first-in first-out principle, so that under the condition of strong cooling model, enough time can be reserved for cooling the last written block region, so as to write in the block next time, and the preset important data structure is applied to the strong cooling model.
Referring to fig. 2, a flowchart of a method for allocating preset important data in fig. 1 when it is monitored that temperatures of various portions of a chip are uniformly distributed and a preset cooling model is a strong cooling model according to an embodiment of the present invention is shown.
In this embodiment, if it is monitored that the temperature distribution of each portion of the chip is uniform, it is indicated that the temperatures of each portion of the chip are relatively close, so when allocating a physical block to preset important data, the accuracy requirement for block search and positioning can be reduced, for example, the positioning of a write block is completed only by using a two-layer quadtree, and the positioning of a block is completed by using a three-layer quadtree when the temperature distribution is non-uniform. In this embodiment, if the preset cooling model is a strong cooling model, it indicates that the temperature is slowly increased and the temperature is rapidly decreased.
In step S201, it is determined whether the write operation is frequent;
if not, comparing the temperatures of the layers on the three-dimensional flash memory core in step S202 to obtain a layer low _ temp _ layer with the lowest temperature;
in step S203, the layer low _ temp _ layer with the lowest temperature is divided into two partitions die by half;
in step S204, the temperatures of the two partitions die are compared, and the partition with the lowest temperature low _ temp _ die is located;
in step S205, the partition low _ temp _ die with the lowest temperature is divided into n × n grids;
in step S206, randomly selecting m sample points in a grid of n × n, and comparing the temperatures of the m sample points, wherein n × n/2< m < n × n;
in step S207, the sample point with the lowest temperature is obtained, and the preset important data is written in the area where the sample point with the lowest temperature is located.
When the write operation is frequent, writing in different layer layers each time by adopting the queue in the preset important data structure, avoiding heat accumulation and improving wear balance, and reserving enough time for cooling the block area written in the time, specifically, judging whether the size (Q) of the data queue adopting the queue data structure is equal to the layer number layer _ num of the chip in the three-dimensional flash memory or not in step S208;
if yes, it indicates that all the layers in the chip have been written at least once, at this time, in step S209, the layer at the head of the queue is taken out as the lowest temperature layer low _ temp _ layer because it has been sufficiently cooled, and then step S203-S207 is executed, that is, the lowest temperature layer low _ temp _ layer is divided into half to obtain two partition die, the temperatures of the two partition die are compared and positioned to the lowest temperature partition low _ temp _ die, the lowest temperature partition low _ temp _ die is divided into grids of n, m sample points are randomly selected in the grids of n, the temperatures of the m sample points are compared, the lowest temperature sample point is obtained, and preset important data is written in the region where the lowest temperature sample point is located, where n/2< m < n;
if not, in step S210, the temperatures of the layers on the chip except the queue Q are compared to obtain the lowest layer low _ temp _ layer.
In step S211, the lowest temperature layer low _ temp _ layer is inserted into the tail of the queue, and then steps S203-S207 are performed, that is, the lowest temperature layer low _ temp _ layer is divided into halves to obtain two partitioned die, the temperatures of the two partitioned dies are compared and positioned to the lowest temperature partitioned region low _ temp _ die, the lowest temperature partitioned region low _ temp _ die is divided into n × n grids, m sample points are randomly selected in n × n grids, the temperatures of the m sample points are compared, the lowest temperature sample point is obtained, and preset important data is written in the region where the lowest temperature sample point is located, where n × n/2< m < n.
Referring to fig. 3, a flowchart of a method for allocating preset important data in fig. 1 when it is monitored that temperatures of various portions of a chip are uniformly distributed and a preset cooling model is a weak cooling model according to an embodiment of the present invention is shown.
In this embodiment, if the preset cooling model is a weak cooling model, it indicates that the temperature is rapidly raised and the temperature is slowly lowered, and at this time, two layers of quadtree are used to divide the layer and the partition die.
In step S301, the temperature of each layer on the three-dimensional flash memory chip is compared by measuring the temperature using a temperature sensor or a thermal camera.
In step S302, the layer low _ temp _ layer with the lowest temperature is obtained, and the layer low _ temp _ layer with the lowest temperature is divided into n × n partitions die, where n is 2 since it is a quadtree.
In step S303, the temperatures of the respective partitions die are compared and the partition low _ temp _ die having the lowest temperature is located.
In step S304, the partition low _ temp _ die having the lowest temperature is band-divided into m sub-partitions.
In step S305, a sample point is taken in each of the m subregions by an equidistant sampling method to form m sample points. In this embodiment, the reason for using the equidistant sampling method is that the temperature distribution is uniform, and the temperatures of the adjacent physical blocks have proximity, so that a sample point can be taken at a certain distance, and the temperature of the sample point can be used to represent the temperatures of all the physical blocks at the distance.
In step S306, p sample points are randomly taken among the m sample points for temperature comparison, where m/2< p < m.
In step S307, the sample point with the lowest temperature is obtained, and the preset important data is written in the area where the sample point with the lowest temperature is located.
Fig. 4 is a flowchart illustrating a method for allocating important data according to an embodiment of the present invention when non-uniform distribution of temperatures of each portion of the chip is monitored and a preset temperature reduction model is a strong temperature reduction model in fig. 1.
In this embodiment, the non-uniform distribution of temperature indicates that the temperature difference of each part of the chip is large, and the preset cooling model is a strong cooling model, which indicates that the temperature is slowly increased and the temperature is rapidly decreased.
In step S401, it is determined whether the write operation is frequent;
if not, in step S402, comparing the temperatures of the layers on the three-dimensional flash memory chip;
in step S403, a layer low _ temp _ layer with the lowest temperature is obtained, and the layer low _ temp _ layer with the lowest temperature is divided into n × n partition die;
in step S404, the temperatures of the respective partitions die are compared and located to the partition low _ temp _ die with the lowest temperature;
in step S405, the partition low _ temp _ die with the lowest temperature is divided into m × m grids;
in step S406, randomly selecting p sample points in the grid of m × m for comparing temperatures, wherein m × m/2< p < m × m;
in step S407, the sample point with the lowest temperature is acquired, and preset important data is written in the area where the sample point with the lowest temperature is located.
When the write operation is frequent, the queues in the data structure are also adopted, the writing is performed on different layer layers every time, the accumulation of heat is avoided, the abrasion balance is improved, meanwhile, enough time is reserved for cooling the written block area, and specifically, in step S408, whether the size (q) of the data queue adopting the queue data structure is equal to the layer number layer _ num of the chip in the three-dimensional flash memory is judged;
if yes, in step S409, taking the layer at the head of the queue as the lowest temperature layer low _ temp _ layer because it has been sufficiently cooled, and then executing steps S403-S407, namely dividing the lowest temperature layer low _ temp _ layer into n × n partition dies, comparing the temperatures of the partition dies, locating the lowest temperature partition die low _ temp _ die, dividing the lowest temperature partition die into m grids, randomly selecting p sample points in the m × m grids for comparing the temperatures, obtaining the lowest temperature sample point, and writing preset important data in the region where the lowest temperature sample point is located, wherein m × m/2< p < m;
if not, in step S410, the temperatures of the layers on the chip except the queue Q are compared to obtain the lowest layer low _ temp _ layer.
In step S411, the layer low _ temp _ layer with the lowest temperature is inserted into the tail of the queue, and then steps S403 to S407 are executed, that is, the layer low _ temp _ layer with the lowest temperature is divided into n × n partitioned die, the temperatures of the partitioned die are compared, and the partitioned die is positioned to the partitioned die low _ temp _ die with the lowest temperature, the partitioned die low _ temp _ die with the lowest temperature is divided into m × m grids, p sample points are randomly selected from the m × m grids for comparing the temperatures, the sample point with the lowest temperature is obtained, and preset important data is written into the area where the sample point with the lowest temperature is located, wherein m × m/2< p < m.
Fig. 5 is a flowchart illustrating a method for allocating important data according to an embodiment of the present invention when non-uniform distribution of temperatures of each portion of the chip is monitored and a preset temperature reduction model is a weak temperature reduction model in fig. 1.
In the embodiment, the non-uniform distribution of the temperature indicates that the temperature difference of each part of the chip is large, if the preset cooling model is a weak cooling model, the temperature rise is fast, the cooling is slow, and at this time, two layers of quadtrees are used for dividing the layer and the partition die.
In step S501, a temperature sensor or a thermal camera is used to measure temperature, and the temperatures of layers on the three-dimensional flash memory chip are compared;
in step S502, a layer low _ temp _ layer with the lowest temperature is obtained, and the layer low _ temp _ layer with the lowest temperature is divided into n × n partition die;
in step S503, the temperatures of the respective partitions die are compared and positioned to the partition low _ temp _ die with the lowest temperature;
in step S504, the partition low _ temp _ die with the lowest temperature is divided into n × n sub-partition planes;
in step S505, the temperatures of the sub-area planes are compared and the sub-area low _ temp _ plane with the lowest temperature is located;
in step S506, m sample points are sampled in the sub-area low _ temp _ plane with the lowest temperature by using a random sampling method;
in step S507, the temperatures of all m sample points are compared;
in step S508, the sample point with the lowest temperature is obtained, and preset important data is written in the area where the sample point with the lowest temperature is located. In this embodiment, after writing preset important data, the block area is marked as last _ access, which indicates that the block area has been recently accessed, and the block is directly ignored when selecting the next block, and when selecting the next block, the last _ access is used to mark the next selected block area, and the mark of the originally selected block area is cancelled.
According to the important data distribution method based on the temperature, the temperature of the 3D flash memory chip is dynamically monitored by using the temperature sensor or the thermal camera, and the preset important data are distributed to the block area with low temperature, so that the integrity and the stability of the preset important data are guaranteed. The technical scheme provided by the invention constructs 4 different block allocation strategies according to whether the temperature distribution is uniform or not and whether the cooling model is strong or not, ensures that physical blocks used for storage under different scenes have higher stability, prevents preset important data from generating errors, simultaneously uses the quadtree and the queue data structure to assist in realizing the searching and positioning of the blocks, can position a block area with low temperature, avoids the situation of repeatedly executing write operation in the same area, reduces the heat accumulation, improves the wear balance and also prolongs the service life of a chip.
Referring to fig. 6, a schematic diagram of a temperature-based critical data distribution system 10 according to an embodiment of the present invention is shown.
In the present embodiment, the important data distribution system 10 based on temperature is applied to a three-dimensional flash memory, and mainly includes a temperature measurement module 11 and a distribution module 12. The allocation module 12 specifically includes a first allocation submodule 121, a second allocation submodule 122, a third allocation submodule 123, and a fourth allocation submodule 124.
The temperature measuring module 11 is configured to monitor the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data;
and the distribution module 12 is configured to select a preset distribution mode to perform a preset important data writing operation according to the monitored uniformity of the temperature distribution of each part of the chip and a preset cooling model of the operating system.
In the embodiment, the temperature of each part of the chip is dynamically monitored by using a temperature sensor or a thermal camera, the uniformity of the temperature distribution of each part of the chip comprises uniform temperature distribution and non-uniform temperature distribution, and the cooling model comprises a strong cooling model and a weak cooling model.
In this embodiment, when the temperature of each part of the chip is uniformly distributed and the preset cooling model is a strong cooling model, the first sub-module 121 is configured to:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory core chip to obtain the layer with the lowest temperature;
half-dividing the layer with the lowest temperature to obtain two subareas;
comparing the temperatures of the two subareas, and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n grids;
randomly selecting m sample points in the n-x-n grid, and comparing the temperatures of the m sample points;
and acquiring the sample point with the lowest temperature, and writing preset important data in the area where the sample point with the lowest temperature is located.
In this embodiment, the first allocating sub-module 121 is further configured to:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the sample points is equal to the temperature of the first sample point, taking the layer at the head of the queue in the queue as the layer with the lowest temperature, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature to the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing preset important data into the area where the sample point with the lowest temperature is located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing preset important data into the area where the sample point with the lowest temperature is located.
In this embodiment, when it is monitored that the temperatures of the parts of the chip are uniformly distributed and the preset cooling model is a weak cooling model, the second distribution submodule 122 is configured to:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into m sub-zones in a band shape;
taking a sample point in each sub-area of the m sub-areas by utilizing an equidistant sampling method to form m sample points;
randomly taking p sample points from the m sample points to compare the temperatures;
and acquiring the sample point with the lowest temperature, and writing preset important data in the area where the sample point with the lowest temperature is located.
In this embodiment, when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a strong cooling model, the third sub-module 123 is configured to:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the partition with the lowest temperature into m × m grids;
randomly selecting p sample points in the grid of m by m to compare the temperature;
and acquiring the sample point with the lowest temperature, and writing preset important data in the area where the sample point with the lowest temperature is located.
In this embodiment, the third distributing sub-module 123 is further configured to:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the layer is equal to the lowest temperature, taking the layer at the head of the queue in the queue as the lowest temperature layer, dividing the lowest temperature layer into n × n partitions, comparing the temperature of each partition, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points in the m × m grids for comparing the temperature, obtaining the sample points with the lowest temperature, and writing preset important data into the area where the sample points with the lowest temperature are located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, dividing the layer with the lowest temperature into n × n partitions, comparing the temperatures of the partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points from the m × m grids to compare the temperatures, obtaining the sample point with the lowest temperature, and writing preset important data into the area where the sample point with the lowest temperature is located.
In this embodiment, when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a weak cooling model, the fourth sub-module 124 is configured to:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n sub-zones;
comparing the temperature of each subarea and positioning the subarea with the lowest temperature;
taking m sample points in a sub-area with the lowest temperature by using a random sampling method;
comparing the temperatures of all m sample points;
and acquiring the sample point with the lowest temperature, and writing preset important data in the area where the sample point with the lowest temperature is located.
According to the important data distribution system 10 based on the temperature, the temperature of the 3D flash memory chip is dynamically monitored by using the temperature sensor or the thermal camera, and preset important data are distributed to the block area with low temperature, so that the integrity and stability of the preset important data are guaranteed. The technical scheme provided by the invention constructs 4 different block allocation strategies according to whether the temperature distribution is uniform or not and whether the cooling model is strong or not, ensures that physical blocks used for storage under different scenes have higher stability, prevents preset important data from generating errors, simultaneously uses the quadtree and the queue data structure to assist in realizing the searching and positioning of the blocks, can position a block area with low temperature, avoids the situation of repeatedly executing write operation in the same area, reduces the heat accumulation, improves the wear balance and also prolongs the service life of a chip.
It should be noted that, in the above embodiments, the included units are only divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be realized; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
In addition, it can be understood by those skilled in the art that all or part of the steps in the method for implementing the embodiments described above can be implemented by instructing the relevant hardware through a program, and the corresponding program can be stored in a computer-readable storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, or the like.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (8)

1. A temperature-based important data distribution method is applied to a three-dimensional flash memory and is characterized by comprising the following steps:
monitoring the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data;
dynamically monitoring the temperature of each part of the chip by using a temperature sensor or a thermal camera, wherein the uniformity of the temperature distribution of each part of the chip comprises uniform temperature distribution and non-uniform temperature distribution, and the cooling model comprises a strong cooling model and a weak cooling model;
when the temperature of each part of the chip is uniformly distributed and the preset cooling model is a strong cooling model, the step of selecting a preset distribution mode to perform the preset important data writing operation specifically comprises the following steps:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory core chip to obtain the layer with the lowest temperature;
half-dividing the layer with the lowest temperature to obtain two subareas;
comparing the temperatures of the two subareas, and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n grids;
randomly selecting m sample points in the n-x-n grid, and comparing the temperatures of the m sample points;
acquiring a sample point with the lowest temperature, and writing the preset important data in an area where the sample point with the lowest temperature is located;
the step of selecting a preset allocation mode to perform the preset important data writing operation specifically further includes:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the sample points is equal to the preset critical data, taking out a layer at the head of the queue in the queue as a layer with the lowest temperature, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature to the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing the preset critical data into the area where the sample point with the lowest temperature is located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing the preset important data into the area where the sample point with the lowest temperature is located.
2. The important data distribution method based on temperature according to claim 1, wherein when the temperature of each part of the chip is uniformly distributed and the preset cooling model is a weak cooling model, the step of selecting the preset distribution mode to perform the preset important data writing operation specifically comprises:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into m sub-zones in a band shape;
taking a sample point in each sub-area of the m sub-areas by utilizing an equidistant sampling method to form m sample points;
randomly taking p sample points from the m sample points to compare the temperatures;
and acquiring a sample point with the lowest temperature, and writing the preset important data in the area where the sample point with the lowest temperature is located.
3. The important data distribution method based on temperature according to claim 1, wherein when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a strong cooling model, the step of selecting the preset distribution mode to perform the preset important data writing operation specifically comprises:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the partition with the lowest temperature into m × m grids;
randomly selecting p sample points in the grid of m by m to compare the temperature;
acquiring a sample point with the lowest temperature, and writing the preset important data in an area where the sample point with the lowest temperature is located;
the step of selecting a preset allocation mode to perform the preset important data writing operation specifically includes:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the layer is equal to the preset critical data, taking the layer at the head of the queue in the queue as the layer with the lowest temperature, dividing the layer with the lowest temperature into n × n partitions, comparing the temperature of each partition, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points in the m × m grids for comparing the temperature, obtaining the sample point with the lowest temperature, and writing the preset critical data into the area where the sample point with the lowest temperature is located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, dividing the layer with the lowest temperature into n × n partitions, comparing the temperatures of the partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points from the m × m grids to compare the temperatures, obtaining the sample point with the lowest temperature, and writing the preset important data into the area where the sample point with the lowest temperature is located.
4. The important data distribution method based on temperature according to claim 1, wherein when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a weak cooling model, the step of selecting the preset distribution mode to perform the preset important data writing operation specifically comprises:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n sub-zones;
comparing the temperature of each subarea and positioning the subarea with the lowest temperature;
taking m sample points in a sub-area with the lowest temperature by using a random sampling method;
comparing the temperatures of all m sample points;
and acquiring a sample point with the lowest temperature, and writing the preset important data in the area where the sample point with the lowest temperature is located.
5. A system for distributing critical data based on temperature, applied to a three-dimensional flash memory, the system comprising:
the temperature measuring module is used for monitoring the temperature of each part of a chip in the three-dimensional flash memory when an operating system of the three-dimensional flash memory sends a request for writing preset important data;
the distribution module is used for dynamically monitoring the temperature of each part of the chip by using a temperature sensor or a thermal camera, the uniformity of the temperature distribution of each part of the chip comprises uniform temperature distribution and non-uniform temperature distribution, and the cooling model comprises a strong cooling model and a weak cooling model;
when monitoring that the temperature of each part of the chip is uniformly distributed and the preset cooling model is a strong cooling model, the distribution module specifically comprises a first distribution submodule, and the first distribution submodule is used for:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory core chip to obtain the layer with the lowest temperature;
half-dividing the layer with the lowest temperature to obtain two subareas;
comparing the temperatures of the two subareas, and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n grids;
randomly selecting m sample points in the n-x-n grid, and comparing the temperatures of the m sample points;
acquiring a sample point with the lowest temperature, and writing the preset important data in an area where the sample point with the lowest temperature is located;
the first assignment sub-module is further to:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the sample points is equal to the preset critical data, taking out a layer at the head of the queue in the queue as a layer with the lowest temperature, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature to the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing the preset critical data into the area where the sample point with the lowest temperature is located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, carrying out half-division on the layer with the lowest temperature to obtain two partitions, comparing the temperatures of the two partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into n x n grids, randomly selecting m sample points in the n x n grids, comparing the temperatures of the m sample points, obtaining the sample point with the lowest temperature, and writing the preset important data into the area where the sample point with the lowest temperature is located.
6. The system according to claim 5, wherein when the temperature of each part of the chip is uniformly distributed and the preset cooling model is a weak cooling model, the distribution module specifically includes a second distribution submodule configured to:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into m sub-zones in a band shape;
taking a sample point in each sub-area of the m sub-areas by utilizing an equidistant sampling method to form m sample points;
randomly taking p sample points from the m sample points to compare the temperatures;
and acquiring a sample point with the lowest temperature, and writing the preset important data in the area where the sample point with the lowest temperature is located.
7. The important data distribution system based on temperature according to claim 5, wherein when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a strong cooling model, the distribution module specifically includes a third sub-module, and the third sub-module is configured to:
judging whether the writing operation is frequent or not;
if not, comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the partition with the lowest temperature into m × m grids;
randomly selecting p sample points in the grid of m by m to compare the temperature;
acquiring a sample point with the lowest temperature, and writing the preset important data in an area where the sample point with the lowest temperature is located;
the third distribution sub-module is further to:
when the write-in operation is frequent, judging whether the size of a data queue adopting a queue data structure is equal to the number of layers of chips in the three-dimensional flash memory;
if the temperature of the layer is equal to the preset critical data, taking the layer at the head of the queue in the queue as the layer with the lowest temperature, dividing the layer with the lowest temperature into n × n partitions, comparing the temperature of each partition, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points in the m × m grids for comparing the temperature, obtaining the sample point with the lowest temperature, and writing the preset critical data into the area where the sample point with the lowest temperature is located;
if not, comparing the temperatures of the layers on the chip except the queue to obtain a layer with the lowest temperature, inserting the layer with the lowest temperature into the tail of the queue, dividing the layer with the lowest temperature into n × n partitions, comparing the temperatures of the partitions, positioning the partition with the lowest temperature, dividing the partition with the lowest temperature into m × m grids, randomly selecting p sample points from the m × m grids to compare the temperatures, obtaining the sample point with the lowest temperature, and writing the preset important data into the area where the sample point with the lowest temperature is located.
8. The important data distribution system based on temperature according to claim 5, wherein when the non-uniform distribution of the temperature of each part of the chip is monitored and the preset cooling model is a weak cooling model, the distribution module specifically includes a fourth submodule, and the fourth submodule is configured to:
measuring the temperature by using a temperature sensor or a thermal camera, and comparing the temperature of each layer on the three-dimensional flash memory chip;
obtaining a layer with the lowest temperature, and dividing the layer with the lowest temperature into n × n subareas;
comparing the temperatures of all the subareas and positioning the subarea with the lowest temperature;
dividing the zone with the lowest temperature into n x n sub-zones;
comparing the temperature of each subarea and positioning the subarea with the lowest temperature;
taking m sample points in a sub-area with the lowest temperature by using a random sampling method;
comparing the temperatures of all m sample points;
and acquiring a sample point with the lowest temperature, and writing the preset important data in the area where the sample point with the lowest temperature is located.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090171513A1 (en) * 2007-12-27 2009-07-02 Kabushiki Kaisha Toshiba Information Processing Apparatus and Semiconductor Storage Drive
CN102298966A (en) * 2010-05-31 2011-12-28 三星电子株式会社 Nonvolatile memory device, system and programming method with dynamic verification mode selection
CN103176799A (en) * 2013-02-28 2013-06-26 山东大学 Temperature-sensitive mixed storage framework and data distribution strategy thereof
CN103890850A (en) * 2011-09-30 2014-06-25 英特尔公司 Dynamic operations for 3D stacked memory using thermal data
CN105426316A (en) * 2015-11-09 2016-03-23 北京大学 Quota control temperature based racetrack memory chip and control method therefor
CN105677578A (en) * 2016-01-08 2016-06-15 深圳大学 Control method and system for 3D flash memory
US20160239235A1 (en) * 2015-02-17 2016-08-18 Woonjae Chung Storage devices, memory systems and operating methods thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090171513A1 (en) * 2007-12-27 2009-07-02 Kabushiki Kaisha Toshiba Information Processing Apparatus and Semiconductor Storage Drive
CN102298966A (en) * 2010-05-31 2011-12-28 三星电子株式会社 Nonvolatile memory device, system and programming method with dynamic verification mode selection
CN103890850A (en) * 2011-09-30 2014-06-25 英特尔公司 Dynamic operations for 3D stacked memory using thermal data
CN103176799A (en) * 2013-02-28 2013-06-26 山东大学 Temperature-sensitive mixed storage framework and data distribution strategy thereof
US20160239235A1 (en) * 2015-02-17 2016-08-18 Woonjae Chung Storage devices, memory systems and operating methods thereof
CN105426316A (en) * 2015-11-09 2016-03-23 北京大学 Quota control temperature based racetrack memory chip and control method therefor
CN105677578A (en) * 2016-01-08 2016-06-15 深圳大学 Control method and system for 3D flash memory

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