CN105390382A - Manufacturing method of low-temperature ohmic contact of III group nitride electronic device - Google Patents
Manufacturing method of low-temperature ohmic contact of III group nitride electronic device Download PDFInfo
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- CN105390382A CN105390382A CN201510690191.3A CN201510690191A CN105390382A CN 105390382 A CN105390382 A CN 105390382A CN 201510690191 A CN201510690191 A CN 201510690191A CN 105390382 A CN105390382 A CN 105390382A
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- Prior art keywords
- group iii
- nitride
- electronic device
- ohmic contact
- ohmic
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 150000004767 nitrides Chemical class 0.000 title abstract description 10
- 238000000137 annealing Methods 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 37
- 239000012535 impurity Substances 0.000 claims abstract description 36
- 230000004913 activation Effects 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 32
- 239000000463 material Substances 0.000 claims description 9
- 238000002347 injection Methods 0.000 claims description 7
- 239000007924 injection Substances 0.000 claims description 7
- 239000010409 thin film Substances 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- 238000010406 interfacial reaction Methods 0.000 claims description 4
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000000151 deposition Methods 0.000 abstract 1
- 238000005036 potential barrier Methods 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 17
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
- H01L21/3245—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering of AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
- H01L29/454—Ohmic electrodes on AIII-BV compounds on thin film AIII-BV compounds
Abstract
The invention discloses a manufacturing method of low-temperature ohmic contact of a III group nitride electronic device. The manufacturing method comprises the steps of: injecting N type impurities in a III group nitride ohmic contact region; depositing ohmic metal on the III group nitride ohmic contact region injected with the N type impurities; and adopting a microwave annealing technology to achieve ohmic contact at low temperature. After the N type impurities are injected to the III group nitride ohmic contact region, the manufacturing method further comprises the step of adopting the microwave annealing technology to activate the injected N type impurities. The microwave annealing technology utilizes the microwave annealing technology to achieve the low-temperature activation of the injected N type impurities in III group nitrides, so as to form an N type heavily-doped layer, increase electronic tunnelling probability, and reduce ohmic contact resistance; furthermore, the manufacturing method can enhance the interface reaction between the ohmic metal and the III group nitride semiconductor, reduce contact-potential barrier, improve ohmic contact area, and further reduce the contact resistance.
Description
Technical field
The present invention relates to semiconductor device low Temperature Ohmic Contacts manufacture technology field, especially a kind of group III-nitride electronic device temperature is lower than the manufacture method of the low Temperature Ohmic Contacts of 800 DEG C.
Background technology
Group III-nitride wide bandgap semiconductor is one of hot-candidate of current radio frequency Microwave Power Amplifier and power electronics applications.The ohmic contact of current group III-nitride electronic device mainly utilizes quick thermal annealing method at high temperature to realize, and annealing temperature, generally higher than 800 DEG C, belongs to high annealing technology.Generally can cause group III-nitride surface degradation higher than the high annealings of 800 DEG C, thus produce more surface state, directly affect dynamic characteristic and the power output capacity of device.Therefore, the low Temperature Ohmic Contacts technique of research and development group III-nitride electronic device, namely lower than the low Temperature Ohmic Contacts technique of 800 DEG C, is the key technology improving group III-nitride power electronic device Performance And Reliability.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is the manufacture method providing a kind of group III-nitride electronic device low Temperature Ohmic Contacts, to reduce ohmic contact resistance, solve the group III-nitride surface degradation that high annealing causes, produce more surface state, and then affect the dynamic characteristic of device and the problem of power output capacity.
(2) technical scheme
For achieving the above object, the invention provides a kind of manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts, the method comprises: inject N-type impurity in group III-nitride ohmic contact regions; Deposit ohmic metal on the group III-nitride ohmic contact regions injecting N-type impurity; Microwave annealing technology is adopted to realize ohmic contact at low temperatures.
In such scheme, describedly injecting N-type impurity in group III-nitride ohmic contact regions, is Si element, Ge element, Se element or Si, Ge or Se element and N element mix injection altogether.
In such scheme, in the step of described deposit ohmic metal, described ohmic metal is containing golden multiple layer metal, or without golden multiple layer metal.Described is Ti/Al/Ni/Au structure containing golden multiple layer metal, Ti/Al/Mo/Au structure, any one structure in Ti/Al/Pt/Au structure and Ti/Al/Ti/Au structure; Described is Ti/Al structure without golden multiple layer metal, Ti/Al/W structure, Ti/Al/TiN structure, Ti/Al/Ti/TiN structure, Ti/Al/Ni/Ta/Cu/Ta structure, Ti/Al/Ni/Pt structure, any one structure in Ta/Al/Ta structure and Ta/Ti/Al/Ti/TiN structure.
In such scheme, described employing microwave annealing technology realizes ohmic contact at low temperatures, is the low-temp activation utilizing microwave annealing technology to realize group III-nitride N-type impurity under lower than the cryogenic conditions of 800 DEG C, forms N
++doping.
In such scheme, after N-type impurity is injected in group III-nitride ohmic contact regions, the method also comprises: adopt microwave annealing technology to activate the N-type impurity injected.Described employing microwave annealing technology activates the N-type impurity injected, and is the low-temp activation utilizing microwave annealing technology to realize N-type impurity under lower than the cryogenic conditions of 800 DEG C, forms N
++doping.
In such scheme, microwave annealing technology is utilized to realize low Temperature Ohmic Contacts in group III-nitride, be utilize microwave annealing technology to strengthen interfacial reaction between ohmic metal and group III-nitride under lower than the cryogenic conditions of 800 DEG C, reduce contact berrier, increase ohmic contact area.
In such scheme, described group III-nitride electronic device is AlN, GaN, InN thin-film material, or Al
xin
yga
l-x-yn synthesizes component thin-film material, or Al (In, Ga) N/GaN heterogeneous structure material.
(3) beneficial effect
The manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts provided by the invention, realizes the making of the low Temperature Ohmic Contacts of III nitride semiconductor in conjunction with the injection of ohmic contact regions particle and microwave annealing (microwaveannealing) technology.The activation utilizing microwave annealing to realize N-type injection particle in group III-nitride is characteristic of the present invention.Utilize microwave annealing method, can realize on the one hand injecting the low-temp activation of N-type impurity in group III-nitride, to form N-type heavily doped layer, improve electron tunneling probability, reduce ohmic contact resistance; The interfacial reaction of ohmic metal and III nitride semiconductor can be strengthened on the other hand, reduce contact berrier, increase ohmic contact area, reduce contact resistance further.
Accompanying drawing explanation
Fig. 1 is the fabrication processing figure of the group III-nitride electronic device low Temperature Ohmic Contacts according to first embodiment of the invention;
Fig. 2 is the manufacture method flow chart of the group III-nitride electronic device low Temperature Ohmic Contacts according to first embodiment of the invention;
Fig. 3 is the fabrication processing figure of the group III-nitride electronic device low Temperature Ohmic Contacts according to second embodiment of the invention;
Fig. 4 is the manufacture method flow chart of the group III-nitride electronic device low Temperature Ohmic Contacts according to second embodiment of the invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
The manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts provided by the invention is by first injecting N-type impurity, then deposit ohmic metal in group III-nitride ohmic contact regions, realizing ohmic contact at low temperatures finally by microwave annealing technology; Or and then ohmic contact regions is activated with microwave annealing after injecting N-type impurity, and then deposit ohmic metal, finally carries out second time microwave annealing again and realize ohmic contact.
Wherein, group III-nitride electronic device can be AlN, GaN, InN thin-film material, also can be Al
xin
yga
l-x-yn synthesizes component thin-film material, or Al (In, Ga) N/GaN heterogeneous structure material.Comprise the elements such as Si, Ge, Se carrying out the N-type impurity that the doping of group III-nitride N-type uses, or Si, Ge or Se element and N element mix injection altogether.The ohmic metal used both can be containing golden multiple layer metal, such as Ti/Al/Ni/Au structure, Ti/Al/Mo/Au structure, any one structure in Ti/Al/Pt/Au structure and Ti/Al/Ti/Au structure, also can be without gold (Au-free) multiple layer metal, such as Ti/Al structure, Ti/Al/W structure, Ti/Al/TiN structure, Ti/Al/Ti/TiN structure, Ti/Al/Ni/Ta/Cu/Ta structure, Ti/Al/Ni/Pt structure, any one structure in Ta/Al/Ta structure and Ta/Ti/Al/Ti/TiN structure, contributes to realizing the compatibility with Si-CMOS technique.
Utilize microwave annealing method, can realize on the one hand injecting the low-temp activation of N-type impurity in group III-nitride, to form N-type heavily doped layer, i.e. N
++doped layer, improves electron tunneling probability, reduces ohmic contact resistance; On the other hand microwave annealing contributes to realizing lower than the process annealing under 800 degree of conditions, effective suppression high annealing (more than 800 degree) causes the surface state of group III-nitride to increase, strengthen the interfacial reaction of ohmic metal and III nitride semiconductor, reduce contact berrier, increase ohmic contact area, reduce contact resistance further.
Embodiment one
As depicted in figs. 1 and 2, Fig. 1 is the fabrication processing figure of the group III-nitride electronic device low Temperature Ohmic Contacts according to first embodiment of the invention, Fig. 2 is the manufacture method flow chart of the group III-nitride electronic device low Temperature Ohmic Contacts according to first embodiment of the invention, and the method comprises the following steps:
Step 1: inject N-type impurity in group III-nitride ohmic contact regions; In this step, N-type impurity can be Si element, Ge element, Se element or above element and N element mix injection altogether.
Step 2: deposit ohmic metal on the group III-nitride ohmic contact regions injecting N-type impurity; In this step, ohmic metal can be containing golden multiple layer metal, or without golden multiple layer metal, wherein, is Ti/Al/Ni/Au structure containing golden multiple layer metal, Ti/Al/Mo/Au structure, any structure in Ti/Al/Pt/Au structure and Ti/Al/Ti/Au structure.Described is Ti/Al structure without golden multiple layer metal, Ti/Al/W structure, Ti/Al/TiN structure, Ti/Al/Ti/TiN structure, Ti/Al/Ni/Ta/Cu/Ta structure, Ti/Al/Ni/Pt structure, any structure in Ta/Al/Ta structure and Ta/Ti/Al/Ti/TiN structure.
Step 3: adopt microwave annealing technology to realize ohmic contact at low temperatures; In this step, be the low-temp activation utilizing microwave annealing technology to realize group III-nitride N-type impurity under lower than the cryogenic conditions of 800 DEG C, form N
++doping.
Embodiment two
As shown in Figure 3 and Figure 4, Fig. 3 is the fabrication processing figure of the group III-nitride electronic device low Temperature Ohmic Contacts according to second embodiment of the invention, Fig. 4 is the manufacture method flow chart of the group III-nitride electronic device low Temperature Ohmic Contacts according to second embodiment of the invention, and the method comprises the following steps:
Step a: inject N-type impurity in group III-nitride ohmic contact regions; In this step, N-type impurity can be Si element, Ge element, Se element or above element and N element mix injection altogether.
Step b: adopt microwave annealing technology to activate the N-type impurity injected; In this step, be the low-temp activation utilizing microwave annealing technology N-type impurity under lower than the cryogenic conditions of 800 DEG C, form N
++doping.
Step c: deposit ohmic metal on the group III-nitride ohmic contact regions injecting N-type impurity; In this step, ohmic metal can be containing golden multiple layer metal, or without golden multiple layer metal, wherein, is Ti/Al/Ni/Au structure containing golden multiple layer metal, Ti/Al/Mo/Au structure, any structure in Ti/Al/Pt/Au structure and Ti/Al/Ti/Au structure.Described is Ti/Al structure without golden multiple layer metal, Ti/Al/W structure, Ti/Al/TiN structure, Ti/Al/Ti/TiN structure, Ti/Al/Ni/Ta/Cu/Ta structure, Ti/Al/Ni/Pt structure, any structure in Ta/Al/Ta structure and Ta/Ti/Al/Ti/TiN structure.
Steps d: adopt microwave annealing technology to realize ohmic contact at low temperatures; In this step, be the low-temp activation utilizing microwave annealing technology to realize group III-nitride N-type impurity under lower than the cryogenic conditions of 800 DEG C, form N
++doping.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. a manufacture method for group III-nitride electronic device low Temperature Ohmic Contacts, is characterized in that, the method comprises:
N-type impurity is injected in group III-nitride ohmic contact regions;
Deposit ohmic metal on the group III-nitride ohmic contact regions injecting N-type impurity;
Microwave annealing technology is adopted to realize ohmic contact at low temperatures.
2. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, it is characterized in that, describedly injecting N-type impurity in group III-nitride ohmic contact regions, is Si element, Ge element, Se element, or Si, Ge or Se element and N element mix injection altogether.
3. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, is characterized in that, in the step of described deposit ohmic metal, described ohmic metal is containing golden multiple layer metal, or without golden multiple layer metal.
4. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 3, it is characterized in that, described is Ti/Al/Ni/Au structure containing golden multiple layer metal, Ti/Al/Mo/Au structure, any one structure in Ti/Al/Pt/Au structure and Ti/Al/Ti/Au structure; Described is Ti/Al structure without golden multiple layer metal, Ti/Al/W structure, Ti/Al/TiN structure, Ti/Al/Ti/TiN structure, Ti/Al/Ni/Ta/Cu/Ta structure, Ti/Al/Ni/Pt structure, any one structure in Ta/Al/Ta structure and Ta/Ti/Al/Ti/TiN structure.
5. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, it is characterized in that, described employing microwave annealing technology realizes ohmic contact at low temperatures, be the low-temp activation utilizing microwave annealing technology to realize group III-nitride N-type impurity under lower than the cryogenic conditions of 800 DEG C, form N
++doping.
6. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, it is characterized in that, after N-type impurity is injected in group III-nitride ohmic contact regions, the method also comprises: adopt microwave annealing technology to activate the N-type impurity injected.
7. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 6, it is characterized in that, described employing microwave annealing technology activates the N-type impurity injected, be the low-temp activation utilizing microwave annealing technology to realize N-type impurity under lower than the cryogenic conditions of 800 DEG C, form N
++doping.
8. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, it is characterized in that, described employing microwave annealing technology realizes ohmic contact at low temperatures, utilize microwave annealing technology to strengthen interfacial reaction between ohmic metal and group III-nitride under lower than the cryogenic conditions of 800 DEG C, reduce contact berrier, increase ohmic contact area.
9. the manufacture method of group III-nitride electronic device low Temperature Ohmic Contacts according to claim 1, is characterized in that, described group III-nitride electronic device is AlN, GaN, InN thin-film material, or Al
xin
yga
1-x-yn synthesizes component thin-film material, or Al (In, Ga) N/GaN heterogeneous structure material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510690191.3A CN105390382A (en) | 2015-10-22 | 2015-10-22 | Manufacturing method of low-temperature ohmic contact of III group nitride electronic device |
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|---|---|---|---|
| CN201510690191.3A CN105390382A (en) | 2015-10-22 | 2015-10-22 | Manufacturing method of low-temperature ohmic contact of III group nitride electronic device |
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| CN105390382A true CN105390382A (en) | 2016-03-09 |
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| CN201510690191.3A Pending CN105390382A (en) | 2015-10-22 | 2015-10-22 | Manufacturing method of low-temperature ohmic contact of III group nitride electronic device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105810575A (en) * | 2016-04-18 | 2016-07-27 | 中国电子科技集团公司第五十五研究所 | Fabrication method for low-temperature ohmic contact on GaN high electron mobility transistor (HEMT) |
| CN107230705A (en) * | 2016-03-25 | 2017-10-03 | 北京大学 | Power semiconductor and preparation method thereof |
| CN107230610A (en) * | 2016-03-25 | 2017-10-03 | 北京大学 | The preparation method of GaN high electron mobility transistor |
| CN109742021A (en) * | 2018-12-26 | 2019-05-10 | 芜湖启迪半导体有限公司 | A kind of gallium nitride base ohmic contact structure and preparation method thereof |
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| US4303455A (en) * | 1980-03-14 | 1981-12-01 | Rockwell International Corporation | Low temperature microwave annealing of semiconductor devices |
| CN103928324A (en) * | 2014-03-24 | 2014-07-16 | 中国电子科技集团公司第五十五研究所 | AlGaN/GaN HEMT manufacturing method |
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2015
- 2015-10-22 CN CN201510690191.3A patent/CN105390382A/en active Pending
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| US4303455A (en) * | 1980-03-14 | 1981-12-01 | Rockwell International Corporation | Low temperature microwave annealing of semiconductor devices |
| CN103928324A (en) * | 2014-03-24 | 2014-07-16 | 中国电子科技集团公司第五十五研究所 | AlGaN/GaN HEMT manufacturing method |
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| A.GRUNDAS: "《Advances in induction and microwave heating of mineral and organic materials》", 14 February 2011 * |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107230705A (en) * | 2016-03-25 | 2017-10-03 | 北京大学 | Power semiconductor and preparation method thereof |
| CN107230610A (en) * | 2016-03-25 | 2017-10-03 | 北京大学 | The preparation method of GaN high electron mobility transistor |
| CN105810575A (en) * | 2016-04-18 | 2016-07-27 | 中国电子科技集团公司第五十五研究所 | Fabrication method for low-temperature ohmic contact on GaN high electron mobility transistor (HEMT) |
| CN105810575B (en) * | 2016-04-18 | 2018-12-28 | 中国电子科技集团公司第五十五研究所 | The preparation method of low Temperature Ohmic Contacts on a kind of GaN HEMT |
| CN109742021A (en) * | 2018-12-26 | 2019-05-10 | 芜湖启迪半导体有限公司 | A kind of gallium nitride base ohmic contact structure and preparation method thereof |
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