CN105374787B - 模制倒装芯片半导体封装体 - Google Patents
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Abstract
本发明的各个实施例涉及一种模制倒装芯片半导体封装体。模制倒装芯片半导体封装体包括引线框架,该引线框架具有相对的第一主表面和第二主表面、在第一主表面上的第一金属化结构、在第二主表面上的第二金属化结构、从第二主表面向第一主表面延伸的凹陷区域、以及化学蚀刻到在第一金属化结构中的间隙之间的引线框架的间隔开的引线。该封装体进一步包括:半导体裸片,该半导体裸片具有面朝并且附接至引线框架的引线的多个焊盘;第一模制用料,该第一模制用料填充凹陷区域;以及第二模制用料,该第二模制用料将半导体裸片包封并且将在引线之间的空间填充,从而使得第二模制用料与第一模制用料邻接。A是引线框架的总厚度,B是在引线中的相邻引线之间的间距,并且B/A<1。
Description
技术领域
本申请涉及半导体封装体,具体地,涉及模制倒装芯片半导体封装体。
背景技术
用于模制倒装芯片半导体封装体的倒装芯片互连技术涉及在半导体裸片的焊盘上沉积焊料凸块。通过将裸片倒装从而使得裸片的顶侧的面朝下,来将裸片安装至引线框架,并且对准裸片从而使得其焊盘与引线框架的匹配的引线对准。然后,使焊料回流以完成互连,或者可替代地,如果倒装芯片使用扩散键合方法,那么不要求回流。这与接线键合相反,在接线键合中,竖直地安装裸片并且使用接线以将裸片焊盘互连至引线框架。
常规的模制倒装芯片半导体封装体的引线间距(B)与引线框架厚度(A)之比B/A大于1,这意味着,引线间距直接取决于引线框架厚度。薄引线框架不可用于许多类型的半导体器件诸如功率器件,从而,针对模制倒装芯片半导体封装体,限制了某些类型的半导体裸片在尺寸上可以缩小的量。裸片放置公差常常不精确,例如,+/-0.050mm,从而要求大的面积以便将半导体裸片放置在引线框架上。这又进一步限制了实际可以实现的任何裸片尺寸的减小。如此,存在在不减小引线框架厚度的情况下减小引线间距的需要。同样,利用常规的引线技术,无法在不也减小封装体的占位面积(footprint)的情况下减小半导体裸片尺寸,该占位面积又由最终用户PCB(印刷电路板)占位面积的控制。
发明内容
根据制造模制倒装芯片半导体封装体的方法的一个实施例,该方法包括:提供引线框架,该引线框架具有相对的第一主表面和第二主表面、在第一主表面上的第一金属化结构、在第二主表面上的第二金属化结构、以及从第二主表面向第一主表面延伸的凹陷区域;用第一模制用料填充凹陷区域,从而使得引线框架在引线框架的第二侧处受到第一模制用料和第二金属化结构的保护、并且在引线框架的与第二侧相对的第一侧处在第一金属化结构中的间隙之间暴露出来;以及用化学蚀刻剂蚀刻引线框架的在第一金属化结构中的间隙之间的暴露部分以在引线框架的第一侧处形成间隔开的引线,第一模制用料和第二金属化结构保护引线框架在第二侧处免受化学蚀刻剂的作用。
根据模制倒装芯片半导体封装体的实施例,该封装体包括引线框架,该引线框架具有相对的第一主表面和第二主表面、在第一主表面上的第一金属化结构、在第二主表面上的第二金属化结构、从第二主表面向第一主表面延伸的凹陷区域、以及在第一金属化结构中的间隙之间被化学蚀刻到引线框架中的间隔开的引线。模制倒装芯片半导体封装体进一步包括:半导体裸片,该半导体裸片具有面朝并且附接至引线框架的引线的多个焊盘;第一模制用料,该第一模制用料将凹陷区域填充;以及第二模制用料,该第二模制用料将半导体裸片包封并且将在引线之间的空间填充,从而使得第二模制用料与第一模制用料邻接。A是引线框架的总厚度,B是在引线中的相邻引线之间的间距,并且B/A<1。
本领域的技术人员将在阅读以下详细说明时并且在查看对应附图时认识到另外的特征和优点。
附图说明
图中的元件并不一定是相对于彼此按照比例绘制而成。类似的附图标记表示对应的相似零部件。可以将各个图示的实施例的特征进行组合,除非这些特征彼此排斥。各个实施例在图中得到描绘并且在以下说明书中进行了详细说明。
图1图示了其引线间距与引线框架厚度之比小于1的模制倒装芯片半导体封装体的实施例的截面图。
图2包括图2A至图2H,图示了制造其引线间距与引线框架厚度之比小于1的模制倒装芯片半导体封装体的方法的实施例。
图3包括图3A至图3C,图示了在制造其引线间距与引线框架厚度之比小于1的模制倒装芯片半导体封装体时所使用的预模制引线框架的方法的实施例。
具体实施方式
此处描述的各个实施例,为模制倒装芯片半导体封装体提供的引线间距(B)与引线框架厚度(A)之比B/A小于1,而不减小总引线框架厚度或者采用昂贵的电镀工艺。而是,用模制用料来预模制引线框架的背侧,该模制用料将引线框架的从引线框架的底表面向引线框架的顶表面延伸的凹陷区域填充。引线框架在这些凹陷区域中更薄,而在别处更厚。模制用料,连同设置在引线框架的底表面上的金属化结构,保护引线框架的背侧免受后续化学蚀刻工艺的处理。该化学蚀刻工艺蚀刻掉了未被设置在引线框架的顶表面上的裸片附接金属化结构保护的这部分引线框架。将裸片附接金属化结构图案化,从而使得在引线框架的正面处的化学蚀刻工艺蚀刻了引线框架的暴露部分,以形成封装引线。可以实现引线间距(B)与引线框架厚度(A)之比B/A小于1,这是因为在凹陷区域中减小了引线框架厚度,其在背侧处被模制用料保护并且在正面处被化学蚀刻,以形成引线。由此,将更少的引线框架材料去除以形成引线,从而允许减小引线间距。然后,半导体裸片经由在倒装配置中的裸片附接金属化结构而附接至引线框架的引线,并且被模制。若需要,可以对封装体进行标记,并且,例如通过锯切或者其他标准单片化(分离)工艺,将封装体单片化为分开的封装体。此处描述的实施例允许裸片尺寸减小,而不一定需要改变引线框架厚度或者封装体占位面积。
图1图示了其引线间距(B)与引线框架厚度(A)之比B/A小于1的模制倒装芯片半导体封装体的实施例。模制倒装芯片半导体封装体包括引线框架100,该引线框架100具有相对的底(背)表面102和顶(正)表面104、在底表面102上的单层或者多层金属化结构106、在顶表面104上的单层或者多层裸片附接金属化结构108、从底表面102向顶表面104延伸的凹陷区域110、以及在裸片附接金属化结构108中的间隙(开口)114之间的被化学蚀刻到引线框架100中的间隔开的引线112。引线112具有小于引线框架100的总厚度(A)的总厚度(C)。引线112是通过在引线框架100的正面处化学蚀刻在裸片附接金属化结构108中的间隙114之间暴露的这部分引线框架100而形成的,如此处在后文中更加详细描述的。
模制用料116将引线框架100的凹陷区域110填充。模制用料116和在引线框架100的底表面102上的金属化结构106一起保护引线框架100免受在引线框架100的背侧之侧的化学蚀刻工艺的处理。结果,引线框架100的在凹陷区域110中的厚度确定了最小引线间距(B)。因为引线框架100在凹陷区域110中更薄并且在别处更厚,所以模制倒装芯片半导体封装体的引线间距(B)与引线框架厚度(A)之比B/A可以小于1。在一些实施例中,引线框架100的在凹陷区域110中的厚度满足0.2<B/A<1。这样,可以将厚引线框架用于例如功率半导体应用,并且仍然具有小引线间距。此处在后文中更加详细地描述了用于形成模制倒装芯片半导体封装体的引线112的化学蚀刻工艺的进一步细节。
模制倒装芯片半导体封装体进一步包括半导体裸片118,该半导体裸片118具有面朝并且附接至引线框架100的引线112的多个焊盘120。封装体可以包括在倒装芯片配置中连接至引线框架100的一个或者多个半导体裸片。第二模制用料122将每个半导体裸片118包封并且将在引线112之间的空间填充,从而使得第二模制用料122与将引线框架100的凹陷区域110填充的模制用料邻接。在一些实施例中,引线框架100包括铜,并且在引线框架100的底表面102上的金属化结构106包括金。在一个特定实施例中,在引线框架100的底表面102上的金属化结构106包括NiPdAu,并且在引线框架100的顶表面104上的裸片附接金属化结构108包括Ag。
模制倒装芯片半导体封装体的模制用料116、122可以包括相同的或者不同的模制用料材料。例如,填充了引线框架100的凹陷区域110的模制用料116可以具有高的玻璃化温度(Tg),例如,高于180℃,以及高的导热率。在一个实施例中,模制用料116是多官能(multi-functional)模制用料,诸如基于多官能环氧树脂的用料,其耐受与裸片附接工艺相关的高温。如果使用注射模制来形成模制用料116,那么可以使用具有高热稳定性和低收缩率、低CTE(热膨胀系数)和高导热率的高级热塑性复合材料,诸如液晶聚合物(LCP)或者填充有氮化铝的热塑性树脂。为了增强在凹陷区域110中的模制用料116与包围住凹陷区域110的铜(在铜引线框架100的情况下)的粘附力,可以使用标准替代氧化物或棕氧化物技术(standard replacement oxide or brown oxide technology)。
包封了每个半导体裸片118并且填充了在引线112之间的空间的第二模制用料122可以是多芳香(multi-aromatic)模制用料,诸如具有低于180℃的玻璃化温度(Tg)的多芳香化合物、联苯、邻甲酚醛(ortho cresol novolac)、或者聚酰胺模制用料,从而向封装体施加的热应力更低。一般而言,所采用的模制用料材料的一种或多种类型取决于封装体的类型以及封装体的设计所针对的应用。
在每种情况下,引线112可以具有曲面形侧壁124。在化学蚀刻工艺期间,由于钻蚀(undercut)的影响,可以使引线112的侧壁124呈曲面形。结果,引线112在引线112的厚度(C)上可以具有非均匀的宽度(W)。在一个实施例中,引线112的宽度从引线框架100的顶表面104进一步地减小到最小值,并且然后增加。利用引线112的这种曲面形侧壁轮廓,在模制倒装芯片半导体封装体的相邻引线112之间的空间中、在模制用料116、122之间,可以实现互锁连接,如在图1的分解图中所图示的。
图2包括图2A至图2H,图示了制造在图1中示出的模制倒装芯片半导体封装体的方法的实施例。
在图2A中,提供了引线框架200,该引线框架固定至胶带202。引线框架200具有相对的底(背)表面204和顶(正)表面206、在顶表面206上的单层或者多层裸片附接金属化结构208、在底表面204上的单层或者多层金属化结构210、以及从引线框架200的底表面204向顶表面206延伸的凹陷区域212。引线框架200在凹陷区域212中更薄(Arec)并且在别处更厚(A)。将在引线框架200的顶表面206上的裸片附接金属化结构208图案化,以限定待基本由引线框架200形成的封装体的引线占位面积。引线框架200可以购买或者制造,并且是冲压、蚀刻或者图案化的金属框架,以通过倒装芯片键合而连接至半导体裸片的焊盘,并且为封装的电子器件提供外部电连接。可以通过使用任何标准的引线框架工艺,诸如电镀、蚀刻等,在引线框架200的背侧处形成凹陷区域212。
在图2B中,通过用第一模制用料214填充凹陷区域212,来预模制引线框架200。在一个实施例中,第一模制用料214是多官能模制用料,诸如基于多官能环氧树脂的用料。第一模制用料214,连同设置在引线框架200的底表面204上的金属化结构210,保护引线框架200免受用于形成引线的后续化学蚀刻工艺的处理。在引线框架200的顶表面206上的裸片附接金属化结构208相似地在引线框架200的顶侧处除了在裸片附接金属化结构208中的间隙(开口)216处之外保护引线框架200,免受后续化学蚀刻工艺的处理。在裸片附接金属化结构208中的间隙216使底层引线框架200的部分暴露出来,并且限定了待通过后续化学蚀刻工艺形成的引线占位面积。引线框架200的侧栏杆(railing)和中间栏杆(不可见)可以包括镍,从而使得第一模制用料214由镍固定。
在图2C中,从引线框架的背侧去除胶带。
在图2D中,用化学蚀刻剂蚀刻在裸片附接金属化结构208中的间隙216之间暴露的这部分引线框架200,以在引线框架200的顶侧处形成间隔开的引线218。选择化学蚀刻剂、第一模制用料214、以及在引线框架200的底表面204上的金属化结构210,从而使得第一模制用料214和金属化结构210一起用作掩膜,从而保护引线框架200免受在背侧处的化学蚀刻剂的作用。在一个实施例中,引线框架200包括铜,并且在引线框架200的底表面204上的金属化结构210包括金。选择化学蚀刻剂,从而使得其相对于金并且相对于第一模制用料214选择性地蚀刻铜,从而使得第一模制用料214和在引线框架200的底表面204上的金属化结构210保护引线框架200免受在背侧处的化学蚀刻剂的作用。例如,在引线框架200的底表面204上的金属化结构210可以包括NiPdAu,并且化学蚀刻剂可以包括基于氨的蚀刻剂,比如含氨的蚀刻剂。
裸片附接金属化结构208也不被化学蚀刻剂去除,从而保护被裸片附接金属化结构208覆盖的这部分引线框架200。在裸片附接材料208中的间隙216与引线框架200的凹陷区域212对准,并且因此使引线框架200的部分暴露至在正面处的化学蚀刻剂。蚀刻工艺继续,直到在凹陷区域212中从正面将引线框架200完全蚀刻穿透为止,从而形成引线218。因为引线框架200在凹陷区域212中更薄(Arec)并且在别处更厚(A),所以可以实现引线间距(B)与引线框架厚度(A)之比B/A小于1。在一些实施例中,引线框架200的在凹陷区域212中的厚度满足0.2<B/A<1,如此处先前所描述的。
化学蚀刻工艺可以导致对引线侧壁220的钻蚀。在引线218的每侧处的钻蚀宽度可以在引线218的厚度(C)的5%至40%范围内。钻蚀可以通过如下方式实现:过度蚀刻引线框架200,即过长时间地应用化学蚀刻剂,或者使用各向同性化学蚀刻,例如诸如基于氨的蚀刻剂,比如含氨的蚀刻剂(在铜引线框的情况下)。为了实现轻度的钻蚀,可以使用具有保护剂(banking agent)或蚀刻剂化学抑制剂的氨蚀刻剂。在每种情况下,引线218在引线218的厚度(C)之上可以具有曲面形侧壁220和非均匀的宽度(W)。例如,引线218的宽度从引线框架200的顶表面206进一步地减小到最小值,并且然后增加,如图2D所示。
在图2E中,多个半导体裸片222放置在引线框架200上,从而使得半导体裸片222的焊盘224面朝引线框架200的引线218。通过使用任何标准的倒装芯片裸片附接工艺,诸如焊接,将裸片焊盘224经由裸片附接金属化结构208附接至引线框架200的引线218。可以在裸片附接之前,执行采用氩的等离子体氧工艺。
在图2F中,使用第二模制用料226将半导体裸片222包封,该第二模制用料226将在引线218之间的空间228填充,从而使得第二模制用料226与第一模制用料214邻接。在相邻引线218之间的空间228中、在第一和第二模制用料214、226之间,可以形成互锁连接,如此处先前参照图1的分解图所描述的。第一模制用料214可以包括与第二模制用料226相同或者不同的模制用料材料。在一个实施例中,第一模制用料214是多官能模制用料,并且第二模制用料226是多芳香模制用料。可以使用任何标准的模制工艺,诸如,传递模制、注塑模制、压缩模制等,来形成第一和第二模制用料214、226。在不同模制用料材料的情况下,在两个模制用料214、226之间产生了物理界面。
在图2G中,可以用识别信息232,例如经由激光标记,对第二模制用料226的顶表面230进行标记。
在图2H中,该结构与支撑衬底234层合在一起,并且然后,将独立的封装体单片化(分离)为物理上分开的封装体236。可以使用用于模制半导体封装体的任何标准单片化工艺,诸如,锯切、蚀刻、激光切割等。因为引线框架200在凹陷区域212中更薄并且在别处更厚,所以由此产生的模制倒装芯片半导体封装体236中的每一个的引线间距(B)与引线框架厚度(A)之比B/A都可以小于1。
图3包括图3A至图3C,图示了将引线框架的凹陷区域预模制的方法的实施例。图3A示出了在预模制工艺之前的引线框架300的顶部透视图,并且图3B示出了对应的底部透视图。在引线框架300的顶(正)表面304上设置图案化的裸片附接材料302诸如焊料。根据本实施例,引线框架300的顶表面304是实心的(即,无间隙或者开口)并且是平面的。根据本实施例,设置在引线框架300的底(背)表面308上的金属化结构306包括Ni 310、Pd 312和Au314。在引线框架制造工艺期间,将引线框架的背侧图案化,从而使得凹陷区域316从引线框架300的底表面308向顶表面304延伸。引线框架300在凹陷区域316中更薄(Arec)并且在别处更厚(A),如此处先前所描述的。在引线框架300的顶表面304上的裸片附接金属化结构302中的间隙(空间)318,与凹陷区域316对准。图3C示出了在预模制工艺之后的引线框架300,其中用模制用料320填充凹陷区域316。模制用料320,连同设置在线框架300的底表面308上的金属化结构306,保护引线框架300免受用于形成引线的后续化学蚀刻工艺的处理,例如,如此处之前参照图2D所描述的。在引线框架300的顶表面304上的图案化的裸片附接金属化结构302不被蚀刻工艺去除,从而保护被裸片附接金属化结构302覆盖的这部分引线框架300。因为引线框架300在凹陷区域316中更薄并且在别处更厚,所以更少的引线框架材料被去除以形成引线,并且因此可以实现引线间距与引线框架厚度之比B/A小于1。
与空间相关的术语诸如“下”、“之下”、“下方”、“上”、“之上”、“上方”等用于方便说明,以阐释一个元件相对于第二个元件的定位。这些术语旨在涵盖封装体的除了在图中所绘的定向之外的不同定向。进一步地,术语诸如“第一”、“第二”等也可以用于描述各种元件、区域和部分等,而非旨在构成限制。贯穿本说明,类似的术语表示类似的元件。
如此处使用的,“具有”、“含有”、“包含”、“包括”等术语为开放性术语,表示存在所陈述的元件或者特征,但是也不排除存在其他元件或者特征。除非本文另有明确说明,否则“一”、“一个”和“该”旨在包括单数形式和复数形式。
在了解了变型和应用的上述范围之后,应该理解,本发明既不限于前述说明,也不限于对应附图。事实上,本发明仅由以下权利要求书及其法律等同物限制。
Claims (15)
1.一种制造模制倒装芯片半导体封装体的方法,包括:
提供引线框架,所述引线框架具有相对的第一主表面和第二主表面、在所述第一主表面上的第一金属化结构、在所述第二主表面上的第二金属化结构、以及从所述第二主表面向所述第一主表面延伸的凹陷区域;
用第一模制用料填充所述凹陷区域,从而使得所述引线框架:在所述引线框架的第二侧处被所述第一模制用料和所述第二金属化结构保护、并且在所述引线框架的与所述第二侧相对的第一侧处在所述第一金属化结构中的间隙之间暴露出来;
用化学蚀刻剂蚀刻所述引线框架的在所述第一金属化结构中的间隙之间的暴露部分,以在所述引线框架的所述第一侧处形成间隔开的引线,所述第一模制用料和所述第二金属化结构保护所述引线框架在所述第二侧处免受所述化学蚀刻剂的作用;
将多个半导体裸片放置在所述引线框架上,从而使得所述半导体裸片的焊盘面朝所述引线框架的所述引线;
将所述焊盘附接至所述引线框架的所述引线;以及
用第二模制用料将所述半导体裸片包封,所述第二模制用料将在所述引线之间的空间填充,从而使得所述第二模制用料与所述第一模制用料邻接,
其中所述第一模制用料是多官能模制用料,并且所述第二模制用料是多芳香模制用料。
2.根据权利要求1所述的方法,
其中所述引线框架包括铜并且所述第二金属化结构包括金,并且
其中所述化学蚀刻剂相对于金并且相对于所述第一模制用料选择性地蚀刻铜,从而使得所述第一模制用料和所述第二金属化结构保护所述引线框架在所述第二侧处免受所述化学蚀刻剂的作用。
3.根据权利要求2所述的方法,其中所述第二金属化结构包括NiPdAu,并且所述化学蚀刻剂包括氨。
4.根据权利要求1所述的方法,其中由所述化学蚀刻剂蚀刻所述引线框架的在所述第一金属化结构中的所述间隙之间的所述暴露部分,从而使得所述引线在所述引线的厚度上具有非均匀的宽度。
5.根据权利要求4所述的方法,其中所述引线的宽度从所述第一主表面进一步地减小到最小值,并且然后增加。
6.根据权利要求1所述的方法,其中用所述化学蚀刻剂蚀刻所述引线框架的在所述第一金属化结构中的所述间隙之间的所述暴露部分,从而使得所述引线的侧壁被钻蚀。
7.根据权利要求6所述的方法,其中在所述引线的每侧处的所述钻蚀的范围在所述引线的厚度的5%至40%。
8.一种模制倒装芯片半导体封装体,包括:
引线框架,具有:相对的第一主表面和第二主表面、在所述第一主表面上的第一金属化结构、在所述第二主表面上的第二金属化结构、从所述第二主表面向所述第一主表面延伸的凹陷区域、以及在所述第一金属化结构中的间隙之间被化学蚀刻到所述引线框架中的间隔开的引线;
半导体裸片,具有面朝并且附接至所述引线框架的所述引线的多个焊盘;
第一模制用料,将所述凹陷区域填充;以及
第二模制用料,将所述半导体裸片包封并且将在所述引线之间的空间填充,从而使得所述第二模制用料与所述第一模制用料邻接,
其中A是所述引线框架的总厚度,
其中B是在所述引线中的相邻引线之间的间距,
其中B/A<1,
其中所述第一模制用料是多官能模制用料,并且所述第二模制用料是多芳香模制用料。
9.根据权利要求8所述的模制倒装芯片半导体封装体,其中0.2<B/A<1。
10.根据权利要求8所述的模制倒装芯片半导体封装体,其中所述引线框架包括铜,并且所述第二金属化结构包括金。
11.根据权利要求10所述的模制倒装芯片半导体封装体,其中所述第二金属化结构包括NiPdAu。
12.根据权利要求8所述的模制倒装芯片半导体封装体,其中在所述引线的厚度上,所述引线具有非均匀的宽度。
13.根据权利要求12所述的模制倒装芯片半导体封装体,其中所述引线的宽度从所述第一主表面进一步地减小到最小值,并且然后增加。
14.根据权利要求8所述的模制倒装芯片半导体封装体,其中所述引线具有曲面形侧壁。
15.一种模制倒装芯片半导体封装体,包括:
引线框架,具有:相对的第一主表面和第二主表面、在所述第一主表面上的第一金属化结构、在所述第二主表面上的第二金属化结构、从所述第二主表面向所述第一主表面延伸的凹陷区域、以及在所述第一金属化结构中的间隙之间被化学蚀刻到所述引线框架中的间隔开的引线;
半导体裸片,具有面朝并且附接至所述引线框架的所述引线的多个焊盘;
第一模制用料,将所述凹陷区域填充;以及
第二模制用料,将所述半导体裸片包封并且将在所述引线之间的空间填充,从而使得所述第二模制用料与所述第一模制用料邻接,
其中A是所述引线框架的总厚度,
其中B是在所述引线中的相邻引线之间的间距,
其中B/A<1,
其中所述第一模制用料包括液晶聚合物或者填充有氮化铝的热塑性树脂。
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US11444048B2 (en) * | 2017-10-05 | 2022-09-13 | Texas Instruments Incorporated | Shaped interconnect bumps in semiconductor devices |
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