CN105321655A - Chip electronic component and board having the same mounted thereon - Google Patents
Chip electronic component and board having the same mounted thereon Download PDFInfo
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- CN105321655A CN105321655A CN201410437940.7A CN201410437940A CN105321655A CN 105321655 A CN105321655 A CN 105321655A CN 201410437940 A CN201410437940 A CN 201410437940A CN 105321655 A CN105321655 A CN 105321655A
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- 239000000758 substrate Substances 0.000 claims abstract description 48
- 238000007747 plating Methods 0.000 claims abstract description 16
- 238000004804 winding Methods 0.000 claims description 92
- 239000011248 coating agent Substances 0.000 claims description 70
- 238000000576 coating method Methods 0.000 claims description 70
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 30
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 24
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 24
- 239000010949 copper Substances 0.000 claims description 23
- 239000010931 gold Substances 0.000 claims description 16
- 239000010936 titanium Substances 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 10
- 229910052709 silver Inorganic materials 0.000 claims description 10
- 239000004332 silver Substances 0.000 claims description 10
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 239000004411 aluminium Substances 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 229910052763 palladium Inorganic materials 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 abstract description 12
- 239000002184 metal Substances 0.000 abstract description 12
- 239000000696 magnetic material Substances 0.000 abstract description 8
- 238000000034 method Methods 0.000 description 28
- 239000010408 film Substances 0.000 description 14
- 229910000859 α-Fe Inorganic materials 0.000 description 11
- 230000008569 process Effects 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 239000010409 thin film Substances 0.000 description 7
- 230000037361 pathway Effects 0.000 description 5
- 230000003321 amplification Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 238000004626 scanning electron microscopy Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 230000002860 competitive effect Effects 0.000 description 3
- 238000001802 infusion Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 230000005389 magnetism Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 208000035126 Facies Diseases 0.000 description 1
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- KOMIMHZRQFFCOR-UHFFFAOYSA-N [Ni].[Cu].[Zn] Chemical compound [Ni].[Cu].[Zn] KOMIMHZRQFFCOR-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910000808 amorphous metal alloy Inorganic materials 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 239000011324 bead Substances 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F17/0013—Printed inductances with stacked layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Coils Or Transformers For Communication (AREA)
- Manufacturing Cores, Coils, And Magnets (AREA)
Abstract
The present invention provides a chip electronic component which includes: a magnetic material main body comprising an insulating substrate, and a coil conductive pattern formed at least one surface of the insulating substrate; and an external electrode formed on both end units of the magnetic material main body to be connected to an end unit of the coil conductive pattern. The coil conductive pattern is formed by metal plating. In a cross section of the magnetic material main body in a longitudinal direction, a ratio of an outermost coil conductive pattern compared to an inner coil conductive pattern of the coil conductive pattern satisfies 1.0 to 1.5.
Description
The cross reference of related application
This application claims the rights and interests that on June 2nd, 2014 is committed to the Korean Patent Application No. 10-2014-0066925 of Korean Intellectual Property Office, the content of this application combines so far by reference.
Background technology
The present invention relates to chip electronic device and the plate for installing chip electronic device.
As chip electronic device, inductor is typical passive component, and it and resistor are configured to denoising electronic circuit together with capacitor.Electromagnetic property is utilized inductor and Capacitor banks to be combined the resonant circuit, filter circuit etc. being configured to amplify the signal in special frequency band.
Recently, along with information technology (IT) equipment (such as, various communication equipment, display device etc.) miniaturization and the quickening of sheet, to for making the various elements applied in these information technoloy equipments (such as, inductor, capacitor, transistor etc.) technology that is miniaturized and thinning studies.Inductor also rapidly by small size, high density and can automatic surface install chip replace, and have developed thin-film electro sensor, in thin-film electro sensor, the mixture of Magnaglo and resin is formed on coil former, coil former by electroplate be formed at film-insulated substrate upper surface and lower surface on.
By forming coil former on an insulating substrate, and manufacture this thin-film electro sensor with the outside of same material coil former.
Meanwhile, in order to reduce the D.C. resistance (Rdc) in inductor characteristic, the area of plating part can be considered emphatically.For this reason, employ anisotropy galvanoplastic (anisotropicplatingmethod), in the method, due to the current density of higher level, plating part only increases to the top of coil.
Anisotropy galvanoplastic are so a kind of technology: by applying the electric current of high current density to low concentration inorganic material, its restriction plating part increases along the Width of coil, allow plating part only to increase to the top of coil simultaneously, obtain higher winding wire model (coilconductorpattern) depth-width ratio (A/R) thus.Therefore, in the method, reliable nucleus (corearea) can be obtained, therefore can not lower efficiency, D.C. resistance (Rdc) can also be reduced.
But utilizing in the formation technology according to the coil of the chip electronic device of the anisotropy galvanoplastic in correlation technique, with regard to top outer coil, the growth along Width also may occur, and therefore coil may have uneven cross-sectional area.
Along with the cross-sectional area of coil increases, the D.C. resistance (Rdc) as a key property of chip electronic device is minimized.When coil has same volume, the consistent coil of cross-sectional area can have lower level resistance.
Therefore, have need formed so a kind of loop construction: this loop construction significantly reduces the change of coil width, and coil can have consistent cross-sectional area thus.
[correlation technique file]
Japanese patent application publication No. 1999-204337.
Summary of the invention
Some embodiments of the present invention can provide a kind of chip electronic device and a kind of plate for installing this chip electronic device.
According to certain embodiments of the present invention, chip electronic device can comprise: magnet, and this magnet comprises insulating substrate and at least one the winding wire model formed on the surface at this insulating substrate; And outer electrode, to be connected to the end of winding wire model on two ends that this outer electrode is formed in magnet, wherein, winding wire model is formed by plating, at described magnet along in the cross section of length and thickness direction, the width of top outer coil in described winding wire model and the ratio of the width of Inside coil are 1.0 to 1.5.
The anisotropy coating that described winding wire model can comprise model coating, the electrodeposited coating that described model coating is formed and be formed on described electrodeposited coating.
In described top outer coil lead model, when the left side width between the edge and the edge of described anisotropy coating of described electrodeposited coating and right side width are defined as Wa and Wb respectively, the ratio of Wa:Wb can be 0.1:20 to 0.1:30.
The width of the model coating of described top outer coil lead model can be greater than the width of the model coating of described Inside coil lead model.
The depth-width ratio (A/R) of described winding wire model can be 1.5 to 5.5.
Described winding wire model part can be selected from containing one or more group comprising following material: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
According to certain embodiments of the present invention, chip electronic device can comprise: magnet, and this magnet comprises insulating substrate and at least one the winding wire model formed on the surface at this insulating substrate, and outer electrode, to be connected to the end of winding wire model in two end portion that this outer electrode is formed in magnet, wherein, described winding wire model comprises model coating, the electrodeposited coating that described model coating is formed and the anisotropy coating formed on described electrodeposited coating, and, at described magnet along in the cross section of length-thickness direction, when left side width between the electrodeposited coating and anisotropy coating of the top outer coil lead model in described winding wire model and right side width are defined as Wa and Wb respectively, the ratio of Wa:Wb is 0.1:20 to 0.1:30.
The width of the model coating of described top outer coil lead model can be greater than the width of the model coating of described Inside coil lead model.
The depth-width ratio (A/R) of described winding wire model can be 1.5 to 5.5.
Described winding wire model can be selected from containing one or more group comprising following material: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
According to certain embodiments of the present invention, can comprise: printed circuit board (PCB) for the plate installing chip electronic device, this printed circuit board (PCB) is provided with the first electrode slice formed thereon and the second electrode slice; And the above-mentioned chip electronic device be arranged on this printed circuit board (PCB).
Accompanying drawing explanation
[0023] by below with reference to the accompanying drawings done specific descriptions, above-mentioned and other side, other advantage of characteristic sum of the present invention will clearly be understood, in the drawings:
Fig. 1 is perspective illustration, shows the chip electronic device according to an exemplary embodiment of the present invention, which show Inside coil model;
Fig. 2 is the sectional view along the straight line I-I ' in Fig. 1;
Fig. 3 shows the enlarged diagram of part A shown in Fig. 2 by way of example;
Fig. 4 is scanning electron microscopy (SEM) photo, shows the winding wire model of the amplification of the chip electronic device according to comparing embodiment of the present invention;
Fig. 5 is scanning electron microscopy (SEM) photo, shows the winding wire model of the amplification of the chip electronic device according to inventive embodiments of the present invention;
Fig. 6 is stereogram, shows the device of chip electronic shown in Fig. 1 installation state on a printed circuit.
Embodiment
Referring now to accompanying drawing, illustrative embodiments of the present invention is described in detail.
[0025] but, the present invention can illustrate by many different forms, should not be construed the particular implementation being confined to describe in this specification.On the contrary, the object of these execution modes is to make the present invention comprehensively and thoroughly, and scope of the present invention is showed those skilled in the art fully.
In the accompanying drawings, the shape and size of element may for the sake of clarity be exaggerated, and identical Reference numeral represents same or analogous element in the text.
Chip electronic device according to an exemplary embodiment of the present invention will be described below.To describe thin-film electro sensor in detail, but the present invention is not limited to this.
Fig. 1 is perspective illustration, show the chip electronic device according to an exemplary embodiment of the present invention, which show Inside coil model, Fig. 2 is the sectional view along the straight line I-I ' in Fig. 1, and Fig. 3 shows the enlarged diagram of part A shown in Fig. 2 by way of example.
Referring to figs. 1 to Fig. 3, as an example of chip electronic device, provide the thin film chip inductor device 100 used in the power transmission line of power supply circuits.Chip electronic device suitably can be used as chip magnetic bead, chip-type filter etc.
Thin-film electro sensor 100 can comprise magnet 50, insulating substrate 23 and winding wire model 42 and 44.
Magnet 50 can be formed by any material and unrestricted, as long as this material can form the outward appearance of thin-film electro sensor 100 and show magnetic properties.Such as, magnet 50 can be formed by filling ferrite or Metal Substrate soft magnetic material.With regard to ferrite, the Mn-Zn base ferrite, nickel-Zn base ferrite, nickel-zinc-copper based ferrite, manganese-Mg-based ferrite, barium based ferrite, lithium based ferrite etc. that are widely known by the people can be used, with regard to Metal Substrate soft magnetic material, can use iron-silicon-boron-cu-base amorphous alloy state metal dust, but the present invention is not limited to this.
Magnet 50 can have hexahedral shape, will limit hexahedral direction below, clearly to describe illustrative embodiments of the present invention.L shown in Fig. 1, W and T submeter refers to length direction, Width and thickness direction.The shape of magnet 50 can be cuboid.
The material of insulating substrate 23 formed in magnet 50 is not particularly limited, as long as insulating substrate 23 can be formed as film and winding wire model 42 and 44 can be formed on an insulating substrate by plating.Such as, insulating substrate 23 can be printed circuit board (PCB) (PCB) substrate, ferrite substrate, Metal Substrate soft magnetism substrate etc.
The core of insulating substrate 23 can be hollow to form cavity, and cavity by the same material of such as ferrite, Metal Substrate soft magnetic material etc., can form core thus.By forming the core being filled with magnetic material, inductance L can be improved.
The winding wire model 42 with coil shape model can be formed on a surface of insulating substrate 23, and the winding wire model 44 with coil shape model can be formed in insulating substrate 23 another on the surface.
Winding wire model 42 and 44 can comprise spiral coil former, and can be electrically connected mutually by the pathway electrode 46 formed in insulating substrate 23 on a surface of insulating substrate 23 and another winding wire model 42 and 44 formed on the surface.
The metal that conductance can be used excellent forms winding wire model 42 and 44 and pathway electrode 46.Such as, can use silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu), platinum (Pt), above-mentioned material mixture etc. form winding wire model 42 and 44 and pathway electrode 46.
Dielectric film can be formed on the surface of coil lead model 42 and 44.
Dielectric film can be formed by known method, such as, silk screen print method, photoresist (PR) exposure imaging method, spraying process, infusion process etc.
The material of dielectric film is not particularly limited, as long as can form thin dielectric membrane.Such as, (PR), epoxy etc. can be made with photoresist to form dielectric film.
The end being formed at the winding wire model 42 on a surface of insulating substrate 23 can be exposed to an end face on the length direction of magnet 50, and the end being formed at the winding wire model 44 on another surface of insulating substrate 23 can be exposed to another end face on the length direction of magnet 50.
Outer electrode 31 and 32 can be formed in be connected to winding wire model 42 and 44 on two end faces on the length direction of magnet 50, and winding wire model 42 and 44 is exposed to two end faces on the length direction of magnet 50.
Outer electrode 31 and 32 can extend to two sides on upper surface on the thickness direction of magnet 50 and lower surface and/or Width.
The metal that conductance can be used excellent forms outer electrode 31 and 32.Such as, can be used alone the formation outer electrode 31 and 32 such as nickel (Ni), copper (Cu), tin (Sn), silver (Ag) etc. or their alloy.
According to an illustrative embodiment of the invention, with regard to the length of magnet 50 and the cross section of thickness direction, the ratio of the width of the top outer coil lead model in winding wire model 42 and 44 and the width of Inside coil lead model can be 1.0 to 1.5.
As shown in Figure 2, the Inside coil lead model in winding wire model 42 and 44 and the width of top outer coil lead model refer to the distance between the left side edge of each the winding wire model in the length of magnet 50 and the cross section of thickness direction and right side edge.
Generally speaking, in order to the D.C. resistance (Rdc) of one of the key property making chip inductor reduces, the area of plating part may be important.For this reason, employ anisotropy galvanoplastic, in the method, give the credit to high current density, plating part only increases to the top of coil.
Anisotropy galvanoplastic are so a kind of technology: by applying the electric current of high current density to the inorganic material of low concentration, it can limit plating part and increase along the Width of coil, allow plating part only to increase to the top of coil simultaneously, obtain higher winding wire model depth-width ratio (A/R) thus.Therefore, in the method, reliable nucleus (acoreareamaybesecured) can be obtained, can not lower efficiency thus, D.C. resistance (Rdc) can also be reduced.
But utilizing in the coil formation technology according to the chip inductor of the anisotropy galvanoplastic of correlation technique, with regard to top outer coil, also there will be the growth along Width, therefore coil can have uneven cross-sectional area.
Along with the cross-sectional area of coil increases, the D.C. resistance (Rdc) as a key property of chip electronic device is minimized.When coil has same volume, the consistent coil of cross-sectional area can have lower resistance.
When above-mentioned top outer coil has uneven cross-sectional area because plating part increases along Width, the D.C. resistance (Rdc) as a key property of chip electronic device can not reduce.
According to an illustrative embodiment of the invention, in the length of magnet 50 and the cross section of thickness direction, the ratio of the width of the top outer coil lead model in winding wire model 42 and 44 and the width of Inside coil lead model is adjusted to 1.0 to 1.5, the cross-sectional area of winding wire model can be consistent thus, thus reduce D.C. resistance (Rdc) significantly.
This situation may be more satisfactory: the ratio of the width of the top outer coil lead model in winding wire model 42 and 44 and the width of Inside coil lead model is 1.0.In this case, D.C. resistance (Rdc) can be minimum.
On the other hand, the ratio of the width of the top outer coil lead model in coil lead model 42 and 44 and the width of Inside coil lead model is greater than 1.5, because the cross-sectional area of winding wire model is inconsistent, D.C. resistance (Rdc) can be increased.
As mentioned above, when anisotropy galvanoplastic being applied to the top outer coil lead model of general chip inductor, coil may increase at Width and vertical direction simultaneously, and what therefore the width of top outer coil lead model may be abnormal compared with the width of Inside coil lead model is wide.Therefore, the cross-sectional area of winding wire model is overall may be uneven.
As mentioned above, when anisotropy galvanoplastic are applied to top outer coil lead model, coil increases simultaneously on Width and vertical direction.Reason is, with regard to Inside coil lead model, because adjacent winding wire model competitiveness increases, coil can unanimously increase in the vertical direction, but with regard to top outer coil lead model, owing to not having the competitive peripheral coil increased, when being exposed to electroplate liquid, coil can broad ways and vertical direction growth.
But, according to an illustrative embodiment of the invention, in the length of magnet 50 and the cross section of thickness direction, the ratio of the width of the top outer coil lead model in winding wire model 42 and 44 and the width of Inside coil lead model is adjusted to 1.0 to 1.5, thus, the cross-sectional area of winding wire model can be completely even.
The method for adjusting winding wire model with on all four cross-sectional area described above is not particularly limited.Such as, when anisotropy galvanoplastic are applied to top outer coil lead model, by suppressing the growth in the direction of the width of winding wire model, whole winding wire model can have uniform cross-sectional area.
In more detail, when anisotropy galvanoplastic are applied to top outer coil lead model, do not existed on the competitive side increased by the peripheral coil at top outer coil lead model and form a dam, the growth on Width can be suppressed, thus the environment similar with having the competitive environment facies increasing the Inside coil lead model of peripheral coil is provided.
Such as, even if when anisotropy galvanoplastic are applied to top outer coil lead model, by do not exist peripheral coil competitiveness increase region in (such as, the outside of top outer coil lead model) form the dam with top outer coil lead model with predetermined space, the growth on Width can be suppressed.
In the method using dam to suppress top outer coil lead model to increase in the direction of the width, narrower space can be formed between coil and dam, the copper ion (Cu be incorporated in this space can be suppressed thus
2+) movement and diffusion.Therefore, top outer coil lead model can be reduced significantly to increase in the direction of the width.
Dam is not particularly limited, and can use general insulating material, such as dry film etc.In addition, dam shape and be highly also not particularly limited.Such as, dam is formed at the height being equal to or higher than target coil lead model.
The method of above-mentioned formation winding wire model is only an example, and therefore the present invention is not limited to the method, can apply various method.
Meanwhile, according to an illustrative embodiment of the invention, the winding wire model 42 anisotropy coating 42c that can comprise model coating 42a, the electrodeposited coating 42b that model coating 42a is formed and be formed on electrodeposited coating 42b.
With regard to top outer coil lead model, when the left side width between the edge and the edge of anisotropy coating 42c of electrodeposited coating 42b and right side width are defined as Wa and Wb, the ratio of Wa:Wb can be 0.1:20 to 0.1:30.
In top outer coil lead model, left side width between the edge of electrodeposited coating 42b and the edge of anisotropy coating 42c and the ratio Wa:Wb of right side width are adjusted to 0.1:20 to 0.1:30, therefore, the cross-sectional area of winding wire model can be completely even, thus reduce D.C. resistance (Rdc) significantly.
Left side width Wa between the edge of electrodeposited coating 42b and the edge of anisotropy coating 42c and right side width Wb can be measured as the distance between electrodeposited coating 42b tangent line in a thickness direction and anisotropy coating 42c tangent line in a thickness direction.
In top outer coil lead model, in ideal conditions, namely the left side width between the edge and the edge of anisotropy coating 42c of electrodeposited coating 42b and right side width be 0.1:20 or less than value Wa:Wb, D.C. resistance (Rdc) can reduce further significantly, but in fact, because process deviation is difficult to realize this ideal ratio.
On the other hand, in top outer coil lead model, left side width between the edge and the edge of anisotropy coating 42c of electrodeposited coating 42b and the ratio Wa:Wb of right side width are greater than 0.1:30, because the cross-sectional area of whole winding wire model may be uneven, D.C. resistance (Rdc) may be increased.
According to an illustrative embodiment of the invention, the width of the model coating 42a of top outer coil lead model 42 may be larger than the width of the model coating of Inside coil lead model.
According to an illustrative embodiment of the invention, the depth-width ratio (A/R) of winding wire model 42 and 44 can be 1.5 to 5.5.
In chip electronic device according to an illustrative embodiment of the invention, in order to reduce the D.C. resistance (Rdc) of winding wire model 42 and 44 significantly, the cross-sectional area of coil can be increased.For this reason, the anisotropy galvanoplastic that coil through-thickness is increased can be applied.
When application anisotropy galvanoplastic make winding wire model increase relatively thick at thickness direction, the cross-sectional area of coil can be increased, thus reduce D.C. resistance (Rdc).
Such as, according to an illustrative embodiment of the invention, the depth-width ratio (A/R) of winding wire model 42 and 44 is adjusted to 1.5 to 5.5, thus can increase the cross-sectional area of coil, thus reduces D.C. resistance (Rdc).
When the depth-width ratio (A/R) of coil lead model 42 and 44 is less than 1.5, because depth-width ratio (A/R) is close to 1, the effect increasing cross-sectional area in the confined space may not be remarkable, therefore, the effect reducing D.C. resistance (Rdc) may not be remarkable.
On the other hand, when the depth-width ratio (A/R) of coil lead model 42 and 44 is greater than 5.5, because the cross-sectional area of coil increases, D.C. resistance (Rdc) can be reduced, but, because the growth of plating part is uneven, may circuit defect be produced, and according to the issuable burnt deposit when the supply rate of copper (Cu) ion is lower, D.C. resistance (Rdc) can reduce.
Winding wire model 42 and 44 can be selected from containing one or more group comprising following material: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
According to another illustrative embodiments of the present invention, chip electronic device can comprise: magnet 50, and magnet 50 comprises insulating substrate 23 and at least one the winding wire model formed on the surface 42 and 44 at insulating substrate 23; And outer electrode 31 and 32, to be connected to the end of winding wire model 42 and 44 on two ends that outer electrode 31 and 32 is formed in magnet 50.The anisotropy coating 42c that winding wire model 42 can comprise model coating 42a, the electrodeposited coating 42b that model coating 42a is formed and be formed on electrodeposited coating 42b.At magnet 50 along in the cross section of length-thickness direction, when left side width between the edge and the edge of anisotropy coating 42c of the electrodeposited coating 42b of the top outer coil lead model in winding wire model 42 and 44 and right side width are defined as Wa and Wb respectively, the ratio of Wa:Wb can be 0.1:20 to 0.1:30.
The width of the model coating of top outer coil lead model can be greater than the width of the model coating of Inside coil lead model.
The depth-width ratio (A/R) of winding wire model can be 1.5 to 5.5.
Winding wire model 42 and 44 can be selected from containing one or more group comprising following material: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
According to the feature of the chip electronic device of another illustrative embodiments of the present invention with repeats according to the feature of the chip electronic device of previous illustrative embodiments of the present invention, for avoiding repeated description, will the description of omission to these repeated characteristics.
Fig. 4 is scanning electron microscopy (SEM) photo, shows the winding wire model of the amplification of the chip electronic device according to comparing embodiment of the present invention.
Fig. 5 is scanning electron microscopy (SEM) photo, shows the winding wire model of the amplification of the chip electronic device according to inventive embodiments of the present invention.
With reference to figure 4 and Fig. 5, can find from the shape of cross section of the winding wire model of the chip electronic device according to exemplary embodiment of the invention, the cross-sectional area of winding wire model is on all four.
On the other hand, as shown in Figure 4, can find, in the winding wire model of comparing embodiment of the present invention, due to the left side width of anisotropy coating in top outer coil lead model and differing greatly of right side width, the cross-sectional area of whole winding wire model is completely inconsistent.
Manufacture process according to the chip electronic device of an exemplary embodiment of the present invention will be described below.
First, winding wire model 42 and 44 can be formed on insulating substrate 23.
By methods such as plating, winding wire model 42 and 44 can be formed on thin insulating substrate 23.In this case, insulating substrate 23 is not particularly limited.Such as, can use printed circuit board (PCB) (PCB), ferrite substrate, Metal Substrate soft magnetism substrate etc., the thickness of insulating substrate 23 can be 40 to 100 μm.
For example, the formation method of winding wire model 42 and 44 is galvanoplastic, but the present invention is not limited to this.The excellent metal of conductance can be used to form winding wire model 42 and 44.Such as, the mixture etc. of silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu), platinum (Pt) or above-mentioned material can be used.
By forming cavity and can form pathway electrode 46 with this cavity of filled with conductive material in the part of insulating substrate 23, the surface being formed at insulating substrate 23 can be electrically connected mutually via pathway electrode 46 with the winding wire model 42 and 44 on another surface.
The cavity penetrating insulating substrate 23 can be formed in the core of insulating substrate 23 by boring, laser, sandblasting or Sheet Metal Forming Technology.
When forming winding wire model 42 and 44, after forming electrodeposited coating by print process formation model coating and by isotropism (isotropic) galvanoplastic on model coating, by applying high-density current to carry out anisotropy plating to coil, anisotropy coating can increase along the thickness direction of coil.
According to an illustrative embodiment of the invention, when forming winding wire model, by by print process etc. on the formation dam, two ends of insulating substrate 23, the anisotropy coating of top outer coil lead model can be suppressed to increase along Width.
Next, dielectric film can be formed on the surface of coil lead model 42 and 44.With regard to forming the method for dielectric film, known stencil, photoresist (PR) exposure imaging method, spraying process, infusion process etc. can be used.
As long as can form thin dielectric film, the material of dielectric film is just not particularly limited.Such as, (PR), epoxy etc. can be made with photoresist to form dielectric film.
Dielectric film can be formed as the thickness with 1 to 3 μm.When the thickness of dielectric film is less than 1 μm, leakage current may be produced because dielectric film damages, may produce inductance and reduce circuit defect between such waveform defect or coil at HFS, when thickness is greater than 3 μm, inductance performance may worsen.
Next, can form magnet 50 by magnetosphere stacking on the upper and lower of insulating substrate 23, winding wire model 42 and 44 is formed on insulating substrate 23.
Magnet 50 can be formed in the following manner: stacking magnetosphere on two surfaces of insulating substrate 23, and by laminating or isostatic pressing method, stacking magnetosphere be compressed.In this case, core can be formed by the cavity being filled with magnetic material.
In addition, can form the outer electrode 31 and 32 being connected to winding wire model 42 and 44, winding wire model 42 and 44 is exposed to the end face of magnet 50.
The cream containing the excellent metal of conductance can be used to form outer electrode 31 and 32, for example, conductive paste can contain separately nickel (Ni), copper (Cu), tin (Sn) or silver (Ag) or the alloy containing them.According to the shape of outer electrode 31 and 32, infusion process or similar approach and print process etc. can be used to form outer electrode 31 and 32.
Those and other features repeated according to the feature of the chip electronic device of previous illustrative embodiments of the present invention are omitted at this.
for installing the plate of chip electronic device
Fig. 6 is stereogram, shows the device of chip electronic shown in Fig. 1 installation state on a printed circuit.
With reference to figure 6, plate 200 for installing chip electronic device 100 according to an illustrative embodiment of the invention can comprise printed circuit board (PCB) 210 and the first electrode slice 221 and the second electrode slice 222, chip electronic device 100 level is installed on the printed circuit board 210, and the first electrode slice 221 and the second electrode slice 222 are formed on the printed circuit board 210 and be spaced.
In this case, chip electronic device 100 can be electrically connected to printed circuit board (PCB) 210: the first outer electrode 31 by solder flux 230 with following state and the second outer electrode 32 is separately positioned on the first electrode slice 221 and the second electrode slice 222 to contact with each other.
Except description above, the description to the feature that the feature of the chip electronic device with previous illustrative embodiments according to the present invention repeats will be omitted
As previously mentioned, according to an illustrative embodiment of the invention, because the difference of the width between the Inside coil lead model in winding wire model and top outer coil lead model may reduce, the winding wire model with uniform cross-sectional area can be realized, therefore can reduce D.C. resistance (Rdc) significantly.
In addition, make it identical with the width of Inside coil lead model by the width of the top outer coil lead model in adjustment winding wire model, the nucleus of chip inductor can be made relative to prior art safe enough, therefore prevent efficiency from reducing.
In addition, make it identical with the width of Inside coil lead model by the width of the top outer coil lead model in adjustment winding wire model, the number of turn of chip inductor can be increased relative to prior art, therefore increase inductance significantly.
Meanwhile, in chip electronic device according to an illustrative embodiment of the invention, owing to can reduce the width difference between winding wire model, width difference can be less, and can reduce circuit defect, therefore reliability is fine.
Although show above and describe illustrative embodiments, be to make amendment and distortion when not departing from the spirit and scope of the present invention defined by the appended claims to those skilled in the art obviously.
Claims (11)
1. a chip electronic device, this chip electronic device comprises:
Magnet, this magnet comprises insulating substrate and at least one the winding wire model formed on the surface at this insulating substrate; And
Outer electrode, to be connected to the end of described winding wire model on two ends that this outer electrode is formed in described magnet,
Wherein, described winding wire model is formed by plating, at described magnet along in the cross section of length and thickness direction, the width of top outer coil in described winding wire model and the ratio of the width of Inside coil are 1.0 to 1.5.
2. chip electronic device as claimed in claim 1, wherein, the anisotropy coating that described winding wire model comprises model coating, the electrodeposited coating that described model coating is formed and formed on described electrodeposited coating.
3. chip electronic device as claimed in claim 1, wherein, in described top outer coil lead model, when the left side width between the edge and the edge of described anisotropy coating of described electrodeposited coating and right side width are defined as Wa and Wb respectively, the ratio of Wa:Wb is 0.1:20 to 0.1:30.
4. chip electronic device as claimed in claim 2, wherein, the width of the model coating of described top outer coil lead model is greater than the width of the model coating of described Inside coil lead model.
5. chip electronic device as claimed in claim 1, wherein, the depth-width ratio (A/R) of described winding wire model is 1.5 to 5.5.
6. chip electronic device as claimed in claim 1, wherein, described winding wire model contains one or more materials being selected from following group: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
7. a chip electronic device, this chip electronic device comprises:
Magnet, this magnet comprises insulating substrate and at least one the winding wire model formed on the surface at this insulating substrate; And
Outer electrode, to be connected to the end of described winding wire model on two ends that described outer electrode is formed in described magnet,
Wherein, the anisotropy coating that described winding wire model comprises model coating, the electrodeposited coating that described model coating is formed and formed on described electrodeposited coating, and, at described magnet along in the cross section of length-thickness direction, when left side width between the electrodeposited coating and described anisotropy coating of the top outer coil lead model in described winding wire model and right side width are defined as Wa and Wb respectively, the ratio of Wa:Wb is 0.1:20 to 0.1:30.
8. chip electronic device as claimed in claim 7, wherein, the width of the model coating of described top outer coil lead model is greater than the width of the model coating of Inside coil lead model.
9. chip electronic device as claimed in claim 7, wherein, the depth-width ratio (A/R) of described winding wire model is 1.5 to 5.5.
10. chip electronic device as claimed in claim 7, wherein, described winding wire model contains one or more materials being selected from following group: silver (Ag), palladium (Pd), aluminium (Al), nickel (Ni), titanium (Ti), gold (Au), copper (Cu) and platinum (Pt).
11. 1 kinds for installing the plate of chip electronic device, this plate comprises:
Printed circuit board (PCB), this printed circuit board (PCB) is provided with and is formed at the first electrode slice on described printed circuit board (PCB) and the second electrode slice; And
The chip electronic device as described in claim 1 or 7 is on the printed circuit board installed.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020140066925A KR101558092B1 (en) | 2014-06-02 | 2014-06-02 | Chip electronic component and board having the same mounted thereon |
| KR10-2014-0066925 | 2014-06-02 |
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| Publication Number | Publication Date |
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| CN105321655A true CN105321655A (en) | 2016-02-10 |
| CN105321655B CN105321655B (en) | 2017-09-01 |
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| CN201410437940.7A Active CN105321655B (en) | 2014-06-02 | 2014-08-29 | Chip electronic device and the plate for installing chip electronic device |
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| Country | Link |
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| JP (1) | JP5932914B2 (en) |
| KR (1) | KR101558092B1 (en) |
| CN (1) | CN105321655B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101762023B1 (en) * | 2015-11-19 | 2017-08-04 | 삼성전기주식회사 | Coil component and and board for mounting the same |
| KR101762025B1 (en) * | 2015-11-19 | 2017-07-26 | 삼성전기주식회사 | Coil component and board for mounting the same |
| KR101762026B1 (en) * | 2015-11-19 | 2017-07-26 | 삼성전기주식회사 | Coil component and board for mounting the same |
| KR101762024B1 (en) | 2015-11-19 | 2017-07-26 | 삼성전기주식회사 | Coil component and board for mounting the same |
| KR20170112522A (en) * | 2016-03-31 | 2017-10-12 | 주식회사 모다이노칩 | Coil pattern and method of forming the same, and chip device having the coil pattern |
| KR101981466B1 (en) | 2016-09-08 | 2019-05-24 | 주식회사 모다이노칩 | Power Inductor |
| KR102674655B1 (en) * | 2017-01-23 | 2024-06-12 | 삼성전기주식회사 | Coil component and manufacturing method for the same |
| KR101994757B1 (en) * | 2017-09-29 | 2019-07-01 | 삼성전기주식회사 | Thin type inductor |
| KR101898112B1 (en) * | 2018-01-22 | 2018-09-12 | 주식회사 모다이노칩 | Coil pattern and method of forming the same, and chip device having the coil pattern |
| KR102016496B1 (en) * | 2018-04-06 | 2019-09-02 | 삼성전기주식회사 | Coil component and manufacturing method the same |
| CN113396246A (en) * | 2018-11-26 | 2021-09-14 | 哈钦森技术股份有限公司 | High aspect ratio plated structures and anisotropic plating processes |
| KR102381269B1 (en) * | 2020-04-27 | 2022-03-30 | 삼성전기주식회사 | Coil component |
| JP2021171571A (en) * | 2020-04-30 | 2021-11-01 | ユニ・チャーム株式会社 | Absorbent article and defecation or urination determination method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2005005298A (en) * | 2003-06-09 | 2005-01-06 | Tdk Corp | Laminated chip inductor and its manufacturing method |
| JP2005210010A (en) * | 2004-01-26 | 2005-08-04 | Tdk Corp | Coil substrate, manufacturing method thereof, and surface-mounting coil element |
| JP2005217268A (en) * | 2004-01-30 | 2005-08-11 | Tdk Corp | Electronic component |
| JP2007067214A (en) * | 2005-08-31 | 2007-03-15 | Taiyo Yuden Co Ltd | Power inductor |
| JP2007227566A (en) * | 2006-02-22 | 2007-09-06 | Tdk Corp | Coil component |
| JP2009117546A (en) * | 2007-11-05 | 2009-05-28 | Asahi Kasei Electronics Co Ltd | Planar coil, and manufacturing method thereof |
| CN101620916A (en) * | 2008-07-04 | 2010-01-06 | 台达电子工业股份有限公司 | Magnetic element |
| JP6102578B2 (en) * | 2012-09-27 | 2017-03-29 | Tdk株式会社 | Anisotropic plating method |
| KR101506910B1 (en) * | 2012-09-27 | 2015-03-30 | 티디케이가부시기가이샤 | Method for anisotropic plating and thin- film coil |
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2014
- 2014-06-02 KR KR1020140066925A patent/KR101558092B1/en active IP Right Grant
- 2014-08-08 JP JP2014162202A patent/JP5932914B2/en active Active
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| Publication number | Publication date |
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| KR101558092B1 (en) | 2015-10-06 |
| JP2015228477A (en) | 2015-12-17 |
| JP5932914B2 (en) | 2016-06-08 |
| CN105321655B (en) | 2017-09-01 |
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