CN105280552A - 一种阵列基板的制备方法、阵列基板和显示装置 - Google Patents
一种阵列基板的制备方法、阵列基板和显示装置 Download PDFInfo
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Abstract
本发明公开了一种阵列基板的制备方法、阵列基板和显示装置。用以加快阵列基板内的第一电极层的刻蚀速度,提高显示装置的开口率。其中制备方法包括在衬底基板上依次沉积第一电极层和栅极金属层,第一电极层包括至少两层导电层,且至少两层导电层的形成材料的刻蚀速率不同;在栅极金属层上形成光刻胶层;采用半色调掩膜板对形成有光刻胶层、第一电极层和栅极金属层的衬底基板进行曝光;对栅极金属层进行第一次刻蚀;对第一电极层进行刻蚀;对光刻胶层进行灰化处理,对栅极金属层进行第二次刻蚀,并剥离剩余的光刻胶,在已进行第二次刻蚀后的栅极金属层上依次形成半导体层、源、漏极层、过孔以及第二电极层。
Description
技术领域
本发明涉及液晶显示器制备工艺技术领域,特别涉及一种阵列基板的制备方法、阵列基板和显示装置。
背景技术
薄膜晶体管液晶显示器(ThinFilmTransistorLiquidCrystalDisplay,简称TFT-LCD)具有体积小、功耗低、无辐射等特点,在当前的平板显示器市场占据了主导地位。高级超维场转换技术(ADvancedSuperDimensionSwitch,简称ADS)通过同一平面内像素间电极产生边缘电场,使电极间以及电极正上方的取向液晶分子都能在平面方向(平行于基板)产生旋转转换,在增大视角的同时提高液晶层的透光效率。并且,随着科技的发展,显示器件也在向着高效、绿色、节能的趋势发展。
现有技术中为了简化工艺,一般将第一电极掩膜和栅极掩膜采用半色调掩膜板进行,以节省掩膜板的数量,现有技术中的阵列基板的制备流程如图1a~图1b所示,其中图1a~图1d为现有技术中的阵列基板制备过程结构示意图,制备方法包括:在衬底基板01上依次沉积第一电极层02、栅极层03,在栅极层03上涂覆光刻胶,形成光刻胶层04,采用半色调掩模板对栅极层03和第一电极层02进行曝光,形成的结构如图1a所示,对第一电极层02和栅极层03进行刻蚀,形成的结构如图1b所示,对光刻胶层04进行灰化处理,形成的结构如图1c所示,此时形成的条状的第一电极与其对应的栅极在宽度上的尺寸偏差较小,第一电极的宽度略小于对应的栅极的宽度,对栅极层03进行第二次刻蚀时,栅极的宽度会减小,形成的结构如图1d所示,此时第一电极的宽度w1大于对应的栅极w2的宽度,即相邻两个第一电极之间的间距L1小于相邻两个栅极L2之间的间距,不利于显示面板的开口率的提高。
发明内容
本发明提供了一种阵列基板的制备方法、阵列基板和显示装置,用以加快阵列基板内的第一电极层的刻蚀速度,减小第一电极与对应的栅极在宽度上的尺寸偏差值,提高显示装置的开口率。
为达到上述目的,本发明提供以下技术方案:
本发明提供了一种阵列基板的制备方法,包括:
在衬底基板上依次沉积第一电极层和栅极金属层,所述第一电极层包括:至少两层导电层,且所述至少两层导电层的形成材料的刻蚀速率不同;
在所述栅极金属层上形成光刻胶层;
采用半色调掩膜板对形成有光刻胶层、第一电极层和栅极金属层的衬底基板进行曝光;
对栅极金属层进行第一次刻蚀;
对第一电极层进行刻蚀;
对所述光刻胶层进行灰化处理,对栅极金属层进行第二次刻蚀,并剥离剩余的光刻胶,在已进行第二次刻蚀后的栅极金属层上依次形成半导体层、源、漏极层、过孔以及第二电极层。
本发明提供的阵列基板的制备方法,当对第一电极层和栅极金属层进行刻蚀时,由于第一电极层至少包含两层导电层,且两层导电层的形成材料的刻蚀速率不同,在刻蚀的初期时间段内,相同时间下,刻蚀速率大的导电层将被刻蚀的快些,这样在一段时间内,刻蚀速率大的导电层与刻蚀速率小的导电层在宽度上会存在偏差,此偏差可以增大刻蚀液与刻蚀速率慢的导电层的接触面积,故可以增大刻蚀速率慢的导电层的刻蚀速度,进而会增大第一电极与栅极之间的宽度差,当再对栅极金属层进行第二刻蚀后,第一电极与栅极之间的宽度差会减小,使得第一电极与对应的栅极在宽度上的差值在设计的允许范围内,即缩小第一电极的实际宽度与预设宽度之间的误差,减小两个相邻的第一电极之间的间距,进而可以提高显示装置的开口率。
在一些可选的实施方式中,所述第一电极层包括两层导电层,所述两层导电层分别为第一导电层和第二导电层,所述在衬底基板上依次沉积第一电极层和栅极金属层具体包括:
在所述衬底基板上沉积所述第一导电层;
在所述第一导电层上沉积所述第二导电层,且所述第二导电层的刻蚀速率大于所述第一导电层的刻蚀速率;
在所述第二导电层上沉积所述栅极金属层。在刻蚀时,上层的第二导电层在相同时间内被刻蚀的多些,刻蚀液可以通过第一导电层和第二导电层宽度上的空隙与第一导电层的上表面接触,进而可以加快第一导电层被刻蚀的速度,使得刻蚀后的第一电极和栅极金属层在宽度上的偏差增大。
在一些可选的实施方式中,所述第一电极层包括两层导电层,所述两层导电层分别为第一导电层和第二导电层,所述在衬底基板上依次沉积第一电极层和栅极金属层具体包括:
在所述衬底基板上沉积所述第二导电层,且所述第二导电层的刻蚀速率大于所述第一导电层的刻蚀速率;
在所述第二导电层上沉积所述第一导电层;
在所述第一导电层上沉积所述栅极金属层。在刻蚀时,下层的第二导电层在相同时间内被刻蚀的多些,刻蚀液可以通过第一导电层和第二导电层宽度上的空隙与第一导电层的下表面接触,进而可以加快第一导电层被刻蚀的速度,使得刻蚀后的第一电极和栅极金属层在宽度上的偏差增大。
在一些可选的实施方式中,所述对第一电极层进行刻蚀具体包括:
对所述第一电极层中的每层采用同一次刻蚀工艺进行刻蚀。可以节省工艺步骤。
在一些可选的实施方式中,所述对第一电极层进行刻蚀具体包括:
对所述第一电极层中的每层分别采用独立的刻蚀工艺进行刻蚀。
在一些可选的实施方式中,所述第一导电层的材料为a-ITO非晶氧化铟锡或p-ITO多晶氧化铟锡或ITO氧化铟锡或Ag银。这些材料的刻蚀速率相对较慢。
在一些可选的实施方式中,所述第二导电层的材料为IGZO铟镓锌氧化物或IZO氧化铟锌或ZnNO氮氧化锌或ITZO铟镓锡氧化物。这些材料的刻蚀速率相对较快。
本发明还提供了一种阵列基板,所述阵列基板采用上述任一项所述的阵列基板的制备方法制备而成。本发明提供的阵列基板可以提高显示装置的开口率。
本发明还提供了一种显示装置,包括:上述阵列基板。本发明提供的显示装置,具有较好的显示效果。
附图说明
图1a~图1d为现有技术中的阵列基板制备过程结构示意图;
图2为本发明实施例提供的阵列基板的制备方法流程图;
图3a~图3e为本发明实施例中的阵列基板制备过程结构示意图;
图4为本发明实施例中的阵列基板中的第一电极的一制备过程结构示意图。
附图标记:
01-衬底基板02-第一电极层
03-栅极层04-光刻胶层
1-衬底基板2-第一电极层
21-第一导电层22-第二导电层
3-栅极金属层4-光刻胶层
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。
如图2和图3a~3e所示,其中:图2为本发明实施例提供的阵列基板的制备方法流程图;图3a~图3e为本发明实施例中的阵列基板制备过程结构示意图;
本发明提供了一种阵列基板的制备方法,包括:
步骤S201:在衬底基板1上依次沉积第一电极层2和栅极金属层3,第一电极层2包括:至少两层导电层,且至少两层导电层的形成材料的刻蚀速率不同;
步骤S202:在栅极金属层3上形成光刻胶层4;
步骤S203:采用半色调掩膜板对形成有光刻胶层4、第一电极层2和栅极金属层3的衬底基板1进行曝光;
步骤S204:对栅极金属层3进行第一次刻蚀;
步骤S205:对第一电极层2进行刻蚀;
步骤S206:对光刻胶层4进行灰化处理,对栅极金属层3进行第二次刻蚀,并剥离剩余的光刻胶,在已进行第二次刻蚀后的栅极金属层3上依次形成半导体层、源、漏极层、过孔以及第二电极层。
本发明提供的阵列基板的制备方法,当对第一电极层2和栅极金属层3进行刻蚀时,由于第一电极层2至少包含两层导电层,且两层导电层的形成材料的刻蚀速率不同,在刻蚀的初期时间段内,相同时间下,刻蚀速率大的导电层将被刻蚀的快些,这样在一段时间内,刻蚀速率大的导电层与刻蚀速率小的导电层在宽度上会存在偏差,此偏差可以增大刻蚀液与刻蚀速率慢的导电层的接触面积,故可以增大刻蚀速率慢的导电层的刻蚀速度,进而会增大第一电极与栅极之间的宽度差,当再对栅极金属层3进行第二刻蚀后,第一电极与栅极之间的宽度差会减小,使得第一电极与对应的栅极在宽度上的差值在设计的允许范围内,即缩小第一电极的实际宽度与预设宽度之间的误差,减小两个相邻的第一电极之间的间距,进而可以提高显示装置的开口率。
刻蚀速率:刻蚀前后的厚度差与刻蚀时间的比,反应刻蚀快慢的量。上述第一电极层2经过曝光、显影、刻蚀后会形成第一电极,栅极金属层3经过曝光、显影、刻蚀后形成栅极,源、漏极层极源极层和漏极层。图3a~3e中是以第一电极层2为两层进行描述的,当然第一电极层2不限于两层,也可以为三层,三层中有两层的刻蚀速率相同,另一层和这两层都不相同,或者三层中三层的刻蚀速率都不相同。
一种具体实施方式中,第一电极层2包括两层导电层,两层导电层分别为第一导电层21和第二导电层22,在衬底基板1上依次沉积第一电极层2和栅极金属层3具体包括:
在衬底基板1上沉积第一导电层21;
在第一导电层21上沉积第二导电层22,且第二导电层22的刻蚀速率大于第一导电层21的刻蚀速率;
在第二导电层22上沉积栅极金属层3。在刻蚀时,上层的第二导电层22在相同时间内被刻蚀的多些,刻蚀液可以通过第一导电层21和第二导电层22宽度上的空隙与第一导电层21的上表面接触,进而可以加快第一导电层21被刻蚀的速度,使得刻蚀后的第一电极和栅极金属层3在宽度上的偏差增大。
另一种可选的实施方式中,第一电极层2包括两层导电层,导电层分别为第一导电层21和第二导电层22,在衬底基板1上依次沉积第一电极层2和栅极金属层3具体包括:
在衬底基板1上沉积第二导电层22,且第二导电层22的刻蚀速率大于第一导电层21的刻蚀速率;
在第二导电层22上沉积第一导电层21;
在第一导电层21上沉积栅极金属层3。在刻蚀时,下层的第二导电层22在相同时间内被刻蚀的多些,刻蚀液可以通过第一导电层21和第二导电层22宽度上的空隙与第一导电层21的下表面接触,进而可以加快第一导电层21被刻蚀的速度,使得刻蚀后的第一电极和栅极金属层3在宽度上的偏差增大。
即刻蚀速率大的导电层可以位于第一电极的多层导电层中的最上层或最下层。
上述步骤S205:对第一电极层2进行刻蚀具体包括:
对第一电极层2中的每层采用同一次刻蚀工艺进行刻蚀。可以节省工艺步骤。
上述步骤S205:对第一电极层2进行刻蚀具体包括:
对第一电极层2中的每层分别采用独立的刻蚀工艺进行刻蚀。即如图4所示,先对上层的进行刻蚀,形成的结构如图4所示,然后再对下层的进行刻蚀,形成的结构如图3c所示。
上述第一导电层21的材料为a-ITO非晶氧化铟锡或p-ITO多晶氧化铟锡或ITO氧化铟锡或Ag银。这些材料的刻蚀速率相对较慢。
上述第二导电层22的材料为IGZO铟镓锌氧化物或IZO氧化铟锌或ZnNO氮氧化锌或ITZO铟镓锡氧化物。这些材料的刻蚀速率相对较快。
本发明还提供了一种阵列基板,阵列基板采用上述任一项所述的阵列基板的制备方法制备而成。本发明提供的阵列基板可以提高显示装置的开口率。
本发明还提供了一种显示装置,包括:上述阵列基板。本发明提供的显示装置,具有较好的显示效果。
该显示装置可以是笔记本电脑显示屏、电子纸、有机发光二级管显示器、液晶显示器、液晶电视、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
显然,本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (9)
1.一种阵列基板的制备方法,其特征在于,包括:
在衬底基板上依次沉积第一电极层和栅极金属层,所述第一电极层包括:至少两层导电层,且所述至少两层导电层的形成材料的刻蚀速率不同;
在所述栅极金属层上形成光刻胶层;
采用半色调掩膜板对形成有光刻胶层、第一电极层和栅极金属层的衬底基板进行曝光;
对栅极金属层进行第一次刻蚀;
对第一电极层进行刻蚀;
对所述光刻胶层进行灰化处理,对栅极金属层进行第二次刻蚀,并剥离剩余的光刻胶,在已进行第二次刻蚀后的栅极金属层上依次形成半导体层、源、漏极层、过孔以及第二电极层。
2.如权利要求1所述的阵列基板的制备方法,其特征在于,所述第一电极层包括两层导电层,所述两层导电层分别为第一导电层和第二导电层,所述在衬底基板上依次沉积第一电极层和栅极金属层具体包括:
在所述衬底基板上沉积所述第一导电层;
在所述第一导电层上沉积所述第二导电层,且所述第二导电层的刻蚀速率大于所述第一导电层的刻蚀速率;
在所述第二导电层上沉积所述栅极金属层。
3.如权利要求1所述的阵列基板的制备方法,其特征在于,所述第一电极层包括两层导电层,所述两层导电层分别为第一导电层和第二导电层,所述在衬底基板上依次沉积第一电极层和栅极金属层具体包括:
在所述衬底基板上沉积所述第二导电层,且所述第二导电层的刻蚀速率大于所述第一导电层的刻蚀速率;
在所述第二导电层上沉积所述第一导电层;
在所述第一导电层上沉积所述栅极金属层。
4.如权利要求1所述的阵列基板的制备方法,其特征在于,所述对第一电极层进行刻蚀具体包括:
对所述第一电极层中的每层采用同一次刻蚀工艺进行刻蚀。
5.如权利要求1所述的阵列基板的制备方法,其特征在于,所述对第一电极层进行刻蚀具体包括:
对所述第一电极层中的每层分别采用独立的刻蚀工艺进行刻蚀。
6.如权利要求1~5任一项所述的阵列基板的制备方法,其特征在于,所述第一导电层的材料为a-ITO非晶氧化铟锡或p-ITO多晶氧化铟锡或ITO氧化铟锡或Ag银。
7.如权利要求6所述的阵列基板的制备方法,其特征在于,所述第二导电层的材料为IGZO铟镓锌氧化物或IZO氧化铟锌或ZnNO氮氧化锌或ITZO铟镓锡氧化物。
8.一种阵列基板,其特征在于,所述阵列基板采用如权利要求1~7任一项所述的阵列基板的制备方法制备而成。
9.一种显示装置,其特征在于,包括:如权利要求8所述的阵列基板。
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