CN105280514A - Method for detecting SiGe residue - Google Patents
Method for detecting SiGe residue Download PDFInfo
- Publication number
- CN105280514A CN105280514A CN201510663115.3A CN201510663115A CN105280514A CN 105280514 A CN105280514 A CN 105280514A CN 201510663115 A CN201510663115 A CN 201510663115A CN 105280514 A CN105280514 A CN 105280514A
- Authority
- CN
- China
- Prior art keywords
- germanium silicon
- stack
- silicon
- germanium
- etching gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
Abstract
The invention relates to the technical field of semiconductor manufacturing and particularly to a method for detecting SiGe residue. Under the deposition condition that etching gas is released, SiGe deposition is carried out on a silicon chip and a first SiGe stack is formed. Then under the deposition condition that the etching gas is cut off, SiGe deposition is carried out again on a silicon chip and a second SiGe stack is formed. The etching rate of the etching gas is calculated on the basis of thickness of the first SiGe stack and the second SiGe stack. Thereafter the etching rate of the etching gas is subjected to long-term monitoring, and a reasonable fluctuation range is decided, so that SiGe deposition residue can be prevented through long-term monitoring. The method can effectively detect residue left on a hard mask layer by SiGe deposition techniques to ensure safety of a product.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to a kind of method detected germanium silicon and remain.
Background technology
As everyone knows, the performance of cmos circuit to a great extent by the restriction of PMOS, therefore, if any technology can all be considered to favourable the level that the performance of PMOS brings up to NMOS.In the PMOS of 90nm, the source of device, water clock etching off remove by the engineer of Intel, then deposit germanium silicon layer again, such source and leak and will produce a compression stress to raceway groove, thus improve the transmission characteristic of PMOS.As shown in Figure 1, germanium silicon source/drain is implanted and caused strain gauge technique is by germanium silicon mosaic to source-drain area, thus produces compressive deformation at raceway groove place, improves the carrier mobility of PMOS transistor, and the raising of carrier mobility can cause high drive current, improve transistor performance.
At silicon (Si) Grown germanium-silicon thin membrane, the technique of developing strain layer and epitaxial process, if usual interfacial concentration difference is excessive or flute surfaces existing defects, germanium silicon can not form good mono-crystalline structures, and as shown in Figure 2, the strain (strain) accumulated in film can cause crystal-plane slip, interface atoms is arranged stagger, strain sharply discharges, and produces a large amount of defect in the film, causes deformation relaxation.
Existing epitaxy technique flow process mainly comprises: carry out wet-cleaned before extension; Chamber etching and overlay film; H2 baking before epitaxial growth; Germanium siliceous deposits.After epitaxial growth, produce defect source at interface, serious defect may be extended to the growing surface of germanium silicon.Every one deck that germanium silicon stack folds deposition in theory all should have very high etching deposition rate on hard mask, thus ensures zero growth of film on hard mask.But, due to the fluctuation of technological parameter and board performance, often occur that etch rate on hard mask declines or the rising of deposition rate, etch rate is caused to be less than growth rate, thus cause the growth of film on hard mask, bring residual, this is that those skilled in the art are reluctant to see.
Summary of the invention
For above-mentioned Problems existing, the invention discloses a kind of method detected germanium silicon and remain, comprise the steps:
Step S1, provides a silicon chip, and the surface of described silicon chip is provided with hard mask and germanium silicon growth district;
Step S2, forms the first germanium silicon stack and folds under the sedimentary condition of opening etching gas in described germanium silicon growth district;
Step S3, forms the second germanium silicon stack and folds under the sedimentary condition of closing described etching gas in described germanium silicon growth district;
Step S4, the thickness that the second germanium silicon stack is folded according to described first germanium silicon stack superimposition obtains the etch rate of described etching gas;
Step S5, is remained by the germanium silicon monitored on the described hard mask of etch rate detecting of described etching gas.
The method that above-mentioned detecting germanium silicon is residual, wherein, described step S2 specifically comprises:
S21, by described chip transmission in deposition chamber;
S22, forms described first germanium silicon stack in described germanium silicon growth district deposition and folds under the sedimentary condition of opening etching gas;
S23, shifts out described deposition chamber by described silicon chip, and folds described first germanium silicon stack and measure to obtain the folded thickness of described first germanium silicon stack.
The method that above-mentioned detecting germanium silicon is residual, wherein, described step S3 specifically comprises:
S31, transfers to again by described silicon chip in described deposition chamber;
S22, forms described second germanium silicon stack in described germanium silicon growth district deposition and folds under the sedimentary condition of closing described etching gas;
S23, shifts out described deposition chamber by described silicon chip, and stacks described second germanium silicon stack and measure to obtain the folded thickness of described second germanium silicon stack.
The method that above-mentioned detecting germanium silicon is residual, wherein, the sedimentation time that in described step S2, in step S3 described in the described first germanium silicon stack superimposition of deposition formation, deposition forms described second germanium silicon stack folded is identical.
The method that above-mentioned detecting germanium silicon is residual, wherein, described silicon chip is mating plate or pattern piece.
The method that above-mentioned detecting germanium silicon is residual, wherein, described in described first germanium silicon stack superimposition, the second germanium silicon stack folds the subcrystal layer, germanium silicon layer and the silicon cap layer that include and set gradually according to order from bottom to up.
The method that above-mentioned detecting germanium silicon is residual, it is characterized in that, the material of described hard mask is silicon nitride.
Foregoing invention tool has the following advantages or beneficial effect:
The invention discloses a kind of method detected germanium silicon and remain, the first germanium silicon stack poststack is formed by carrying out germanium siliceous deposits to silicon chip under the sedimentary condition of opening etching gas, continue close etching gas condition under to this silicon chip again carry out germanium siliceous deposits formed the second germanium silicon stack fold, and the etch rate of etching gas is extrapolated according to the thickness that the first germanium silicon stack superimposition second germanium silicon stack is folded, remained by the germanium silicon on the described hard mask of etch rate detecting of monitoring etching gas afterwards, thus ensure the stability of technique, for the safety of product adds counterweight.
Accompanying drawing explanation
By reading the detailed description done non-limiting example with reference to the following drawings, the present invention and feature, profile and advantage will become more apparent.Mark identical in whole accompanying drawing indicates identical part.Proportionally can not draw accompanying drawing, focus on purport of the present invention is shown.
Fig. 1 is that in background technology of the present invention, germanium silicon source/drain implants the schematic diagram causing the PMOS structure of strain gauge technique;
Fig. 2 is the structural representation that in background technology of the present invention, lattice mismatch forms dislocation defects;
Fig. 3 is the silicon chip structural representation after forming germanium siliceous deposits in the present invention;
Fig. 4 is the flow chart detecting the method that germanium silicon remains in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment, the present invention is further illustrated, but not as limiting to the invention.
As shown in Figure 3, germanium siliceous deposits can be subdivided into the film growth of three steps; Step one, the deposition (seedlayerdeposition) of subcrystal layer, step 2, the deposition (SiGebulklayerdeposition) of germanium silicon layer, step 3, the deposition (Sicappinglayerdeposition) of silicon cap.In theory, subcrystal layer, germanium silicon layer and silicon cap layer all should have very high etching deposition rate on hard mask, thus ensure zero growth of film on hard mask.But due to the fluctuation of technological parameter and board performance, the etch rate often occurring on hard mask declines or the rising of deposition rate, causes etch rate to be less than growth rate, thus causes the growth of film on hard mask, bring residual; This is just starved of an early warning system or method remains to the germanium silicon detecting film on hard mask, thus ensures the safety of product.
As shown in Figure 4, present embodiment discloses and the invention discloses a kind of method detected germanium silicon and remain, comprise the steps:
Step one, provides a silicon chip, and the surface of silicon chip is provided with hard mask and germanium silicon growth district; In the present invention's preferred embodiment, this silicon chip is mating plate or pattern piece, and this silicon chip is through pretreated silicon chip, and this pretreated silicon chip can for carrying out wet-cleaned according to concrete technology demand; Chamber etching and overlay film; H2 toasts; Preferably, the material of this hard mask is silicon nitride.
Step 2, forms the first germanium silicon stack and folds under the sedimentary condition of opening etching gas in germanium silicon growth district; Wherein, the subcrystal layer, germanium silicon layer and the silicon cap layer that set gradually according to order are from bottom to up drawn together in first germanium silicon stack stacked package, because the step depositing this subcrystal layer, germanium silicon layer and silicon cap layer on silicon chip is successively well known to those skilled in the art, at this, just it will not go into details.
In a preferred embodiment of the invention, this step 2 specifically comprises: first by chip transmission in deposition chamber; Secondly fold in germanium silicon growth district deposition formation first germanium silicon stack under the sedimentary condition of opening etching gas, then silicon chip is shifted out deposition chamber, and the first germanium silicon stack is folded measure to obtain the folded thickness of the first germanium silicon stack.
Step 3, under the sedimentary condition of closing etching gas, form the second germanium silicon stack in germanium silicon growth district fold, wherein, the subcrystal layer, germanium silicon layer and the silicon cap layer that set gradually according to order are from bottom to up drawn together in the second germanium silicon stack stacked package.In an embodiment of the present invention, sedimentary condition in step 3 is except closing etching gas, other sedimentary conditions are all identical with step 2, and the sedimentation time depositing formation second germanium silicon stack folded in the described first germanium silicon stack superimposition above-mentioned steps two of deposition formation in step 3 is identical.
In a preferred embodiment of the invention, this step 2 specifically comprises: first again transferred in deposition chamber by silicon chip; Secondly fold in germanium silicon growth district deposition formation second germanium silicon stack under the sedimentary condition of closing etching gas, then silicon chip is shifted out deposition chamber, and the second germanium silicon stack is stacked to the thickness measuring to obtain the second germanium silicon stack and fold.
Step 4, according to the etch rate of the thickness acquisition etching gas that the first germanium silicon stack superimposition second germanium silicon stack is folded, suppose in above-mentioned steps two and step 3, the thickness gauge that first germanium silicon stack is folded is A, the thickness gauge that second germanium silicon stack is folded is B, then the etch rate of etching gas is (B-2A)/sedimentation time, and wherein the unit of sedimentation time is second (S).
Step 5, the germanium silicon detected on hard mask by the etch rate monitoring etching gas is remained; Long-term monitoring is carried out to the etch rate of etching gas, and makes rational fluctuation range (the rational fluctuation range of this etch rate can be set out according to the empirical value in concrete technology), the existence preventing deposit Germanium silicon residual can be monitored for a long time.
In the present invention's preferred embodiment, the first germanium silicon stack superimposition second germanium silicon stack folds the subcrystal layer, germanium silicon layer and the silicon cap layer that include and set gradually according to order from bottom to up.
The invention discloses a kind of method detected germanium silicon and remain, the first germanium silicon stack poststack is formed by carrying out germanium siliceous deposits to silicon chip under the sedimentary condition of opening etching gas, continue close etching gas condition under to this silicon chip again carry out germanium siliceous deposits formed the second germanium silicon stack fold, and the etch rate of etching gas is extrapolated according to the thickness that the first germanium silicon stack superimposition second germanium silicon stack is folded, afterwards long-term monitoring is carried out to the etch rate of etching gas, make rational fluctuation range, the existence preventing deposit Germanium silicon residual can be monitored for a long time; The method effectively can detect germanium siliceous deposits technique remaining on hard mask, thus ensures the safety of product.
It should be appreciated by those skilled in the art that those skilled in the art are realizing change case in conjunction with prior art and above-described embodiment, do not repeat at this.Such change case does not affect flesh and blood of the present invention, does not repeat them here.
Above preferred embodiment of the present invention is described.It is to be appreciated that the present invention is not limited to above-mentioned particular implementation, the equipment wherein do not described in detail to the greatest extent and structure are construed as to be implemented with the common mode in this area; Any those of ordinary skill in the art, do not departing under technical solution of the present invention ambit, the Method and Technology content of above-mentioned announcement all can be utilized to make many possible variations and modification to technical solution of the present invention, or being revised as the Equivalent embodiments of equivalent variations, this does not affect flesh and blood of the present invention.Therefore, every content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belongs in the scope of technical solution of the present invention protection.
Claims (7)
1. detect the method that germanium silicon is residual, it is characterized in that, comprise the steps:
Step S1, provides a silicon chip, and the surface of described silicon chip is provided with hard mask and germanium silicon growth district;
Step S2, forms the first germanium silicon stack and folds under the sedimentary condition of opening etching gas in described germanium silicon growth district;
Step S3, forms the second germanium silicon stack and folds under the sedimentary condition of closing described etching gas in described germanium silicon growth district;
Step S4, the thickness that the second germanium silicon stack is folded according to described first germanium silicon stack superimposition obtains the etch rate of described etching gas;
Step S5, is remained by the germanium silicon monitored on the described hard mask of etch rate detecting of described etching gas.
2. the method that detecting germanium silicon as claimed in claim 1 is residual, it is characterized in that, described step S2 specifically comprises:
S21, by described chip transmission in deposition chamber;
S22, forms described first germanium silicon stack in described germanium silicon growth district deposition and folds under the sedimentary condition of opening described etching gas;
S23, shifts out described deposition chamber by described silicon chip, and folds described first germanium silicon stack and measure to obtain the folded thickness of described first germanium silicon stack.
3. the method that detecting germanium silicon as claimed in claim 2 is residual, it is characterized in that, described step S3 specifically comprises:
S31, transfers to again by described silicon chip in described deposition chamber;
S22, forms described second germanium silicon stack in described germanium silicon growth district deposition and folds under the sedimentary condition of closing described etching gas;
S23, shifts out described deposition chamber by described silicon chip, and stacks described second germanium silicon stack and measure to obtain the folded thickness of described second germanium silicon stack.
4. the method that detecting germanium silicon as claimed in claim 1 is residual, is characterized in that, the sedimentation time that in described step S2, in step S3 described in the described first germanium silicon stack superimposition of deposition formation, deposition forms described second germanium silicon stack folded is identical.
5. the method that detecting germanium silicon as claimed in claim 1 is residual, it is characterized in that, described silicon chip is mating plate or pattern piece.
6. the method that detecting germanium silicon as claimed in claim 1 is residual, it is characterized in that, described in described first germanium silicon stack superimposition, the second germanium silicon stack folds the subcrystal layer, germanium silicon layer and the silicon cap layer that include and set gradually according to order from bottom to up.
7. the method that detecting germanium silicon as claimed in claim 1 is residual, it is characterized in that, the material of described hard mask is silicon nitride.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510663115.3A CN105280514B (en) | 2015-10-14 | 2015-10-14 | A kind of method for detecting germanium silicon residual |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510663115.3A CN105280514B (en) | 2015-10-14 | 2015-10-14 | A kind of method for detecting germanium silicon residual |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105280514A true CN105280514A (en) | 2016-01-27 |
| CN105280514B CN105280514B (en) | 2018-01-26 |
Family
ID=55149316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510663115.3A Active CN105280514B (en) | 2015-10-14 | 2015-10-14 | A kind of method for detecting germanium silicon residual |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105280514B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520852A (en) * | 2018-06-04 | 2018-09-11 | 睿力集成电路有限公司 | A kind of abnormality of head monitoring system and method for plasma etching |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6326313B1 (en) * | 1999-04-21 | 2001-12-04 | Advanced Micro Devices | Method and apparatus for partial drain during a nitride strip process step |
| JP2003077888A (en) * | 2001-08-31 | 2003-03-14 | Shibaura Mechatronics Corp | METHOD FOR ETCHING SiGe FILM |
| CN104425298A (en) * | 2013-08-22 | 2015-03-18 | 北京兆易创新科技股份有限公司 | Method for etching memory cell opening of flash memory |
| CN104465387A (en) * | 2013-09-24 | 2015-03-25 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device |
-
2015
- 2015-10-14 CN CN201510663115.3A patent/CN105280514B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6326313B1 (en) * | 1999-04-21 | 2001-12-04 | Advanced Micro Devices | Method and apparatus for partial drain during a nitride strip process step |
| JP2003077888A (en) * | 2001-08-31 | 2003-03-14 | Shibaura Mechatronics Corp | METHOD FOR ETCHING SiGe FILM |
| CN104425298A (en) * | 2013-08-22 | 2015-03-18 | 北京兆易创新科技股份有限公司 | Method for etching memory cell opening of flash memory |
| CN104465387A (en) * | 2013-09-24 | 2015-03-25 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520852A (en) * | 2018-06-04 | 2018-09-11 | 睿力集成电路有限公司 | A kind of abnormality of head monitoring system and method for plasma etching |
| CN108520852B (en) * | 2018-06-04 | 2023-06-27 | 长鑫存储技术有限公司 | System and method for monitoring abnormality of spray head in plasma etching |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105280514B (en) | 2018-01-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104201108B (en) | The manufacture method of SiGe source /drain region | |
| FR2977260B1 (en) | PROCESS FOR PRODUCING A THICK EPITAXIAL LAYER OF GALLIUM NITRIDE ON A SILICON SUBSTRATE OR THE LIKE AND LAYER OBTAINED BY SAID METHOD | |
| WO2006113442A8 (en) | Wafer separation technique for the fabrication of free-standing (al, in, ga)n wafers | |
| DE102009051520A1 (en) | Process for the production of silicon semiconductor wafers with layer structures for the integration of III-V semiconductor devices | |
| CN102201335A (en) | Manufacturing method of grid of MOS (metal oxide semiconductor) transistor with stable stress | |
| WO2014130164A1 (en) | REO GATE DIELECTRIC FOR III-N DEVICE ON Si SUBSTRATE | |
| EP2930752A2 (en) | Method for manufacturing a transistor device | |
| WO2017016527A3 (en) | Gaas thin film grown on si substrate, and preparation method for gaas thin film grown on si substrate | |
| CN102383192B (en) | Growth method of germanium substrate and germanium substrate | |
| CN203055915U (en) | Tensile-strain germanium film | |
| WO2012158593A3 (en) | SUPPRESSION OF INCLINED DEFECT FORMATION AND INCREASE IN CRITICAL THICKNESS BY SILICON DOPING ON NON-C-PLANE (Al,Ga,In)N | |
| US10134896B2 (en) | Cyclic deposition etch chemical vapor deposition epitaxy to reduce EPI abnormality | |
| CN102945793A (en) | Pre-cleaning method for epitaxial growth of Ge-Si stress layer | |
| CN105280514A (en) | Method for detecting SiGe residue | |
| CN102543667A (en) | Forming method of graph of aligned layer on silicon chip | |
| CN106611738A (en) | Method of preparing III-V compound-on-insulator substrate | |
| CN105810725A (en) | Silicon-based gallium nitride semiconductor wafer and manufacturing method thereof | |
| CN104851783B (en) | A kind of germanium silicon boron outer layer growth method | |
| MY165316A (en) | Layered semiconductor substrate and method for manufacturing it | |
| CN103943507A (en) | Embedded germanium-silicon epitaxy dislocation fault improving method | |
| CN104362080A (en) | Method for growing GaN-base thin film materials on Si substrate selectively | |
| EP2620984B1 (en) | Method for straining a thin pattern and method for manufacturing a transistor including said method | |
| CN101882570A (en) | Method for improving alignment precision after epitaxial growth | |
| CN105529266A (en) | Improvement method for dislocation defects of embedded silicon-germanium epitaxy | |
| CN102437158B (en) | Cmos semiconductor device and manufacture method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |