CN105187745A - High definition video OSD menu superposition module based on FPGA and method - Google Patents
High definition video OSD menu superposition module based on FPGA and method Download PDFInfo
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- CN105187745A CN105187745A CN201510539451.7A CN201510539451A CN105187745A CN 105187745 A CN105187745 A CN 105187745A CN 201510539451 A CN201510539451 A CN 201510539451A CN 105187745 A CN105187745 A CN 105187745A
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Abstract
The invention is applicable to the video image processing technology field. The invention discloses a high definition video OSD menu superposition module based on FPGA and a method. A special-purpose character chip is superposed in a video stream; the OSD menu superposition module comprises a soft core processor and an OSD controller; the OSD controller is connected to video input and video output; and the main port and the slave port of the OSD controller are connected to the main port of the soft core processor and a slave port of a storage device. Through the modification of the code, the character superposition can be more easily displayed on the high definition display or on the super high definition display, code transplantation is easy, the flexibility and expandability can be fully realized, and the poor reliability of adopting a single-chip microcomputer to control time series can be avoided.
Description
Technical field
The present invention relates to technical field of video image processing, particularly relate to a kind of HD video OSD menu laminating module based on FPGA and method.
Background technology
OSD(On-ScreenDisplay, screen menu type regulative mode) technology produces some characters or figure on the display screen, a kind of technology helping user to understand designer to convey a message.
OSD menu conventional is at present substantially all be added in video flowing by Single-chip Controlling special character chip, because OSD technology requires very high to synchronous sequence, and adopt the reliability of Single-chip Controlling sequential poor, therefore this scheme is mainly used in SD OSD technology, cannot be applicable to high definition, ultra high-definition technology.
Summary of the invention
The technical problem that the present invention mainly solves is to provide a kind of HD video OSDOSD menu laminating module based on FPGA and method, and this processing system for video easilier can realize character adding in high definition and ultra high-definition display.
In order to solve the problems of the technologies described above, the invention provides a kind of HD video OSD menu laminating module method based on FPGA, should based on the HD video OSD treatment system of FPGA, special character chip is added in video flowing, this OSD menu laminating module comprises soft-core processor and osd controller, this osd controller is connected with video input and video frequency output respectively, this osd controller from port and master port respectively with the master port of soft-core processor and being connected from port of memory.
Say further, described memory is synchronous DRAM.
Say further, FPGA flush bonding processor is NiosII processor.
The present invention also provides a kind of HD video OSD menu stacking method based on FPGA, should comprise based on the HD video OSD menu stacking method of FPGA:
Set up the standard character library of Resolutions type matrix;
Inquiry needs the type matrix of display;
Calculate menu drawing field territory;
Display type matrix menu.
Say further, the described standard character library step setting up Resolutions type matrix comprises: the type matrix making two standard character libraries, the pixel size that takies of a character be 1080 forms of 32*32, the pixel size that character takies is 720 forms of 24*24, after powering on, soft-core processor opens up the type matrix of one section of space storage standards character library in memory internal memory.
Say further, described calculating menu drawing field territory step comprises: the display menu instruction sent to osd controller by processor, the position residing for type matrix, calculates the region of menu display.
Say further, described display type matrix recipe steps comprises: the character pattern data read is replaced the video data in menu area by osd controller, gives display show at the effective video mixed outside menu area formed by menu area and video superimpose.
The present invention is based on the HD video OSD menu laminating module of FPGA, special character chip is added in video flowing, this OSD menu laminating module comprises soft-core processor and osd controller, this osd controller is connected with video input and video frequency output respectively, this osd controller from port and master port respectively with the master port of soft-core processor and being connected from port of memory.Owing to can realize character adding by amendment source code is easier in high definition and ultra high-definition display, be easy to the transplanting of code, its flexibility and extensibility are not fully exerted, and avoid the shortcoming adopting the reliability of Single-chip Controlling sequential poor.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, and the accompanying drawing in describing is some embodiments of the present invention, to those skilled in the art, under the prerequisite not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the HD video OSD menu laminating module embodiment principle schematic based on FPGA.
Fig. 2 is the HD video OSD menu stacking method flow chart based on FPGA.
Below in conjunction with embodiment, and with reference to accompanying drawing, the realization of the object of the invention, functional characteristics and advantage are described further.
Embodiment
In order to make the object of invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is a part of embodiment of invention, instead of whole embodiments.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the prerequisite not making creative work, all belongs to the scope of protection of the invention.
As shown in Figure 1, the invention provides a kind of HD video OSD menu laminating module embodiment based on FPGA.
Based on the HD video OSD menu laminating module of FPGA, special character chip is added in video flowing, this OSD menu laminating module comprises soft-core processor 202 and osd controller 203, this osd controller 203 is connected with video input 201 and video frequency output 205 respectively, this osd controller 203 from port and master port respectively with the master port of soft-core processor 202 and being connected from port of memory 204.
Specifically, described soft-core processor 202 adopts FPGA(Field-ProgrammableGateArray, field programmable gate array) flush bonding processor, such as NiosII processor.Described memory is SDRAM memory, wherein SDRAM(SynchronousDynamicRandomAccessMemory, synchronous DRAM).
Described soft-core processor 202, as SOPC(System-on-a-Programmable-Chip is responsible for by NiosII processor, i.e. programmable system on chip) in each module allotment and to arm processor, as risc microcontroller serial ports instruction and decode.The GB that soft-core processor 202 sends over according to the serial ports of arm processor, searches for the type matrix of corresponding character in character library, and is stored in by these type matrixes in a buffer; The first address of buffer is told osd controller 203 by soft-core processor 202, and osd controller reads the character pattern data stored in a buffer; After osd controller 203 receives the display menu instruction of arm processor transmission, the position residing for pixel, calculates the region of menu display; The character pattern data read is replaced the video data in menu area by osd controller 203, and the effective video outside mixing menu area gives display display.
Owing to adopting ASIC(ApplicationSpecificIntegratedCircuit, application-specific IC) and FPGA(Field-ProgrammableGateArray, field programmable gate array) character adding can be realized by amendment source code is easier in high definition and ultra high-definition display, be easy to the transplanting of code, its flexibility and extensibility are not fully exerted, avoid adopting the reliability of Single-chip Controlling sequential poor, the system led cannot be applicable to the shortcoming of high definition, ultra high-definition technology.
As shown in Figure 2, the present invention also provides a kind of HD video OSD menu stacking method embodiment based on FPGA.
Should comprise based on the HD video OSD processing method of FPGA:
S10 step, set up the standard character library of Resolutions type matrix, specifically, present high definition comprises 1080 and 720 Resolutions, in order to make character and the image size coupling of display, need the type matrix of making two standard character libraries, the pixel size that a character of 1080 forms takies is 32*32, the pixel size that a character of 720 forms takies is 24*24, after system electrification, soft-core processor can open up the type matrix of one section of space storage standards character library in memory internal memory, described memory can adopt DDR2SDRAM(DoubleDataRate2SynchronousDynamicRandomAccessM emory, second generation double data rate Synchronous Dynamic Random Access Memory), described soft-core processor adopts NiosII processor,
S11 step, inquiry needs the type matrix of display, specifically, and the GB sent according to the serial ports of arm processor by FPGA, set up from S10 step the type matrix searching for corresponding character the standard character library of Resolutions type matrix, and the type matrix inquired stores in both the buffers; Adopt the soft-core processor of NiossII processor that the first address of the buffer storing inquiry type matrix is sent to osd controller, and read the character pattern data stored in both the buffers, described type matrix generates type matrix according to GB, and the address increment order of type matrix is putting in order according to GB.
S12 step, calculates menu drawing field territory, the display menu instruction sent to osd controller by arm processor, the position residing for type matrix, calculates the region of menu display;
S13 step, display type matrix menu, the character pattern data read is replaced the video data in menu area by osd controller, gives display show at the effective video mixed outside menu area formed by menu area and video superimpose.
Character adding can be realized by amendment source code is easier in high definition and ultra high-definition display owing to adopting ASIC and FPGA, be easy to the transplanting of code, its flexibility and extensibility are not fully exerted, and avoid the shortcoming adopting the reliability of Single-chip Controlling sequential poor.
In effective video region and the position of specifying, image information is replaced to corresponding character information or image information according to design idea, first need the character pattern data obtaining character or image in menu; Secondly, the position of accurate Calculation display character, namely determines the column locations of character, thus determines the dot matrix sequential of output character image; Finally, replace video data with character pattern data and export with video flowing, realize OSD character picture overlaying function, be easy to the transplanting of code, its flexibility and extensibility are not fully exerted, avoid adopting the reliability of Single-chip Controlling sequential poor, the system led cannot be applicable to the shortcoming of high definition, ultra high-definition technology.
Above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or equivalent replacement is carried out to wherein portion of techniques feature, and these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (7)
1. based on the HD video OSD menu laminating module of FPGA, special character chip is added in video flowing, this OSD menu laminating module comprises soft-core processor and osd controller, this osd controller is connected with video input and video frequency output respectively, this osd controller from port and master port respectively with the master port of soft-core processor and being connected from port of memory.
2. the HD video OSD menu laminating module based on FPGA according to claim 1, is characterized in that: described memory is synchronous DRAM.
3. the HD video OSD menu laminating module based on FPGA according to claim 1 and 2, is characterized in that: described soft-core processor is NiosII processor.
4. the menu stacking method of OSD menu laminating module according to claim 1, comprises,
Set up the standard character library of Resolutions type matrix;
Inquiry needs the type matrix of display;
Calculate menu drawing field territory;
Display type matrix menu.
5. according to claim 4 based on the HD video OSD menu stacking method of FPGA, it is characterized in that, the described standard character library step setting up Resolutions type matrix comprises: the type matrix making two standard character libraries, the pixel size that takies of a character be 1080 forms of 32*32, the pixel size that character takies is 720 forms of 24*24, after powering on, soft-core processor opens up the type matrix of one section of space storage standards character library in memory internal memory.
6. according to claim 4 based on the HD video OSD menu stacking method of FPGA, it is characterized in that, described calculating menu drawing field territory step comprises: the display menu instruction sent to osd controller by processor, the position residing for type matrix, calculates the region of menu display.
7. according to claim 4 based on the HD video OSD menu stacking method of FPGA, it is characterized in that, described display type matrix recipe steps comprises: the character pattern data read is replaced the video data in menu area by osd controller, gives display show at the effective video mixed outside menu area formed by menu area and video superimpose.
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| CN109271077A (en) * | 2018-09-14 | 2019-01-25 | 北京遥感设备研究所 | A kind of thermal infrared imager man-machine interaction method based on FPGA |
| CN109743515A (en) * | 2018-11-27 | 2019-05-10 | 中国船舶重工集团公司第七0九研究所 | A kind of asynchronous video fusion overlapping system and method based on soft core platform |
| CN110012249A (en) * | 2019-04-16 | 2019-07-12 | 广东欧谱曼迪科技有限公司 | A kind of method and system of couple of 4K real-time video addition OSD |
| CN110798632A (en) * | 2019-11-28 | 2020-02-14 | 苏州长风航空电子有限公司 | OSD menu realization method based on FPGA |
| CN113014838A (en) * | 2021-03-03 | 2021-06-22 | 北京工业大学 | Multi-format high-speed digital video fusion system based on FPGA |
| CN114125538A (en) * | 2021-12-23 | 2022-03-01 | 北京德为智慧科技有限公司 | OSD menu control method, device and equipment |
| CN114257758A (en) * | 2020-09-25 | 2022-03-29 | 湖北视拓光电科技有限公司 | Efficient human-computer interface superposition method based on FPGA |
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| CN113014838A (en) * | 2021-03-03 | 2021-06-22 | 北京工业大学 | Multi-format high-speed digital video fusion system based on FPGA |
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