CN105187056B - A kind of clock signal generating device and clock signal creating method - Google Patents
A kind of clock signal generating device and clock signal creating method Download PDFInfo
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- CN105187056B CN105187056B CN201510560159.3A CN201510560159A CN105187056B CN 105187056 B CN105187056 B CN 105187056B CN 201510560159 A CN201510560159 A CN 201510560159A CN 105187056 B CN105187056 B CN 105187056B
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Abstract
The invention discloses a kind of clock signal generating device and clock signal creating method, described device includes: external time service module；Internal time service module；Detection module is connect with the external time service module and the internal time service module；Clock signal output module；Wherein, when the detection module determines that the external time signal for inputting the external time service module is in normal condition, it controls the clock signal generating device and is in external time service mode, the clock signal output module is based on the external time signal and generates and export the first clock signal；When the detection module determines that the external time signal is in abnormal state, it controls the clock signal generating device and is in internal time service mode, the clock signal output module is generated based on the internal reference signal for inputting the internal time service module and exports second clock signal.
Description
Technical field
The present invention relates to electronic technology field, in particular to a kind of clock signal generating device and clock signal generation side
Method.
Background technique
Phase noise directly influences the receiver sensitivity of radar system, the resolution ratio of receiver bandwidth and radar,
And the reference clock source of low phase noise is the basis for realizing low phase noise radar system；Meanwhile in order to improve built-in system
With the communication quality of external system, the clock signal synchronization for the clock signal and external system that built-in system uses is often required that；
In addition, we generally require external high accurate clock signal in system in order to guarantee work that system can be steady in a long-term
The reference clock in portion is calibrated.
Currently, in order to realize this high-precision low phase noise synchronous clock source, traditional mode is by external height
Accuracy clock is as reference clock, which generally selects GPS, and (Global Positioning System, the whole world are fixed
Position system) time signal, or generated using high-precision atomic clock, lock the internal crystalline substance with higher short-term stability
Oscillation body device, principle are as shown in Figure 1.
However, present inventor during inventive technique scheme, has found above-mentioned skill in realizing the embodiment of the present application
Art at least has the following technical problems:
If external high precision clock selects GPS time signal, probably due to the position where radar system receives
Less than GPS signal, the clock source of radar system is caused to can not work normally, so that entire radar system can not all work；If
External high precision clock selects atomic clock, then can be at high cost due to atomic clock, and volume is big, factors will affect thunder to weight again etc.
Up to the realization of system.As it can be seen that the technical problems existing in the prior art are: when realizing high-precision low phase noise clock source,
Reliability is low, higher cost.
Summary of the invention
The embodiment of the present invention provides a kind of clock signal generating device and clock signal creating method, for solving existing skill
The technical issues of high-precision low phase noise clock source present in art, reliability is low, higher cost.
On the one hand, the embodiment of the present application provides a kind of clock signal generating device, and described device includes:
External time service module；
Internal time service module；
Detection module is connect with the external time service module and the internal time service module；
Clock signal output module；
Wherein, when the detection module determines that the external time signal of the input external time service module is in normal condition
When, it controls the clock signal generating device and is in external time service mode, the clock signal output module is based on the outside
Time signal generates and exports the first clock signal；
When the detection module determines that the external time signal is in abnormal state, it is raw to control the clock signal
It is in internal time service mode at device, the clock signal output module is based on the internal reference for inputting the internal time service module
Signal generates and exports second clock signal.
Optionally, the detection module includes:
First power splitter, for the external time signal to be divided into first via time signal and the second road time signal；
Wave detector is connect with first power splitter, and the wave detector is used to be generated according to the first via time signal
And export output voltage corresponding with the outside power of time signal；
Comparator is connect with the wave detector, and the comparator is used for the output voltage and pre-set ratio
Compared with voltage；
Single-pole double-throw switch (SPDT), the first end of the single-pole double-throw switch (SPDT) are connect with the comparator, and the single-pole double throw is opened
The cutter head of pass is connect with the external time service module or the internal time service module；
Wherein, when the output voltage is more than or equal to the comparison voltage, the single-pole double-throw switch (SPDT) is controlled
Cutter head is connect with the external time service module, so that the clock signal generating device is in the external time service mode；Institute
When stating output voltage less than the comparison voltage, the cutter head and the internal time service module for controlling the single-pole double-throw switch (SPDT) connect
It connects, so that the clock signal generating device is in the internal time service mode.
Optionally, the external time service module includes:
Phase-locked loop circuit is connect with first power splitter；The phase-locked loop circuit is used for according to second tunnel time service
Signal exports the first voltage-controlled voltage.
Optionally, the internal time service module includes:
Bleeder circuit, the bleeder circuit are connect with the crystal oscillator in the clock signal output module, and described point
Volt circuit is for dividing the internal reference signal, to export the second voltage-controlled voltage；Wherein, the internal reference signal
The reference voltage for generating and exporting according to inherent parameters for the crystal oscillator.
Optionally, clock signal output module includes:
Crystal oscillator is connect with the second end of the single-pole double-throw switch (SPDT), and the crystal oscillator is used for described the
An original clock signal is exported under the control of one voltage-controlled voltage or the second voltage-controlled voltage；
Second power splitter is connect with the crystal oscillator, and second power splitter is used for the original clock signal
It is divided into first via original clock signal and the second road original clock signal；
Filtering and amplifying circuit is connect with second power splitter, and the filtering and amplifying circuit is used for former to the first via
Beginning clock signal is amplified and is filtered, and exports first clock signal or the second clock signal.
Optionally, second power splitter is connect with the phase-locked loop circuit.
On the other hand, the embodiment of the present application also provides a kind of clock signal generation method, comprising:
Detection module detection in clock signal generating device inputs the external time service mould of the clock signal generating device
The external time signal of block is to be in abnormal state in normal condition；
When the external time signal is in the normal condition, controls the clock signal generating device and be in outside
Time service mode, and the external time signal is based on by the clock signal output module in clock signal generating device and is generated simultaneously
Export the first clock signal；
When the external time signal is in the abnormal state, controls the clock signal generating device and be in interior
Portion's time service mode, and it is raw based on the internal reference signal for inputting the internal time service module by the clock signal output module
At and export second clock signal.
Optionally, the detection module detection in clock signal generating device inputs the outside of the clock signal generating device
The external time signal of time service module is to be in abnormal state in normal condition, comprising:
The external time signal is divided into first via time signal and the second road time signal in the detection module；Root
According to first via time signal output output voltage corresponding with the outside power of time signal；And the output
Voltage and pre-set comparison voltage；
Wherein, it when the output voltage is more than or equal to the comparison voltage, determines at the external time signal
In normal condition；When the output voltage is less than the comparison voltage, determine that the external time signal is in abnormal shape
State.
Optionally, it controls the clock signal generating device and is in external time service mode, and generated and filled by clock signal
Clock signal output module in setting is based on the external time signal and generates and export the first clock signal, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the external time service module, so that when described
Clock signal generating apparatus is in the external time service mode；
The external time service module is based on the external time signal and generates the first voltage-controlled voltage；
The clock signal output module generates under the control of the described first voltage-controlled voltage and exports first clock
Signal.
Optionally, it controls the clock signal generating device and is in internal time service mode, and is defeated by the clock signal
Module is generated based on the internal reference signal for inputting the internal time service module and exports second clock signal out, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the internal time service module, so that when described
Clock signal generating apparatus is in the internal time service mode；
Internal reference of the internal time service module based on the crystal oscillator output in the clock signal output module
Signal generates and exports the second voltage-controlled voltage；
The clock signal output module generates under the control of the described second voltage-controlled voltage and exports the second clock
Signal.
Optionally, the clock signal output module generates under the control of the described second voltage-controlled voltage and exports described
Two clock signals, comprising:
The clock signal output module exports an original clock signal under the control of the described second voltage-controlled voltage, to institute
It states original clock signal to amplify and be filtered, exports the second clock signal.
Said one or multiple technical solutions in the embodiment of the present application at least have following one or more technology effects
Fruit:
1, whether normal by detecting external time signal automatically in the scheme of the embodiment of the present application, believe in external time service
When number being in normal condition, control clock signal generating device be in external time service mode, in external time signal in not just
When normal state, control clock signal generating device is in internal time service mode, passes through the operating mode inside automatic adjusument, phase
Than remaining to export when external time signal is abnormal in traditional high accuracy real-time clock realized using external time signal
Clock signal to realize the function of clock signal generating device place system, and then improves reliability.Original is used compared to traditional
The high accuracy real-time clock that secondary clock is realized, cost is lower, and volume is smaller, and weight is lighter.
2, in the scheme of the embodiment of the present application, using self-adaptation clock source, i.e., the clock signal in the embodiment of the present application is raw
It is synchronous with external GPS time signal at device, the synchronization between entire communication link may be implemented, to promote communication quality.
Detailed description of the invention
Fig. 1 is the module diagram of clock source in the prior art；
Fig. 2 is the module diagram of clock signal generating device in the embodiment of the present application one；
Fig. 3 is the circuit connection diagram of clock signal generating device in the embodiment of the present application one；
Fig. 4 is the flow chart of clock signal generation method in the embodiment of the present application two.
Specific embodiment
In technical solution provided by the embodiments of the present application, by the operating mode of automatic adjusument clock signal, compare
In traditional high accuracy real-time clock realized using external time signal, when external time signal is abnormal, when remaining to output
Clock signal to realize the function of clock signal generating device place system, and then improves reliability.Atom is used compared to traditional
The high accuracy real-time clock that clock is realized, cost is lower, and volume is smaller, and weight is lighter.
In order to solve the above technical problems, general thought is as follows for technical solution in the embodiment of the present application:
A kind of clock signal generating device, described device include:
External time service module；
Internal time service module；
Detection module is connect with the external time service module and the internal time service module；
Clock signal output module；
Wherein, when the detection module determines that the external time signal of the input external time service module is in normal condition
When, it controls the clock signal generating device and is in external time service mode, the clock signal output module is based on the outside
Time signal generates and exports the first clock signal；
When the detection module determines that the external time signal is in abnormal state, it is raw to control the clock signal
It is in internal time service mode at device, the clock signal output module is based on the internal reference for inputting the internal time service module
Signal generates and exports second clock signal.
It is whether normal by detecting external time signal automatically in above scheme, normal shape is in external time signal
When state, control clock signal generating device is in external time service mode, when external time signal is in abnormal state, control
Clock signal generating device is in internal time service mode, by the operating mode inside automatic adjusument, compared to traditional benefit
The high accuracy real-time clock realized with external time signal remains to output clock signal, when external time signal is abnormal with reality
The function of system where existing clock signal generating device, and then improve reliability.Compared to traditional height realized with atomic clock
Accuracy clock source, cost is lower, and volume is smaller, and weight is lighter.
With reference to the accompanying drawing to main realization principle, specific embodiment and its correspondence of the embodiment of the present application technical solution
The beneficial effect that can reach is explained in detail.
Embodiment one
The embodiment of the present application provides a kind of clock signal generating device, which can be applied to radar
In system, for generate with the clock signal of the clock signal synchronization of external system, as shown in Fig. 2, described device includes: outside
Time service module 1；Internal time service module 2；Detection module 3 is connect with the external time service module 1 and the internal time service module 2；
Clock signal output module 4；
Wherein, when the detection module 3 determines that the external time signal of the input external time service module 1 is in normal shape
When state, controls the clock signal generating device and be in external time service mode, the clock signal output module 4 is based on described outer
Portion's time signal generates and exports the first clock signal；
When the detection module 3 determines that the external time signal is in abnormal state, the clock signal is controlled
Generating means are in internal time service mode, and the clock signal output module 4 is based on the inside for inputting the internal time service module 2
Reference signal generates and exports second clock signal.
In the embodiment of the present application, as shown in figure 3, detection module 3 includes: the first power splitter 31, for awarding the outside
When signal be divided into first via time signal and the second road time signal；Wave detector 32 is connect with first power splitter 31, described
Wave detector 32 is corresponding defeated with the external power of time signal for being generated and being exported according to the first via time signal
Voltage out；Comparator 33 is connect with the wave detector 32, and the comparator 33 is for the output voltage and presets
Comparison voltage；Single-pole double-throw switch (SPDT) 34, the first end of the single-pole double-throw switch (SPDT) 34 are connect with the comparator 33, the list
The cutter head of double-pole double throw switch 34 is connect with the external time service module 1 or the internal time service module 2.
Wherein, when the output voltage is more than or equal to the comparison voltage, the single-pole double-throw switch (SPDT) 34 is controlled
Cutter head connect with the external time service module 1 so that the clock signal generating device be in described outside time service mode；?
When the output voltage is less than the comparison voltage, control the single-pole double-throw switch (SPDT) 34 cutter head and the internal time service module
2 connections, so that the clock signal generating device is in the internal time service mode.
In the embodiment of the present application, external time signal refers to external GPS time signal, will be received by the first power splitter 31
To external GPS time signal be divided into two-way, wherein first via time signal is by 32 detection of wave detector, output and signal function
The corresponding voltage value of rate, i.e. output voltage, and using the voltage value as the input of comparator 33, by comparing output voltage with
The preset comparison voltage size of comparator 33 judges whether external GPS time signal is normal.Specifically, big in output voltage
When comparison voltage, determine that external GPS time signal is normal, when output voltage is less than comparison voltage, determines
External GPS time signal is abnormal.Reference signal of the second road time signal as external time service module 1, excitation is external to award
When module 1 generate clock signal output module 4 need the first voltage-controlled voltage；
Further, when the output voltage of wave detector 32 is more than or equal to 33 preset comparison voltage of comparator, starting
External GPS time service mode is connect by the cutter head that switch control voltage controls single-pole double-throw switch (SPDT) 34 with external time service module 1,
Select the first voltage-controlled voltage as the control voltage of clock signal output module 4.When wave detector 32 output voltage be less than than
When compared with 33 preset comparison voltage of device, start internal time service mode, single-pole double-throw switch (SPDT) 34 is controlled by switch control voltage and is selected
Select control voltage of the second voltage-controlled voltage as clock signal output module 4, wherein the second voltage-controlled voltage is given birth to by clock signal
The voltage generated at device itself.
In the embodiment of the present application, external time service module 1 includes: phase-locked loop circuit, is connect with first power splitter 31；Institute
Phase-locked loop circuit is stated for exporting the first voltage-controlled voltage according to second road time signal.Specifically, phase-locked loop circuit includes:
Phase-locked loop chip 11 and loop filter 12, reference signal of the above-mentioned second road time signal as external time service module 1, excitation
External time service module 1 generates the first voltage-controlled voltage that clock signal output module 4 needs and refers to: the second road time signal is as lock
The reference signal of phase ring core piece 11, excitation phase-locked loop chip 11 generate the first voltage-controlled voltage that clock signal output module 4 needs.
In the embodiment of the present application, internal time service module 2 includes: bleeder circuit 21, bleeder circuit 21 and the clock signal
Crystal oscillator 41 in output module 4 connects, and the bleeder circuit 21 is used to divide the internal reference signal, with
Export the second voltage-controlled voltage；Wherein, the internal reference signal be the crystal oscillator 41 according to inherent parameters generate and it is defeated
Reference voltage out.
Wherein, the value of reference voltage is determined by 41 inherent parameters of crystal oscillator, such as: the value of reference voltage can be
5V, 9V, 12V etc..Since the voltage-controlled voltage that crystal oscillator 41 needs is generally less than the reference voltage of the generation of crystal oscillator 41,
The reference voltage generated therefore, it is necessary to bleeder circuit 21 to crystal oscillator 41 divides, such as: half bleeder circuit
The value of reference voltage can be divided into half, then, using the voltage value after partial pressure as the second voltage-controlled voltage.Specific real
During applying, bleeder circuit 21 can be resistance subnetwork.Since voltage-controlled voltage is used to control the output frequency of crystal oscillator 41
Rate changes the output frequency of the adjustable crystal oscillator 41 of size of voltage-controlled voltage, and then controls the precision of clock signal.Cause
This can adjust the size of the second voltage-controlled voltage under internal time service mode by adjusting bleeder circuit 21, and then control clock
The output accuracy of signal.
In the embodiment of the present application, clock signal output module 4 includes: crystal oscillator 41, with the single-pole double-throw switch (SPDT)
34 second end connection, the crystal oscillator 41 are used for the control in the described first voltage-controlled voltage or the second voltage-controlled voltage
System is lower to export an original clock signal；Second power splitter 42 is connect with the crystal oscillator 41, and second power splitter 42 is used
In the original clock signal is divided into first via original clock signal and the second road original clock signal；Filtering and amplifying circuit
43, it is connect with second power splitter 42, the filtering and amplifying circuit 43 is used to carry out the first via original clock signal
Amplification and filtering processing, export first clock signal or the second clock signal.
Specifically, when the first voltage-controlled voltage refers to that external time signal is normal, phase-locked loop circuit is in external time signal
The lower voltage-controlled voltage generated of excitation, further, when external time signal is normal, clock signal generating device is in external time service
Mode, clock signal output module 4 export above-mentioned original clock signal under the control of the first voltage-controlled voltage.Second voltage-controlled voltage
Refer to the voltage-controlled voltage that internal time service module 2 generates, further, when external time signal is abnormal, clock signal generates dress
It sets in internal time service mode, clock signal output module 4 exports above-mentioned original clock letter under the control of the second voltage-controlled voltage
Number.
Second power splitter 42 is connect with crystal oscillator 41, and the second power splitter 42 is used for the original exported to crystal oscillator 41
Beginning clock signal carries out being divided into two-way, respectively first via original clock signal and the second road original clock signal.Amplification filtering
Circuit 43 is connect with the second power splitter 42, for amplifying processing and filtering processing to first via original clock information, in turn
Export the first clock signal or second clock signal.
Further, the second power splitter 42 is also connect with the phase-locked loop circuit, is in outside in clock signal generating device
When time service mode, by the effect of phase-locked loop, the clock signal precision for exporting crystal oscillator 41 is the same as GPS time signal
Precision is consistent.
In the scheme of the embodiment of the present application, due to joined detection module 3, by automatic between two kinds of different working modes
Switching, it is ensured that clock signal needed for radar system can be exported normally under any circumstance.When detecting that external GPS awards
When signal it is normal when, clock signal generating device automatically switches to external time service mode.In this mode, the height received is utilized
Precision GPS reference clock signal calibrates the low phase noise crystal oscillator inside clock signal generating device, passes through locking phase
Mode, clock signal needed for locking output radar system.The clock signal makes it because there is the calibration of GPS reference clock
It is provided with high-precision characteristic.Meanwhile the crystal oscillator 41 inside clock signal generating device is the vibration of low phase noise crystal
Device is swung, so that the clock signal of output has the characteristic of low phase noise.Further, since GPS reference clock signal can be to whole
The other systems of a communication system carry out time service and improve communication matter so that radar system can be synchronous with entire communication system
Amount.When detecting that external GPS time signal is abnormal, clock signal generating device automatically switches to internal reference mode,
Clock signal is directly exported by internal low phase noise crystal oscillator, guarantees radar system in external time signal
Also clock signal can be normally exported when abnormal, and then improves the reliability of radar system.
Embodiment two
Based on the same inventive concept, the embodiment of the present application provides a kind of clock signal generation method, as shown in Figure 4, comprising:
S10: it awards the outside that the detection module detection in clock signal generating device inputs the clock signal generating device
When module external time signal be to be in abnormal state in normal condition；
S11: it when the external time signal is in the normal condition, controls the clock signal generating device and is in
External time service mode, and the external time signal life is based on by the clock signal output module in clock signal generating device
At and export the first clock signal；
S12: it when the external time signal is in the abnormal state, controls at the clock signal generating device
Believed in internal time service mode, and by the clock signal output module based on the internal reference for inputting the internal time service module
It number generates and exports second clock signal.
Optionally, the detection module detection in clock signal generating device inputs the outside of the clock signal generating device
The external time signal of time service module is to be in abnormal state in normal condition, comprising:
The external time signal is divided into first via time signal and the second road time signal in the detection module；Root
According to first via time signal output output voltage corresponding with the outside power of time signal；And the output
Voltage and pre-set comparison voltage；
Wherein, it when the output voltage is more than or equal to the comparison voltage, determines at the external time signal
In normal condition；When the output voltage is less than the comparison voltage, determine that the external time signal is in abnormal shape
State.
Optionally, it controls the clock signal generating device and is in external time service mode, and generated and filled by clock signal
Clock signal output module in setting is based on the external time signal and generates and export the first clock signal, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the external time service module, so that when described
Clock signal generating apparatus is in the external time service mode；
The external time service module is based on the external time signal and generates the first voltage-controlled voltage；
The clock signal output module generates under the control of the described first voltage-controlled voltage and exports first clock
Signal.
Optionally, it controls the clock signal generating device and is in internal time service mode, and is defeated by the clock signal
Module is generated based on the internal reference signal for inputting the internal time service module and exports second clock signal out, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the internal time service module, so that when described
Clock signal generating apparatus is in the internal time service mode；
Internal reference of the internal time service module based on the crystal oscillator output in the clock signal output module
Signal generates and exports the second voltage-controlled voltage；
The clock signal output module generates under the control of the described second voltage-controlled voltage and exports the second clock
Signal.
Optionally, the clock signal output module generates under the control of the described second voltage-controlled voltage and exports described
Two clock signals, comprising:
The clock signal output module exports an original clock signal under the control of the described second voltage-controlled voltage, to institute
It states original clock signal to amplify and be filtered, exports the second clock signal.
By one or more technical solutions in the embodiment of the present application, following one or more technology effects may be implemented
Fruit:
1, whether normal by detecting external time signal automatically in the scheme of the embodiment of the present application, believe in external time service
When number being in normal condition, control clock signal generating device be in external time service mode, in external time signal in not just
When normal state, control clock signal generating device is in internal time service mode, passes through the operating mode inside automatic adjusument, phase
Than remaining to export when external time signal is abnormal in traditional high accuracy real-time clock realized using external time signal
Clock signal to realize the function of clock signal generating device place system, and then improves reliability.Original is used compared to traditional
The high accuracy real-time clock that secondary clock is realized, cost is lower, and volume is smaller, and weight is lighter.
2, in the scheme of the embodiment of the present application, using self-adaptation clock source, i.e., the clock signal in the embodiment of the present application is raw
It is synchronous with external GPS time signal at device, the synchronization between entire communication link may be implemented, to promote communication quality.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (9)
1. a kind of clock signal generating device, which is characterized in that described device includes:
External time service module；
Internal time service module；
Detection module is connect with the external time service module and the internal time service module, including the first power splitter, and being used for will be outer
Portion's time signal is divided into first via time signal and the second road time signal；
Clock signal output module；
Wherein, when the detection module determines that the external time signal for inputting the external time service module is in normal condition,
It controls the clock signal generating device and is in external time service mode, the clock signal output module is based on the external time service
Signal generates and exports the first clock signal；
When the detection module determines that the external time signal is in abnormal state, controls the clock signal and generate dress
It sets in internal time service mode, the clock signal output module is based on the internal reference signal for inputting the internal time service module
It generates and exports second clock signal；
The detection module further include:
Wave detector is connect with first power splitter, the wave detector be used for according to the first via time signal generate and it is defeated
Output voltage corresponding with the outside power of time signal out；
Comparator is connect with the wave detector, and the comparator is electric for the output voltage and pre-set comparison
Pressure；
Single-pole double-throw switch (SPDT), the first end of the single-pole double-throw switch (SPDT) are connect with the comparator, the single-pole double-throw switch (SPDT)
Cutter head is connect with the external time service module or the internal time service module；
Wherein, when the output voltage is more than or equal to the comparison voltage, the cutter head of the single-pole double-throw switch (SPDT) is controlled
It is connect with the external time service module, so that the clock signal generating device is in the external time service mode；Described defeated
When voltage is less than the comparison voltage out, the cutter head for controlling the single-pole double-throw switch (SPDT) is connect with the internal time service module, with
The clock signal generating device is set to be in the internal time service mode.
2. device as described in claim 1, which is characterized in that time service module includes: outside described
Phase-locked loop circuit is connect with first power splitter；The phase-locked loop circuit is used for according to second road time signal
Export the first voltage-controlled voltage.
3. device as claimed in claim 2, which is characterized in that time service module includes: inside described
Bleeder circuit, the bleeder circuit are connect with the crystal oscillator in the clock signal output module, the partial pressure electricity
Road is for dividing the internal reference signal, to export the second voltage-controlled voltage；Wherein, the internal reference signal is institute
State the reference voltage that crystal oscillator is generated and exported according to inherent parameters.
4. device as claimed in claim 3, which is characterized in that clock signal output module includes:
Crystal oscillator is connect with the second end of the single-pole double-throw switch (SPDT), and the crystal oscillator is used in first pressure
An original clock signal is exported under the control of control voltage or the second voltage-controlled voltage；
Second power splitter is connect with the crystal oscillator, and second power splitter is for the original clock signal to be divided into
First via original clock signal and the second road original clock signal；
Filtering and amplifying circuit is connect with second power splitter, when the filtering and amplifying circuit is used for original to the first via
Clock signal is amplified and is filtered, and exports first clock signal or the second clock signal.
5. device as claimed in claim 4, which is characterized in that second power splitter is connect with the phase-locked loop circuit.
6. a kind of clock signal generation method characterized by comprising
External time signal is divided into first via time signal and the second road time signal in detection module；
Detection module detection in clock signal generating device inputs the external time service module of the clock signal generating device
External time signal is to be in abnormal state in normal condition；
When the external time signal is in the normal condition, controls the clock signal generating device and be in external time service
Mode, and the external time signal is based on by the clock signal output module in clock signal generating device and generates and exports
First clock signal；
When the external time signal is in the abnormal state, controls the clock signal generating device and awarded in inside
When mode, and generate and export based on the internal reference signal for inputting internal time service module by the clock signal output module
Second clock signal；
Wherein, the detection module detection in clock signal generating device inputs the external time service mould of the clock signal generating device
The external time signal of block is to be in abnormal state in normal condition, comprising:
According to first via time signal output output voltage corresponding with the outside power of time signal；And compare institute
State output voltage and pre-set comparison voltage；
Wherein, when the output voltage is more than or equal to the comparison voltage, determine that the external time signal is in just
Normal state；When the output voltage is less than the comparison voltage, determine that the external time signal is in abnormal state.
7. method as claimed in claim 6, which is characterized in that control the clock signal generating device and be in external time service mould
Formula, and the external time signal is based on by the clock signal output module in clock signal generating device and generates and exports the
One clock signal, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the external time service module, so that the clock is believed
Number generating means are in the external time service mode；
The external time service module is based on the external time signal and generates the first voltage-controlled voltage；
The clock signal output module generates under the control of the described first voltage-controlled voltage and exports first clock signal.
8. method as claimed in claim 6, which is characterized in that control the clock signal generating device and be in internal time service mould
Formula, and generate and export based on the internal reference signal for inputting the internal time service module by the clock signal output module
Second clock signal, comprising:
The cutter head for controlling the single-pole double-throw switch (SPDT) of the detection module is connect with the internal time service module, so that the clock is believed
Number generating means are in the internal time service mode；
Internal reference signal of the internal time service module based on the crystal oscillator output in the clock signal output module
It generates and exports the second voltage-controlled voltage；
The clock signal output module generates under the control of the described second voltage-controlled voltage and exports the second clock signal.
9. method according to claim 8, which is characterized in that the clock signal output module is in the described second voltage-controlled voltage
Control under generate and export the second clock signal, comprising:
The clock signal output module exports an original clock signal under the control of the described second voltage-controlled voltage, to the original
Beginning clock signal is amplified and is filtered, and exports the second clock signal.
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| CN109254522B (en) * | 2018-09-26 | 2020-09-01 | 上海星秒光电科技有限公司 | Clock switching device and method and time measuring equipment and method |
| CN112506776A (en) * | 2020-12-08 | 2021-03-16 | 上海市信息网络有限公司 | Processor chip debugging system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006029511A1 (en) * | 2004-09-13 | 2006-03-23 | Nortel Networks Limited | Method and apparatus for synchronizing internal state of frequency generators on a communications network |
| CN102857201A (en) * | 2011-05-01 | 2013-01-02 | 英特赛尔美国有限公司 | Advanced clock synchronization circuit for switch mode power supplies |
| CN102970093A (en) * | 2012-11-02 | 2013-03-13 | 中国电子科技集团第四十一研究所 | Synchronizing system compatible with various clocks and synchronizing method thereof |
| CN104038215A (en) * | 2014-06-13 | 2014-09-10 | 南京邮电大学 | Automatic frequency calibration circuit for sigma-delta fractional frequency synthesizer |
| CN104702271A (en) * | 2013-12-10 | 2015-06-10 | 展讯通信（上海）有限公司 | Phase-locked loop circuit and calibration method for characteristic curves of voltage-controlled oscillator |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2944607B2 (en) * | 1998-02-12 | 1999-09-06 | 日本電気アイシーマイコンシステム株式会社 | Digital PLL circuit and clock generation method |
| KR20100077548A (en) * | 2008-12-29 | 2010-07-08 | 주식회사 동부하이텍 | Phase locked loop circuit |
| US8570080B2 (en) * | 2011-09-08 | 2013-10-29 | Via Technologies, Inc. | Frequency-control circuits and signal generation devices using the same |
| CN102684478A (en) * | 2012-05-04 | 2012-09-19 | 上海艾为电子技术有限公司 | Charge pump circuit |
-
2015
- 2015-09-06 CN CN201510560159.3A patent/CN105187056B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006029511A1 (en) * | 2004-09-13 | 2006-03-23 | Nortel Networks Limited | Method and apparatus for synchronizing internal state of frequency generators on a communications network |
| CN102857201A (en) * | 2011-05-01 | 2013-01-02 | 英特赛尔美国有限公司 | Advanced clock synchronization circuit for switch mode power supplies |
| CN102970093A (en) * | 2012-11-02 | 2013-03-13 | 中国电子科技集团第四十一研究所 | Synchronizing system compatible with various clocks and synchronizing method thereof |
| CN104702271A (en) * | 2013-12-10 | 2015-06-10 | 展讯通信（上海）有限公司 | Phase-locked loop circuit and calibration method for characteristic curves of voltage-controlled oscillator |
| CN104038215A (en) * | 2014-06-13 | 2014-09-10 | 南京邮电大学 | Automatic frequency calibration circuit for sigma-delta fractional frequency synthesizer |
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