CN105096849A - Source driver, driving circuit and display apparatus - Google Patents
Source driver, driving circuit and display apparatus Download PDFInfo
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- CN105096849A CN105096849A CN201410526273.XA CN201410526273A CN105096849A CN 105096849 A CN105096849 A CN 105096849A CN 201410526273 A CN201410526273 A CN 201410526273A CN 105096849 A CN105096849 A CN 105096849A
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Abstract
A source driver, a driving circuit using the same and a display apparatus using the same are provided. The display apparatus includes a display panel, a timing controller and a source driver. The timing controller is configured to receive an external image signal to provide a compressed image signal. The source driver is configured to receive the compressed image signal, and has a decompressor configured to convert the compressed image signal into restored image data and provide a plurality of source driving signals to drive the display panel according to a plurality of display data of the restored image data.
Description
Technical field
The invention relates to a kind of driver, and relate to a kind of source electrode driver, driving circuit and display device especially.
Background technology
Now, due to the progress of semiconductor element or display device, multimedia technology becomes quite flourishing.With regard to display device, have that high image quality, space efficiency utilization are good, the liquid crystal indicator (LiquidCrystalDisplay is called for short LCD) of low consumpting power, the advantageous characteristic such as radiationless becomes the main flow in market gradually.In conventional ADS driving mode, the data transmission rate of display panels can along with high image quality and high picture update rate (FrameRate) and rapid rising, and then cause many problems, such as chip transmission speed uprises, image processing speed uprises, the power consumption of display device increases, and not easily passs through system Safety Approval and the increase of hardware cost.Therefore, how reduce the transmission quantity of view data in display device not affecting in picture quality or tolerance interval, then become a problem of design display device.
Summary of the invention
The invention provides a kind of source electrode driver, driving circuit and display device, the data transmission rate between time schedule controller and source electrode driver can be reduced, the problem that high data transmission rate is brought can be avoided by this.
Source electrode driver of the present invention, comprises a decompressor, multiple data latching unit and a digital analog converter.Decompressor receives a compressing image data and carries out decompressing to provide one to go back original digital image data, wherein goes back original digital image data and comprises multiple display data.These data latching unit in order to these display data of breech lock, and sequentially provide these display data.Digital analog converter, in order to these display data of received in sequence, so that display data are converted to analog format by digital format, and sequentially produces multiple analog output signal.
In one embodiment of this invention, the compressing image data of each is the display data comprising a plurality of lines, and decompressor is after decompressing to this compressing image data, is the display data simultaneously obtaining a plurality of lines.
In one embodiment of this invention, the compression unit of compressing image data is Npixel (pixel) × Mpixel, and wherein Npixel × Mpixel represents M pixels in N bar line, and N, M are positive integer.
In one embodiment of this invention, the sum=2+P of these data latching unit, wherein P is a positive integer, and P=N.
In one embodiment of this invention, the sum=2+P of these data latching unit, wherein P is a positive integer, and P<N.
In one embodiment of this invention, N=2, M=2.
In one embodiment of this invention, N=1, M=4.
In one embodiment of this invention, these data latching unit add up to 3.And, these data latching unit comprise one first latch lock unit, one second latch lock unit and one the 3rd latch lock unit, in the middle of these display data, display data of each bar of line to be first temporary in the middle of the first latch lock unit and the 3rd latch lock unit one respectively or both being allocated to, then be supplied to the second latch lock unit by the first latch lock unit and the 3rd latch lock unit.
In one embodiment of this invention, first latch lock unit is the leading portion of display according to this and in the middle of the display data of plural follow-up bar line each or back segment or whole section of sequentially keeping in Article 1 line in the middle of these display data, second latch lock unit is whole section of display data of sequentially keeping in each line in the middle of these display data, and the 3rd latch lock unit sequentially keeps in leading portion according to this and in the middle of the display data of these follow-up bar of line each of Article 2 line display in the middle of these display data or back segment or whole section.
In one embodiment of this invention, these data latching unit add up to 4.And, these data latching unit comprise one first latch lock unit, one second latch lock unit, one the 3rd latch lock unit and one the 4th latch lock unit, in the middle of these display data, the display data of each bar of line are first temporary in the one in the middle of the first latch lock unit and the 4th latch lock unit respectively, and be supplied to the 3rd latch lock unit by the 4th latch lock unit again, be also supplied to the second latch lock unit by the first latch lock unit and the 3rd latch lock unit again.
In one embodiment of this invention, first latch lock unit is the display data sequentially storing odd number bar line in the middle of these display data, second latch lock unit is the display data sequentially storing each line in the middle of these display data, 3rd latch lock unit is sequentially and the display data of even bar of line in the middle of these display data of intermittent storage, and the 4th latch lock unit is the display data sequentially storing even bar of line in the middle of these display data.
In one embodiment of this invention, source electrode driver also comprises a charge share control circuit, is coupled to decompressor, according to the display data of a plurality of lines, judges whether to start the charge share between a plurality of data channel.
In one embodiment of this invention, source electrode driver also comprises a receiver, in order to receive a compressing image signal to provide compressing image data.
In one embodiment of this invention, source electrode driver also comprises a mnemon, is coupled between receiver and decompressor.
In one embodiment of this invention, source electrode driver also comprises a bus and to remap unit, is coupled between decompressor and these data latching unit, for these display data are distributed to these data latching unit.
In one embodiment of this invention, source electrode driver also comprises an output buffer, is coupled to digital analog converter, to produce multiple source drive signal according to these analog output signals.
Driving circuit of the present invention, in order to drive a display panel, and comprises time schedule controller and one source pole driver.Time schedule controller is in order to provide a compressing image signal.Source electrode driver in order to receive compressing image signal, and has a decompressor, so that original digital image data is gone back in compressing image signal conversion one, and sequentially provides multiple source drive signal according to multiple display data of going back original digital image data.
Display device of the present invention comprises a display panel, time schedule controller and one source pole driver.Time schedule controller in order to receive external image signal, to provide a compressing image signal.Source electrode driver in order to receive compressing image signal, and has a decompressor, so that original digital image data is gone back in compressing image signal conversion one, and provides multiple source drive signal to drive display panel according to multiple display data of going back original digital image data.
In one embodiment of this invention, time schedule controller is that external image signal is overcompression from external reception one external image signal.
In one embodiment of this invention, display device also comprises a main frame, and main frame is that compression one picture signal is to provide the external image signal through overcompression.
In one embodiment of this invention, time schedule controller comprises a compressor reducer, in order to compress an external image signal to form compressing image signal.
In one embodiment of this invention, time schedule controller also comprises a mnemon, is coupled between compressor reducer and source electrode driver, in order to store compressed picture signal.
In one embodiment of this invention, source electrode driver also comprises a mnemon, is coupled between time schedule controller and decompressor, in order to store compressed picture signal.
Based on above-mentioned, the source electrode driver of the embodiment of the present invention, driving circuit and display device, transmit data by compressed compressing image signal between its time schedule controller and source electrode driver, to reduce the data transmission rate between sequence controller and source electrode driver, the problem that high data transmission rate is brought can be avoided by this.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Accompanying drawing explanation
Fig. 1 is the system schematic of the display device of one embodiment of the invention;
Fig. 2 A is the system schematic of the source electrode driver of one embodiment of the invention;
Fig. 2 B is the data latching schematic diagram of the data latching unit of one embodiment of the invention;
Fig. 3 A is the system schematic of the source electrode driver of another embodiment of the present invention;
Fig. 3 B is the data latching schematic diagram of the data latching unit of another embodiment of the present invention;
Fig. 4 is the system schematic of the source electrode driver of further embodiment of this invention;
Fig. 5 is the system schematic of the display device of another embodiment of the present invention;
Fig. 6 is the process flow diagram of the How It Works of the display device of one embodiment of the invention.
Description of reference numerals:
10,20: main frame;
11,511: compressor reducer;
100,500: display device;
101,501: driving circuit;
110,510: time schedule controller;
120,120a, 120b, 120c, 520: source electrode driver;
121,513: mnemon;
123: decompressor;
130: display panel;
210: receiver;
220,310: bus remaps unit;
230,320: data channel;
231: digital analog converter;
233: output buffer;
410: charge share control circuit;
420: charge share circuit;
D11 ~ D16, D17a, D17b, D18a, D18b, D21 ~ D28: display data;
DCI: compressing image data;
DRI: go back original digital image data;
L11, L21: the first latch lock unit;
L12, L22: the second latch lock unit;
L13, L23: the 3rd latch lock unit;
L24: the four latch lock unit;
PD1, PD2, PSC1 ~ PSC6: horizontal scan period;
SAO: analog output signal;
SCPI: compressing image signal;
SDX: source drive signal;
SEIa, SEIb: external image signal;
SIM: picture signal;
S610, S620, S630: step.
Embodiment
Fig. 1 is the system schematic of the display device of one embodiment of the invention.Please refer to Fig. 1, in the present embodiment, display device 100 receives the external image signal SEIa that the main frame 10 from outside provides, and comprises display panel 130 and in order to drive the driving circuit 101 of display panel 130.Wherein, main frame 10 such as comprises compressor reducer 11, and also namely main frame 10 is that compressing image signal SIM is to provide the external image signal SEIa of overcompression.Further, in the present embodiment, driving circuit 101 such as comprises time schedule controller 110 and multiple source electrode driver 120, but in other embodiments, driving circuit 101 can also comprise gate drivers (not shown), and the embodiment of the present invention is not as limit.
In the present embodiment, time schedule controller 110, after receiving compressed external image signal SEIa, directly can export compressed external image signal SEIa as compressing image signal SCPI.Source electrode driver 120 in order to receive compressing image signal SCPI, and has mnemon 121 and decompressor 123.Mnemon 121 is coupled between time schedule controller 110 and decompressor 123, in order to store compressed picture signal SCPI.After decompressor 123 accesses compressing image signal SCPI from mnemon 121, be converted to after compressing image signal SCPI is decompressed and go back original digital image data DRI.Now, source electrode driver 120 can provide multiple source drive signal SDX to drive display panel 130 according to multiple display data of going back original digital image data DRI.
According to above-mentioned, owing to being transmit data by compressed compressing image signal SCPI between time schedule controller 110 and source electrode driver 120, therefore the data transmission rate between time schedule controller 110 and source electrode driver 120 can decline along with data compression rate, can avoid the problem that high data transmission rate is brought by this.
In the present embodiment, compressor reducer 11 and decompressor 123 are corresponding identical compress modes.Furthermore, suppose that on compressing image signal SCPI, each compressing image data DCI comprises a plurality of horizontal display data, then decompressor 123 is after decompressing to this compressing image data, is the display data simultaneously obtaining a plurality of lines.In one embodiment of this invention, the compression unit of compressing image data DCI can be Npixel × Mpixel, and wherein Npixel × Mpixel represents M pixels in N bar line, and N, M are positive integer.For example, the compression unit of compressing image data DCI can be 1pixel × 4pixel, or 2pixel × 2pixel, but according to this area, this can know that the knowledgeable adjusts voluntarily usually, and the embodiment of the present invention is not as limit.
Further, in the present embodiment, main frame 10 is such as be set in display device 100 outside, but it is in his embodiment, and it is inner that main frame 10 can be set in display device 100, and this can usually know the knowledgeable according to this area and determine, and the embodiment of the present invention is not as limit.
Fig. 2 A is the system schematic of the source electrode driver of one embodiment of the invention.Please refer to Fig. 1 and Fig. 2 A, wherein same or similar element uses same or similar label.In the present embodiment, source electrode driver 120a such as comprises receiver 210, mnemon 121, decompressor 123, bus remap unit 220 and multiple data channel 230, and wherein data channel 230 has multiple data latching unit (as the first latch lock unit L11, the second latch lock unit L12 and the 3rd latch lock unit L13), digital analog converter 231 and output buffer 233.And, in the present embodiment, suppose that the compression unit of compressing image data DCI is 2pixel × 2pixel, and the sum of data latching unit in data channel 230 can be set as 3 (i.e. the first latch lock unit L11, the second latch lock unit L12 and the 3rd latch lock unit L13), also, namely except 2 the data latch lock units be fixedly installed, also newly-increased 1 (equaling 2-1) data latching unit is to store the display data (as D11 ~ D16) after decompression.
Receiver 210 is in order to receive compressing image signal SCPI to provide compressing image data DCI.Mnemon 121 is coupled between receiver 210 and decompressor 123, in order to the compressing image data DCI of store compressed picture signal SCPI.After decompressor 123 receives compressing image data DCI from mnemon 121, decompress to provide to compressing image data DCI and go back original digital image data DRI, wherein go back original digital image data DRI and comprise multiple display data (as D11 ~ D16).The bus unit 220 that remaps is coupled to decompressor 123 and between the first latch lock unit L11, the second latch lock unit L12 and the 3rd latch lock unit L13, distributes to the first latch lock unit L11, the second latch lock unit L12 and the 3rd latch lock unit L13 for showing data (as D11 ~ D16).
Digital analog converter 231 is after passing through the first latch lock unit L11, the second latch lock unit L12 and the 3rd latch lock unit L13 received in sequence to corresponding display data (as D11 ~ D16), received display data (as D11 ~ D16) are converted to analog format by digital format, and sequentially produce multiple analog output signal SAO.Output buffer 233 is coupled to digital analog converter 231, to produce source drive signal SDX according to analog output signal SAO.
Fig. 2 B is the data latching schematic diagram of the data latching unit of one embodiment of the invention.Please refer to Fig. 2 A and Fig. 2 B, compression unit due to compressing image data DCI is 2pixel × 2pixel, and data transmission rate can be corresponding be set as half originally, therefore a complete compressing image data DCI needs two horizontal scan period (as PD1, PD2 and PSC1 ~ PSC6) to transmit.
Furthermore, in preparation horizontal scan period PD1 ~ PD2, the 1st and the display data D11 of 2 bars of lines and D12 can be stored in the first latch lock unit L11 and the 3rd latch lock unit L13, and the second latch lock unit L12 first can keep blank (i.e. N/A).In the 1st horizontal scan period PSC1, display data D11 can be transferred to the second latch lock unit L12 by the first latch lock unit L11, to be transmitted display data D11 by the second latch lock unit L12 to digital analog converter 231.Now, the first latch lock unit L11 presents blank, but the 3rd latch lock unit L13 still stores display data D12 to be shown and cannot use.
Because a horizontal scan period can only transmit the compressing image data DCI of half, therefore horizontal scan period PSC1 can only obtain the 3rd and the display data D13 of 4 bars of lines and the first half (representing with D13a and D14a) of D14.Further, in order to make decompressor 123 can normal operation, therefore display data D13a and D14a can be stored in the first latch lock unit L11.Similarly, in the 2nd horizontal scan period PSC2, display data D12 can be transferred to the second latch lock unit L12 by the 3rd latch lock unit L13, and latter half of (the representing with D13b and D14b) of the display data D13 that decompressor 123 exports and D14 can be stored in the 3rd latch lock unit L13.
In the 3rd horizontal scan period PSC3, display data D13 can be transferred to the second latch lock unit L12 by the first latch lock unit L11 and the 3rd latch lock unit L13, and the blank position in the first latch lock unit L11 and the 3rd latch lock unit L13 can store the 5th and the display data D15 of 6 bars of lines and the first half (representing with D15a and D16a) of D16 respectively.In the 4th horizontal scan period PSC4, display data D14 can be transferred to the second latch lock unit L12 by the first latch lock unit L11 and the 3rd latch lock unit L13, and the blank position in the first latch lock unit L11 and the 3rd latch lock unit L13 can store the 5th and the display data D15 of 6 bars of lines and latter half of (the representing with D15b and D16b) of D16 respectively.Now, the first latch lock unit L11 is as stored complete display data D15, and the 3rd latch lock unit L13 is as stored complete display data D16.And the action of postorder horizontal scan period (as PSC5, PSC6) can refer to the action of 1st ~ 4 horizontal scan period PSC1, to be stored other displays data (as D17, D18) by the first latch lock unit L11 and the 3rd latch lock unit L13 and to be sent to the second latch lock unit L12.
According to above-mentioned, the display data (as D11 ~ D16) of each bar of line to be first temporary in the middle of the first latch lock unit L11 and the 3rd latch lock unit L13 one respectively or to be allocated to both, then be supplied to the second latch lock unit L12 by the first latch lock unit L11 and the 3rd latch lock unit L13.Furthermore, the first latch lock unit L11 sequentially can keep in the 1st article of line display data D11 and plural follow-up bar of line in these displays data (as D12 ~ D16) display data (as D12 ~ D16) in the middle of each leading portion, back segment or whole section; Second latch lock unit L12 is whole section of the display data of sequentially keeping in each line in the middle of these displays data (as D12 ~ D16); And, the leading portions in the middle of display data (as D12 ~ D16) that the 3rd latch lock unit L13 sequentially can keep in Article 2 line display data D12 and plural follow-up bar of line in the middle of these displays data (as D11 ~ D16) each or back segment or whole section.
Fig. 3 A is the system schematic of the source electrode driver of another embodiment of the present invention.Please refer to Fig. 2 A and Fig. 3 A, wherein same or similar element uses same or similar label.In the present embodiment, source electrode driver 120b is approximately identical to source electrode driver 120a, its difference is that each data channel 320 has 4 data latch lock units (i.e. the first latch lock unit L21, the second latch lock unit L22, the 3rd latch lock unit L23 and the 4th latch lock unit L24), and will be shown data (as D21 ~ D28) distributed to the first latch lock unit L21, the second latch lock unit L22, the 3rd latch lock unit L23 and the 4th latch lock unit L24 by the bus unit 310 that remaps.At this, the present embodiment still supposes that the compression unit of compressing image data DCI is 2pixel × 2pixel, the sum of the data latching unit in data channel 320 is then set as 4, also, namely except 2 the data latch lock units be fixedly installed, also newly-increased 2 data latch lock units store the display data (as D21 ~ D28) after decompression.
Fig. 3 B is the data latching schematic diagram of the data latching unit of another embodiment of the present invention.Please refer to Fig. 3 A and Fig. 3 B, compression unit due to compressing image data DCI is 2pixel × 2pixel, and data transmission rate can be corresponding be set as half originally, therefore a complete compressing image data DCI needs two horizontal scan period (as PD1, PD2 and PSC1 ~ PSC6) to transmit.
Furthermore, in preparation horizontal scan period PD1 ~ PD2,1st and the display data D21 of 2 bars of lines and D22 can be stored in the first latch lock unit L21 and the 4th latch lock unit L24, and the second latch lock unit L22 and the mat woven of fine bamboo strips three latch lock unit L23 first can keep blank (i.e. N/A).In the 1st horizontal scan period PSC1, display data D21 can be transferred to the second latch lock unit L22 by the first latch lock unit L21, to be transmitted display data D21 by the second latch lock unit L22 to digital analog converter 231.Further, show data D22 and can be transferred to the 3rd latch lock unit L23 by the 4th latch lock unit L24.Now, because the first latch lock unit L21 and the 4th latch lock unit L24 is cleared, because can be used to store next record compressing image data DCI, also namely the 3rd and the display data D23 of 4 bars of lines and D24.
In the 2nd horizontal scan period PSC2, display data D22 can be transferred to the second latch lock unit L22 by the 3rd latch lock unit L23, and the first latch lock unit L21 and the 4th latch lock unit L24 still continues to store display data D23 and D24.The action of postorder horizontal scan period (as PSC4 ~ PSC6) can refer to the action of the 1st and 2 horizontal scan period PSC1, to be stored other displays data (as D27, D28) by the first latch lock unit L21, the 3rd latch lock unit L23 and the 4th latch lock unit L24 and to be sent to the second latch lock unit L22.
According to above-mentioned, the display data (as D21 ~ D28) of each bar of line are first temporary in the one in the middle of the first latch lock unit L21 and the 4th latch lock unit L24 respectively, and be supplied to the 3rd latch lock unit L23 by the 4th latch lock unit L24 again, be also supplied to the second latch lock unit L22 by the first latch lock unit L21 and the 3rd latch lock unit L23 again.Furthermore, first latch lock unit L21 sequentially can store the display data of odd number bar line in the middle of display data (as D21 ~ D28) (as D21, D23, D25, D27), second latch lock unit L22 is the display data sequentially storing each line in the middle of display data (as D21 ~ D28), 3rd latch lock unit L can sequentially and in the middle of intermittent storage display data (as D21 ~ D28) the display data of even bar of line (as D22, D24, D26, D28), and the 4th latch lock unit L24 sequentially can to store in the middle of display data (as D21 ~ D28) even article of line display data (as D22, D24, D26, D28).
Fig. 4 is the system schematic of the source electrode driver of further embodiment of this invention.Please refer to Fig. 2 A and Fig. 4, wherein same or similar element uses same or similar label.In the present embodiment, source electrode driver 120c is approximately identical to source electrode driver 120a, and its difference is that source electrode driver 120c also comprises charge share control circuit 410 and charge share circuit 420.Charge share circuit 420 couples the output terminal of all data channel 230, performs charge share between all data channel 230 to be controlled by charge share control circuit 410.Charge share circuit 420 couples decompressor 123 and charge share circuit 420, go back to receive a plurality of the display data (as D11 ~ D16) that original digital image data DRI comprises, and pass through received display data (as D11 ~ D16) and judge whether to perform the charge share between all data channel 230.
Fig. 5 is the system schematic of the display device of another embodiment of the present invention.Please refer to Fig. 1 and Fig. 5, in same or similar element use same or similar label.In the present embodiment, display device 500 is approximately identical to display device 100, and its difference is driving circuit 501, and wherein driving circuit 501 such as comprises time schedule controller 510 and multiple source electrode driver 520.In the present embodiment, main frame 20 directly transmits picture signal SIM, also namely provides unpressed external image signal SEIb.
Time schedule controller 510 comprises compressor reducer 511 and mnemon 513, wherein compressor reducer 511 is in order to compress external image signal SEIb to form compressing image signal SCPI, mnemon 513 is coupled between compressor reducer 511 and source electrode driver 520, in order to store compressed picture signal SCPI.In other words, after compressor reducer 511 receives unpressed external image signal SEIb, external image signal SEIb can be compressed to form compressing image signal SCPI, and be sent to source electrode driver 520 by mnemon 513.Further, the source electrode driver 520 of this case has decompressor 123, goes back original digital image data DRI with by being converted to after compressing image signal SCPI decompression.Now, source electrode driver 520 still can provide multiple source drive signal SDX to drive display panel 130 according to multiple display data of going back original digital image data DRI.
Fig. 6 is the process flow diagram of the How It Works of the display device of one embodiment of the invention.Please refer to Fig. 6, in the present embodiment, the How It Works of display device comprises the following steps.First, external image signal can be received by time schedule controller, to provide compressing image signal (step S610).Then, compressing image signal (step S620) can be received by source electrode driver, and, by the decompressor of source electrode driver compressing image signal is converted to and goes back original digital image data, sequentially to provide multiple display voltage to display panel to drive display panel (step S630) according to multiple display data of going back original digital image data.Wherein, the order of above-mentioned steps S610, S620, S630 is that the embodiment of the present invention is not as limit in order to illustrate.Further, the details of above-mentioned steps S610, S620, S630 can refer to shown in Fig. 1, Fig. 2 A, Fig. 2 B, Fig. 3 A, Fig. 3 B, Fig. 4, Fig. 5 and Fig. 6 embodiment, then repeats no more at this.
In sum, the source electrode driver of the embodiment of the present invention, driving circuit and display device, transmit data by compressed compressing image signal between its time schedule controller and source electrode driver, to reduce the data transmission rate between sequence controller and source electrode driver, the problem that high data transmission rate is brought can be avoided by this.Further, stored by data cross, can the quantity of data latching unit in drop data passage.Moreover be the display data comprising a plurality of lines owing to going back original digital image data, therefore each is gone back original digital image data and can be used to judge whether to carry out the charge share between data channel, to reduce the power consumption of source electrode driver.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (29)
1. a source electrode driver, is characterized in that, comprising:
One decompressor, receives a compressing image data and carries out decompressing to provide one to go back original digital image data, and wherein this is gone back original digital image data and comprises multiple display data;
Multiple data latching unit, in order to those display data of breech lock, and sequentially provides those display data; And
One digital analog converter, in order to those display data of received in sequence, so that these display data are converted to analog format by digital format, and sequentially produces multiple analog output signal.
2. source electrode driver according to claim 1, it is characterized in that, this compressing image data of each is the display data comprising a plurality of lines, and this decompressor is after carrying out this decompression to this compressing image data, is the display data simultaneously obtaining these a plurality of lines.
3. source electrode driver according to claim 1, is characterized in that, the compression unit of this compressing image data is N pixel × M pixel, and wherein N pixel × M pixel represents M pixel in N bar line, and N, M are positive integer.
4. source electrode driver according to claim 3, is characterized in that, the sum=2+P of those data latching unit, and wherein P is a positive integer, and P=N.
5. source electrode driver according to claim 3, is characterized in that, the sum=2+P of those data latching unit, and wherein P is a positive integer, and P<N.
6. source electrode driver according to claim 3, is characterized in that, N=2, M=2.
7. source electrode driver according to claim 3, is characterized in that, N=1, M=4.
8. source electrode driver according to claim 1, is characterized in that, those data latching unit add up to 3.
9. source electrode driver according to claim 8, it is characterized in that, those data latching unit comprise one first latch lock unit, one second latch lock unit and one the 3rd latch lock unit, in the middle of those display data, display data of each bar of line to be first temporary in the middle of this first latch lock unit and the 3rd latch lock unit one respectively or both being allocated to, then be supplied to this second latch lock unit by this first latch lock unit and the 3rd latch lock unit.
10. source electrode driver according to claim 9, it is characterized in that, this first latch lock unit is the leading portion of display according to this and in the middle of the display data of plural follow-up bar line each or back segment or whole section of sequentially keeping in Article 1 line in the middle of those display data, this second latch lock unit is whole section of display data of sequentially keeping in each line in the middle of those display data, and the 3rd latch lock unit sequentially keeps in leading portion according to this and in the middle of the display data of those follow-up bar of line each of Article 2 line display in the middle of those display data or back segment or whole section.
11. source electrode drivers according to claim 1, is characterized in that, those data latching unit add up to 4.
12. source electrode drivers according to claim 11, it is characterized in that, those data latching unit comprise one first latch lock unit, one second latch lock unit, one the 3rd latch lock unit and one the 4th latch lock unit, in the middle of those display data, display data of each bar of line are first temporary in this first latch lock unit and the central one of the 4th latch lock unit respectively, and be supplied to the 3rd latch lock unit by the 4th latch lock unit again, be also supplied to this second latch lock unit by this first latch lock unit and the 3rd latch lock unit again.
13. source electrode drivers according to claim 12, it is characterized in that, this first latch lock unit is the display data sequentially storing odd number bar line in the middle of those display data, this second latch lock unit is the display data sequentially storing each line in the middle of those display data, 3rd latch lock unit is sequentially and the display data of even bar of line in the middle of those display data of intermittent storage, and the 4th latch lock unit is the display data sequentially storing even bar of line in the middle of those display data.
14. source electrode drivers according to claim 1, is characterized in that, also comprise a charge share control circuit, are coupled to this decompressor, according to the display data of these a plurality of lines, judge whether to start the charge share between a plurality of data channel.
15. source electrode drivers according to claim 1, is characterized in that, also comprise:
One receiver, in order to receive a compressing image signal to provide this compressing image data.
16. source electrode drivers according to claim 15, is characterized in that, also comprise:
One mnemon, is coupled between this receiver and this decompressor.
17. source electrode drivers according to claim 1, is characterized in that, also comprise:
One bus remaps unit, is coupled between this decompressor and those data latching unit, for those display data are distributed to those data latching unit.
18. source electrode drivers according to claim 1, is characterized in that, also comprise:
One output buffer, is coupled to this digital analog converter, to produce multiple source drive signal according to those analog output signals.
19. 1 kinds of driving circuits, in order to drive a display panel, is characterized in that, comprising:
Time schedule controller, in order to provide a compressing image signal; And
One source pole driver, in order to receive this compressing image signal, and has a decompressor, so that original digital image data is gone back in this compressing image signal conversion one, and sequentially provides multiple source drive signal according to these multiple display data of going back original digital image data.
20. driving circuits according to claim 19, is characterized in that, this time schedule controller is from external reception one external image signal, the overcompression of this external image signal.
21. driving circuits according to claim 19, is characterized in that, this time schedule controller comprises a compressor reducer, in order to compress this external image signal to form this compressing image signal.
22. driving circuits according to claim 21, is characterized in that, this time schedule controller also comprises a mnemon, are coupled between this compressor reducer and this source electrode driver, in order to store this compressing image signal.
23. driving circuits according to claim 19, is characterized in that, this source electrode driver also comprises a mnemon, are coupled between this time schedule controller and this decompressor, in order to store this compressing image signal.
24. 1 kinds of display device, is characterized in that, comprising:
One display panel;
Time schedule controller, in order to receive this external image signal, to provide a compressing image signal; And
One source pole driver, in order to receive this compressing image signal, and there is a decompressor, so that original digital image data is gone back in this compressing image signal conversion one, and provide multiple source drive signal to drive this display panel according to these multiple display data of going back original digital image data.
25. display device according to claim 24, is characterized in that, this time schedule controller is from external reception one external image signal, the overcompression of this external image signal.
26. display device according to claim 25, is characterized in that, also comprise a main frame, and this main frame is that compression one picture signal is to provide this through this external image signal of overcompression.
27. display device according to claim 24, is characterized in that, this time schedule controller comprises a compressor reducer, in order to compress this external image signal to form this compressing image signal.
28. display device according to claim 27, is characterized in that, this time schedule controller also comprises a mnemon, are coupled between this compressor reducer and this source electrode driver, in order to store this compressing image signal.
29. display device according to claim 24, is characterized in that, this source electrode driver also comprises a mnemon, are coupled between this time schedule controller and this decompressor, in order to store this compressing image signal.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810366346.1A CN108564929B (en) | 2014-05-06 | 2014-10-08 | Source driver, driving circuit and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| US201461989477P | 2014-05-06 | 2014-05-06 | |
| US61/989,477 | 2014-05-06 |
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| CN105096849B CN105096849B (en) | 2018-05-22 |
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| CN201410526273.XA Active CN105096849B (en) | 2014-05-06 | 2014-10-08 | Source electrode driver, driving circuit and display device |
| CN201810366346.1A Active CN108564929B (en) | 2014-05-06 | 2014-10-08 | Source driver, driving circuit and display device |
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| CN114078421A (en) * | 2020-08-20 | 2022-02-22 | 瑞鼎科技股份有限公司 | Display device |
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| CN105096849B (en) | 2018-05-22 |
| CN108564929B (en) | 2021-03-23 |
| CN108564929A (en) | 2018-09-21 |
| TW201543432A (en) | 2015-11-16 |
| TWI563481B (en) | 2016-12-21 |
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